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* PM: Added support for CME/SGPE flags in respective image header.Prem Shanker Jha2016-12-201-0/+18
| | | | | | | | | | | | | | | | | Change-Id: I0c49a550eb3afb85e88afa930b36e59ba338cfd2 RTC:160829 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29927 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: ADAM S. HALE <ashale@us.ibm.com> Dev-Ready: ADAM S. HALE <ashale@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29928 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Customization of CME and SGPE rings in HOMER.Prem Shanker Jha2016-11-101-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Extracts rings from hardware image and VPD and stashes in to a temp buffer using HWP p9_xip_customize. Subsequently, using TOR API creates a fresh and leaner layout of scan rings in HOMER. - Implements a debug infrastructure to verify the scan ring layout in HOMER. - Implemented scan ring overrides for core common and cache common rings. - Introduces size check for various sections of HOMER. Change-Id: I8d7785f632823c31077bd4f320c453129be4ef0c RTC:157954 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27697 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30395 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_pstate_paramter_block L2 commitSudheendra K Srivathsa2016-10-171-1/+76
| | | | | | | | | | | | | | | Change-Id: I8d3d557ade04c88a77145feeb15d46f45f472e84 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28837 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29013 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Organize PM plat and HWP attributesSangeetha T S2016-10-041-2/+2
| | | | | | | | | | | | | | | | Change-Id: I84bc713c22892fd3fbdb8ab52d222bb9e6df5bf1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30602 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30603 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Level 2 p9_cpu_special_wakeupGreg Still2016-09-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Restructured to deal with individual core, EQ and EQ targets This is necessary as compound targets really can't apply to this procedure as the registers being addressed for an EX target changes based on Fused mode. - The above moved the main implemented into p9_cpu_special_wakeup_lib - Removed tracking attributes - Removed FUSED CORE support - EX targets will wake-up up to 2 cores within the EX (dependent on functionality) - Added SUET support - Rebased (2) - Made HWP attributes writable - Added HB platform defaults in hb_temp_defaults.xml (but doesn't compile) - Address Gerrit comments (included Cronus noticed bug) - Removed some hb_temp attributes to deal with HB Jenkins fails Change-Id: I84a66b646477627f0178c3c968580ffc435b5300 RTC: 136795 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20850 Dev-Ready: Matt K. Light <mklight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21027 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update file headersSachin Gupta2016-09-161-1/+1
| | | | | | | | Change-Id: Icdd7460d8e3213f9bbd3d52e7825242bc59fc9e9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29825 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* SBE move import`Shakeeb2016-09-011-0/+1426
Change-Id: I726951318cdb19fd445af2f7910e0d6872eff18c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29086 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
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