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path: root/src/import/chips/p9/procedures/hwp
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* Pstates/Lab: Add unblocking for DPLL/VRM/VDM/Resclk to pm_suspendBrian Vanderpool2017-07-171-72/+107
| | | | | | | | | | | | | | | This is a temporary solution to unblock analong controls until the full pm_suspend is implemented and tested. Change-Id: Iea751b44b3d7b1e93583481304759d0dff971e83 RTC: 174963 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41171 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43179 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* WOF: VRM timing, WOF and VDM enblement attributes additionsPrasad Bg Ranganath2017-07-171-2/+10
| | | | | | | | | | | | | | | Change-Id: I5b710b16cdb6b2f49567024e227e943027aba5ae Original-Change-Id: I1ff55edf512f1a3ec4b6b1c1773726e31ae2e611 RTC:169800 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38207 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43185 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Updated QPMR and SGPE Header with 24x7 offset and length.Prem Shanker Jha2017-07-171-4/+4
| | | | | | | | | | | | | | | Change-Id: I476f0bce58c6d3fda06faa9e0902d314b009b628 Original-Change-Id: Idfcca3888ad1446a9e5130538e8270adc44e2631 RTC:164313 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34192 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43184 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* STOP: block wakeup (+ block entry since patch 15)Yue Du2017-07-171-4/+29
| | | | | | | | | | | | Change-Id: I6636b7f77842e9a5e07fffa0f908fb4d46e7d763 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35205 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43188 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Added support for PGPE Boot/PGPE integrationPrem Shanker Jha2017-07-171-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - support for P-State parameter block - implements a compact image layout of PGPE similar to CME/SGPE. - adds PGPE boot progress code as a field in PPMR header. - implements PGPE boot loader and PGPE boot copier. - incorporates ability to generate PPMR header in the build flow. - change logic for calculating CME's first block copy length. - Turned on generated tables in PGPE Hcode - Fixed up pointers to generated tables - add ATTR_PGPE_HCODE_FUNCTION_ENABLE attribute to control PGPE ops - fix p9_pstate_parameter_build bug with AVS timing attributes - Make OCC Pstate Parameter block a fixed offset (128KB) in PPMR - Make Pstate Table from PGPE a fixed offset (144KB) in PPMR to ease debug - Fix Endianes issues in OCC PPB and input slope calcs - Added PGPE Hcode Length to PGPE header so that GPPB SRAM location is known. - Build flag for OCc Immediate IPC response - Build flag to no use temp boot settings - Expanding tracing for debug - Added default values for PBAX attributes as placeholders for MRW in firmware - Added WOF VFRT structure definions to headers; movement into HOMER NOT yet supported - Addressed review comments and rebased - Rebased with ATTR_PGPE_HCODE_FUNCTION_ENABLE in separate commit for Cronus Change-Id: I4befc542a76acf2572b4a688488b03c57e19e588 Original-Change-Id: I4752debbc7fb3275d4e79804333654511de427ff Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26115 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43183 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* OCC Flags/OCC Scratch UpdatesRahul Batra2017-07-171-0/+205
| | | | | | | | | | | | | | Change-Id: I17a4bed46534bf5d77056a9d8eb3b44fcb648623 Original-Change-Id: I21020ebf7dfe39dd48e2d2727607dd35297831d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32695 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43182 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* OCC Flags/OCC Scratch UpdatesRahul Batra2017-07-171-15/+13
| | | | | | | | | | | | | | Change-Id: I75bff4fc5a76c98845cf88cb6c5f055142d1005b Original-Change-Id: I21020ebf7dfe39dd48e2d2727607dd35297831d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32695 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43178 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L2 p9_suspend_powmanCHRISTINA L. GRAVES2017-07-172-0/+246
| | | | | | | | | | | Change-Id: I4db4ab203fcdc6ee6766967063402433f754d0aa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31853 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43177 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Delete deprecated attributesGreg Still2017-07-142-8/+8
| | | | | | | | | | | | | | | | | | | | - Complete the move to platform SYSTEM_*_DISABLED and HWP *_ENABLED attributes - Added VDM DPLL response attribute to CME header mapping - Updated review comments Change-Id: If8f8e42fd94825623315e8a7c28105cca8c8c8b2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42918 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42919 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Create dmi.pll.scan.initfileBen Gass2017-07-145-8/+105
| | | | | | | | | | | | | | | | | | | | Support sync and async mode for Cumulus MC Default buckets are 1. Change-Id: I62d0221abf7f93030cb8c0200a456609ab4dfe04 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40326 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41056 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HCODE: DD21 makefile changes for CME,PGPE and SGPEPrasad Bg Ranganath2017-07-143-11/+20
| | | | | | | | | | | | | | | Change-Id: I93f995e1c63f376906efc2bad24aa2c5728702fb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42934 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43113 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_hcd_cache_dcc_skewadjust_setupAnusha Reddy Rangareddygari2017-07-141-46/+15
| | | | | | | | | | | | | | | | | Not including buckets 16,17 under dcadj functionality Change-Id: I4fe8be65996cac1e71c36074d147f5a201bee327 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42791 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael Koch <michael.koch@de.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42794 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW414700 checkstop on UEs and disable core ECC counterLuke C. Murray2017-07-131-2/+14
| | | | | | | | | | | | | | | | Core ECP.PC.FIR.THRESHOLD_RESET = 0b00 to disable CXA, L2, L3, NMMU, NX, VAS, FBC, MC FIR changes to checkstop on UE at source Change-Id: I4400acb7d3ec68cced49adb5a77fec7bd8356d40 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42887 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42942 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add PERV chiplet to MCGR 0Anusha Reddy Rangareddygari2017-07-131-0/+5
| | | | | | | | | | | | | | | | Requested and supported by Dean Sanner (05-17-2017) Pre-tested by Brian Stegmiller (05-17-2017) Change-Id: I2bb87ed1b5e145646c035c0e29b39606ae41af30 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42922 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42923 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Change DD2 #if statements to correct SBE conventioncrgeddes2017-07-131-19/+21
| | | | | | | | | | | | | | | There are a bunch of #if statements in sbe_check_quiece related to DD2, I have updated them to match what the SBE repo uses. Change-Id: I4841f9a19e11613aba428cad57431755b71c848c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42683 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42771 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Quad FIR updates for Nimbus DD2, MPIPLLuke C. Murray2017-07-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Core: - Mask bit 57 to match XML specification L2: - Mark bit 18 recoverable (core initiated non-CI store) - Update XML description for bit 23 - Mark bit 25 checkstop (castout) NCU: - Mark bit 3,4 recoverable (core initiated CI store, load) - Mark bit 7 recoverable (core initiated msg send) - Mark bit 12 checkstop (IMA) - Mark bit 15, 16 checkstop (PPE) - Mark bit 21 recoverable (darn = core initiated CI load) Change-Id: I620b98e4542bfde7524f4f13dc18fd1868adfd81 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42522 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Daniel J. Henderson <hende@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42789 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* mc_pll_bucket attributeAnusha Reddy Rangareddygari2017-07-121-0/+10
| | | | | | | | | | | | | | | | | | | | | | in async mode for Cumulus. Using scratch_reg_2 bits 21:23 shift p9_xip_customize changes to a separate, dependent commit to satisfy HB CI for this commit Change-Id: I44c25c5cfb437298f1102f5275a260b4c5ccf522 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42355 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42356 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* dcc skew adjust procedure updateAnusha Reddy Rangareddygari2017-07-121-229/+248
| | | | | | | | | | | | | | | | | new attributes to support disabling of dccadj and skewadj functionality Change-Id: I4f23b8800a87a3d0d9ce0a0fadfa99e2de03d3f6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41470 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41472 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Cumulus proc updatesAnusha Reddy Rangareddygari2017-07-121-45/+90
| | | | | | | | | | | | | | | | for osc switch settings Change-Id: I9e762d2c4b552e84a3a2cc48ec0d9d75732b07cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41676 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41679 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_chiplet_reset updatesAnusha Reddy Rangareddygari2017-07-121-0/+2
| | | | | | | | | | | | | | | | | Added sim ony delay to work with NEST_PLL_BUCKET = 1 to support MV GSD2PIB Change-Id: I68b8f255c26b85e7b77fde01ac538b3208c13c49 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42641 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42792 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_{mem,sbe_chiplet}_pll_setup: Level 3Joachim Fenkes2017-07-112-3/+3
| | | | | | | | | | | | | | | | Merge these procedures' error XML into one because they both need the same FFDC and handling anyway. Change-Id: Id96af77aaf832be412aba18a5a7e10ee4bc90e5d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41230 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41259 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Support for fused core modeSachin Gupta2017-07-111-16/+48
| | | | | | | | | | | | | Change-Id: I1d898b5b0be1329b2a838d102833b48257215faf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42668 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42788 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_select_ex -- add option to skip HB checksJoe McGill2017-07-112-4/+12
| | | | | | | | | | | | | | | Change-Id: I11b0cb086aade9a6fd3da39638ce01e5f75e4f85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42688 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42689 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Restore backward compatibilty of SBE image with HB/HWSVSachin Gupta2017-07-071-0/+24
| | | | | | | | | | | Change-Id: I2eba38a5d5a254c9595ee49e56f65b6c7ded67a6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42819 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42822 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update p9_sbe_chiplet_reset to support MV GSD2PIBAbhishek Agarwal2017-07-031-0/+2
| | | | | | | | | | | | | | | | Added Delay to work with NEST_PLL_BUCKET = 1 Change-Id: I9bdf745bb655f606d593245e378709703212219c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42471 Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42475 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_select_ex -- skip new checks for b_single=falseJoe McGill2017-07-031-2/+2
| | | | | | | | | | | | | | | | breaks cache contained,force_all_cores modes Change-Id: I7a609c14c1577a74339b4869078bc78abd203732 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42667 Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42675 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* p9_sbe_select_ex: add fused core booting supportGreg Still2017-07-031-31/+85
| | | | | | | | | | | | | | | | | | | | | | | | - Reads ATTR_FUSED_CORE_MODE attribute in "single" mode. - Checks that the first core found is an even core - Checks that the odd core in the EX associated with the first core is functional - Adds the second core to the CCSR in the OCB for istep 4 use. - Added callouts for Level 3 - Fix error testing bugs - Addressed callout comments - Addressed review comments Change-Id: Id095c1300a96ff52f311836c9dcbe93226014ff0 RTC: 173949 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41149 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41151 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* Base infra for PM FFDC extraction of PPE stateAmit Tendolkar2017-07-011-0/+65
| | | | | | | | | | | | | | | | | | | Allows a HWP to callback into the p9_ppe_state via FAPI return code using the collectFfdc error xml tag, such that the PPE state registers get added as FFDC to the return code Change-Id: If1c7804fb8d04ba2b8d5939f111f6d7cbb7e4443 RTC: 163327 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40139 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42684 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* Dummy commit to enable optimized ppe ffdc collection on SBEAmit Tendolkar2017-07-016-0/+917
| | | | | | | | | | | | | | | Allows new files needed to mirror gerrit review 41375 to hw/ppe repo. Change-Id: I3b40c36b7fbe0714732e5868465afd7f1e517c4c RTC: 174610 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42665 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42671 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PM: Fix for cyclic inclusion of header files.Prem Shanker Jha2017-06-302-1/+2
| | | | | | | | | | | | | | | | | HWP using this utility to collect FFDC fail to compile because of cyclic inclusion of header files in p9_eq_clear_atomic_lock.H. Commit resolves this issue. Change-Id: Idbb269a48bb9765194ae6616f4b76643f4ac917c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42347 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42656 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Callback for dropping Quad Atomic LockAmit Tendolkar2017-06-302-14/+43
| | | | | | | | | | | | | | | | | HWP that can be called, either as a callback from an error XML file via the collectFfdc tag or, called directly, to check and clear an atomic lock on the cache chiplet to allow collection of CME FFDC register content (SCOM/RAM) Change-Id: I221bf4b8d36a40c38acd930dfb0827e365b69eca RTC: 172582 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41599 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42655 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* Dummy commit to enable mirroring new files from gerrit review 41599 into HBAmit Tendolkar2017-06-302-0/+155
| | | | | | | | | | | | | | | HWP that can be called, either as a callback from an error XML file via the collectFfdc tag or, called directly, to check and clear an atomic lock on the cache chiplet to allow collection of CME FFDC register content (SCOM/RAM) Change-Id: I85dad65cf75f4b18e843d5e3ce06ff56230c33e1 RTC: 172582 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41681 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42654 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* Improve power and clock checking when checking for stop statesBrian Vanderpool2017-06-292-8/+45
| | | | | | | | | | | | | | | Change-Id: I62a9d62b61f9336d99459bca4090fb628f38787f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42499 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42505 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L3 update -- p9_suspend_ioThi Tran2017-06-262-120/+99
| | | | | | | | | | | | | | | | | | - Update headers/comments - Added error traces to FAPI_TRY call - Review error FFDC and callout Change-Id: I7b984cf8c6dd9fdd6a55a52a9f95bf6a8461d8c8 RTC:151595 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41301 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41303 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_tp_stopclocks: Don't raise CFAM FENCE2 to keep PERV chiplet accessibleJoachim Fenkes2017-06-231-1/+1
| | | | | | | | | | | | | | Change-Id: I402c713589d2538ec20da02f6f21d5a6aadc45f3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42094 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42095 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L3 update -- p9_sbe_instruct_startThi Tran2017-06-232-12/+11
| | | | | | | | | | | | | | | | Change-Id: I2c501b01f8bf819f2610dcf55a9225bb70e19c18 RTC:139623 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42110 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42119 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_tp_chiplet_init1: Set TP_TCPERV_SRAM_ENABLE_DCJoe Dery2017-06-231-0/+5
| | | | | | | | | | | | | | | | | | Set TP_TCPERV_SRAM_ENABLE_DC at end, after CHIPLET_ENABLE/scan0 CQ: HW414015 Change-Id: I28ea1bd84eaab79d2db249c5902c1f88a7fcd1e2 Depends-On: I5a4b929fad4aa954ad413eb73861ab1e53135360 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42226 Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42231 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Propagate "fused_core" IPL option into PU chipJoachim Fenkes2017-06-232-2/+16
| | | | | | | | | | | | | | | | | | | | | | Set the "force fused core mode" bit in PERV_CTRL0 based on the IPL option in p9_set_fsi_gp_shadow. Also check in p9_sbe_select_ex that blown fuses did not prevent the override. Change-Id: I8bafa8f571db6f8b0b776e124cc480b99722718e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41990 Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41991 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* add support for OBUS PLL bucketsJoe McGill2017-06-232-14/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_frequency_buckets.H p9.obus.pll.scan.initfile document and support base frequencies 1611 MHz - 25.78G, 156.25 MHz ref 1250 MHz - 25G, 156.25 MHz ref 1200 MHz - 19.2G, 133.33 MHz ref pervasive_attributes.xml define ATTR_OB[0123]_PLL_BUCKET to hold encoded ring bucket select value nest_attributes.xml define ATTR_FREQ_O_MHZ array to hold per chiplet OBUS frequency retain ATTR_FREQ_A_MHZ to serve as FBC A link frequency indicator p9_setup_sbe_config.C p9_sbe_attr_setup.C transmit bucket selection through FSP/BMC->SBE mailbox encode OBUS bucket selects in Scratch Reg2 bits 24:31 p9_sbe_chiplet_pll_initf.C p9_sbe_chiplet_pll_initf_errors.xml scan correct ring image based on bucket selector attributes p9_ringId.C p9_ringId.H p9_ring_id.h accomodate three copies of obX_pll_bndy (use ID previously reserved for obX_pll_func, which should not be necessary to scan init) scan_procedures.mk generateWrapper.pl initCompiler infrastructure changes to support build of bucket data p9.fbc.ab_hp.scom.initfile p9.fbc.ioo_tl.scom.initfile p9_tod_setup.C updates to handle A,O frequency attribute changes CMVC-Prereq: 1027320 CMVC-Prereq: 1027496 CMVC-Prereq: 1027579 Change-Id: I42f9bb4037a587f7e3ec8dd9848bdb853ac3d7a0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40159 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40164 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Only attempt to quiesce PHB target if it actually existscrgeddes2017-06-221-3/+17
| | | | | | | | | | | | | | | | | | | | | | There was recent changes to remove one of the PHB targets for PEC1 This was causing MPIPL to break because there is some pretty rigid code responsible for quiescing the PHBs during MPIPL. There are future changes coming that allow the SBE to be aware of PHB states that will allow for this code to be rewritten so we can avoid having to look at these CPLT_CONF_IOVALID bits all together. Change-Id: Ib8b8ac3377d8f185451716b6b7f1753de8c29268 CQ: SW374182 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41889 Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41902 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* PM Lib: HWP p9_pm_force_core_accessAmit Kumar2017-06-221-0/+5
| | | | | | | | | | | | | | | | | | | | - Initial checkin - This procedure is based on RTC: 162579 - Made this HWP level 2( in p3) - Added cme id as input Change-Id: I52abce4b8ece22ebdf4bdcd1b423ccbb251ccb17 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35363 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35364 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* RAS XML: masked PBAMFIR[3:4]Zane Shelley2017-06-211-2/+2
| | | | | | | | | | | | | | | Change-Id: Ic5b8d743a4165132c76ea5485d0f01ffe640bea3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41903 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42012 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_fastarray: Level 3Joachim Fenkes2017-06-192-8/+4
| | | | | | | | | | | | | Change-Id: I75551b114bb784bb7483f0d9d90ac11d4b5a25e2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41226 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41264 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_tracearray: Level 3Joachim Fenkes2017-06-192-36/+33
| | | | | | | | | | | | | | Change-Id: I9ffdb6ba9684f2fb0df5377cfe70a962736a9c5f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41240 Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41265 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* L3 updates -- p9_sbe_mcs_setup, p9_revert_sbe_mcs_setupJoe McGill2017-06-192-121/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | p9_revert_sbe_mcs_setup query ATTR_CHIP_UNIT_POS to eliminate dependence on platform getChildren() call returning targets in chip unit position order p9_sbe_mcs_setup merge specialization definitions for set_hb_dcbz_config add FFDC collection p9_sbe_mcs_setup_errors add FFDC, callout actions Change-Id: I26bae24d7686bbba78c5844197a17295ce0de167 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41108 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41112 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_common_stopclocks: Level 3Joachim Fenkes2017-06-192-4/+16
| | | | | | | | | | | | | | | | | Merge CBS ACK errors into one, add FFDC indicating expected ACK level Change-Id: Ide057e46b15ae30fc49107ff57f577aa665c35a1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41104 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41117 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L3 Initfile: Qualify divide_minor settingAlex Taft2017-06-191-7/+10
| | | | | | | | | | | | | | | | | | | | L3_REF_TIMER_DIVIDE_MINOR needs to be left at default value of Divide by 10 for DD1.X, DD2.0 due to bug Change-Id: I9bfbf243ecf854c2375e852f60d0bcb47812fe87 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41893 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41899 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add core workaround for HW407136Nick Klazynski2017-06-141-2/+2
| | | | | | | | | | | | | | | | | | Remove ATTR for HW396388; EN_ATTN is needed for all chips Mask PC_OTHER_CORE_CHIPLET_SYS_XSTOP_ERROR for SW390012 Change-Id: I70280ca7dfdd22ee88780c8cf76444283d1a4213 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41646 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41647 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L3 initfile updatesAlex Taft2017-06-131-0/+14
| | | | | | | | | | | | | | | | | | | | | | The following should apply to all chips/systems. 1) Set edram refresh divider to optimal value based on pb frequency 2) performance fix for castout pacing. Base value was too high. Change-Id: I7f280f9826ba7483a31b64aca5caf36affaea843 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41248 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41253 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix alignment issues in SBE-HB structureDan Crowell2017-06-132-9/+18
| | | | | | | | | | | | | | | | | | | Add padding to keep all fields aligned to 8-bytes Add explicit attribute to ensure structure is packed Change-Id: I55ca10034d7adf3e766edb4d0071f649c7c90446 CQ: SW391259 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41584 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41613 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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