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* OTPROM updatesAnusha Reddy Rangareddygari2017-06-081-2/+14
| | | | | | | | | | | | | | | * To check if SBE started booting from OTP OR NOT * Reg 2809 bits 30:31 set to '01' Change-Id: If89fa1a6748e2cd24ac7634535fefdff533922de Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39701 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
* Check Scratch Register 3 bit 7 and set new ATTR_SECURE_SETTINGSMike Baiocchi2017-06-075-12/+57
| | | | | | | | | | | | | | | | | | | | Change-Id: Ia125ce6fdf5a15acf30a11e3124fae86c645d96c RTC:163094 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41107 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41110 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Supported Stack Usage feature on HW via cronusRaja Das2017-06-065-19/+71
| | | | | | | | Change-Id: I7b5eaa1ee484e4fbd31f12146d3d47dd24344255 RTC: 175229 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41360 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Undo some p9 Cumulus spy workarounds in initfilesThi Tran2017-06-061-18/+0
| | | | | | | | | | | | | | | Change-Id: I961ec9e52962b1d5e1295e484922095acd6697a8 RTC:174656 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41234 Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41306 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Added FAPI traces in the delay method to for current/target timeRaja Das2017-06-062-0/+17
| | | | | | | | | | Change-Id: Ibbca69573eb833e5ea9738ae69eefdb4aea9ca8a CQ: SW386997 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41364 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* Cumulus initfile update for OBUS & XBUS PLLsSoma BhanuTej2017-06-061-0/+18
| | | | | | | | | | | | | | Change-Id: I81e288c9160036bb3768c9172e860293f325a8d3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41099 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41261 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Added traces to figure out the infinite loop in the mpipl pathRaja Das2017-06-053-5/+24
| | | | | | | | | | | | | Change-Id: Iabe0a1ae22e0a18915a3ca645932e09b3bf83b28 CQ: SW386997 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41361 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41365 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Reduce SBE image sizespashabk-in2017-06-024-2/+16
| | | | | | | | | | 1. Removed get capabilities 2. Removed state machine check for chip-ops Change-Id: Idc1d497d50af645f62ff44d8f7143347c4467767 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41098 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Figure out DD level in simicsspashabk-in2017-06-021-10/+28
| | | | | | | | | | Command to get ddlevel of sbe - "sbe-ddlevel 0" Rename stack usage tool to "sbe-stack" Change-Id: I504a827b46957673335156dbc100e64709ef041a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41150 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_fastarray: Add support for multiple chips, Nimbus DD2 supportJoachim Fenkes2017-06-021-0/+12
| | | | | | | | | | | | | | | | | | | | | Refactor engine code to switch from a fixed array and ring table to a table per chip and EC level. Change a lot of loop constructs to C++11-y foreach loops in the process. Add a function to choose the right tables based on chip type and EC. Also add Nimbus DD2 array and ring definitions. Change-Id: I9d9ffeacc8bfe7f43a7afc7b73d5b831fb8db354 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40078 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40130 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* adjusted mem 2400 nest 1600 workaround and make dd1 onlyShelton Leung2017-06-021-0/+17
| | | | | | | | | | | | | | | | | | Change-Id: Iabf4b8a03eb2ae6c97ed2b6c96a0f6eed190fba6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41128 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41132 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_fastarray: Fix ABIST engines not running to completionJoachim Fenkes2017-06-021-4/+4
| | | | | | | | | | | | | | | | | Turns out that having the core region fences raised causes ABIST_DONE to be on even if the engines aren't really done. This caused subsequent dumps to return bad data. Fixed. Change-Id: I5d69511297609ab1a673aee63327977e6007b4e6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40076 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40092 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_fastarray: Raise CTRL_CC_SDIS_DC_N during dumpJoachim Fenkes2017-06-022-0/+8
| | | | | | | | | | | | | | | | This needs to be 1 on both DD1 and DD2 during dumping lest we dump incorrect data for some arrays (most notably the ERAT CAMs). Change-Id: Idad18701b136b9398c9cc25dd8d9fc37fac31c5c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40077 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40094 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add PHY DP16 DRIFT_LIMITS regs and DD2_BLUE_WATERFALL_EXT field APILouis Stermole2017-06-021-0/+6
| | | | | | | | | | | | | | | | Change-Id: Ia891488d7de965a99c8cf3c457fccba9603773ad Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41136 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41166 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* SBE:putring changes of accessing the RS4 data for optimizationPrasad Bg Ranganath2017-06-012-57/+71
| | | | | | | | | | | | Change-Id: Ie4e920fa51cf94bd7b8034c156d953806c5d6b0c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40055 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40189 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* SBE GETRING: Fixed the data missing issuePrasad Bg Ranganath2017-06-011-36/+38
| | | | | | | | Change-Id: I4330cfee0e9d037e34f960dafecabedcd399865d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41161 Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Added p9_hcode_image_build_attributes.xml in src/build/MakefileRaja Das2017-06-011-0/+1
| | | | | | | Change-Id: If8f283b0d73987d10807cc982d04044be3b766eb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41218 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Change HCODE image build to use ATTR instead of scomDean Sanner2017-06-011-0/+12
| | | | | | | | | | | | | | | | Remove HW dependancy in p9_hcode_image_build and use ATTR instead Change-Id: I97e9641af2e2f73e5691a975ed885496f89b941e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31593 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41216 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM:Revised hcode image build.Prem Shanker Jha2017-06-011-0/+1
| | | | | | | | | | | | | | | | | | | | - Extracts PGPE Hcode from hw image. - Extracts base and override scan rings using TOR API. - Endianess correction for cronus use case. - Generates of standalone binaries associated with various regions of HOMER. - Generates hardware image binary. - Additional debug traces to aid veririfcation. - Code refactoring Change-Id: I86a707d90c2d0eb56f2637e8c5caff79ff3fff75 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25109 Tested-by: Jenkins Server Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41215 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Added hcode image build support for SGPE and CME.Prem Shanker Jha2017-06-011-0/+39
| | | | | | | | | | | | | | | | | | | | | In this commit, nested xip structure of hardware image is traversed and hcode for following platform is copied to to relevant area in HOMER: - SGPE - CME - P9 Self Restore code RTC: 145583 Change-Id: I8f91e34aff81b4c9218be5a380e3336913cbd7c9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/10675 Tested-by: Jenkins Server Tested-by: Auto Mirror Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Tested-by: Hostboot CI Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41214 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_tp_switch_gears, p9_sbe_gear_switcher: Level 3Joachim Fenkes2017-06-016-30/+108
| | | | | | | | | | | | | | Change-Id: Ie0bef712a4053eef0022b4f01c3cda9c3c3c8aba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38795 Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38797 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* P9 Cumulus InitCompiler supportis - Part 3Thi Tran2017-06-014-15/+25
| | | | | | | | | | | | | | | | | | | | - Update *.mk files to support p9c chip ID - Workaround some spy issues p9c 10 engd issues - Fix bug to allow compilation without ENGD Change-Id: Ie94b55c93081108668725d3ee9b88bd34eaa794f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40904 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40952 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_common: Level 3Joachim Fenkes2017-06-013-264/+96
| | | | | | | | | | | | | | | Change-Id: I55fac6a40f6e53c8afd859ea262b44b36a20b33e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38784 Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38789 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* update owner comments in ADU, PBA, TOD HWPsJoe McGill2017-06-0116-19/+17
| | | | | | | | | | | | | | | Change-Id: Ic3182c3e8e1d8917b779f1189340d24b2de57865 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41119 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41122 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_cen_framelock -- 2nd versionJin Song Jiang2017-06-014-4/+63
| | | | | | | | | | | | | | | | | | | | | 1) Replace MCSMODE4 register with MCMODE2 and MCBCFGQ register shift host attention enablement to p9c_set_inband_addr HWP 2) Update FIR registers'(ACT0,ACT1 and MASK) set from p8 to p9c Change-Id: Ifdce2d948c12ad2b82a74cfc6a8731617a3086df Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39558 Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39560 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Remove Endian SwitchesSantosh Puranik2017-06-014-90/+13
| | | | | | | | | | | | Plat code will always run on big endian Change-Id: I858cf8d217534414716de81f20227d9ad30756bd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41090 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com>
* FAPI Plat CleanupSantosh Puranik2017-05-3129-219/+53
| | | | | | | | | | | | -- Remove src and include subdirs Change-Id: I47d2b7d0b3667e7765692fb014932ae23a6325f7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41085 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com>
* Remove dependency of sbe obj path for sbestate, ppestate etcSachin Gupta2017-05-311-23/+28
| | | | | | | | | | Change-Id: I5afe599e9f128ac0721d437cef0b5a2057dc346f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41156 Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Enable tools to take fsp-trace from system pathSachin Gupta2017-05-311-3/+10
| | | | | | | | | | | | | | fsp-trace is not created as part of sbe build output. So will use system path for fsp-trace. It can be overridden by manually putting fsp-trace in sbe build output. Change-Id: Ia27de410f3c705e7fc9f6d0604977e0074849a46 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41154 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Disable SBE ENTER/EXIT tracesSachin Gupta2017-05-311-1/+1
| | | | | | | Change-Id: Ifc0be8d21ab938ff818f6ae6bc8771b05aea15ec Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41160 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Stopclocks procedure to stop PLL region alsoSoma BhanuTej2017-05-312-9/+8
| | | | | | | | | | | | | | Change-Id: Ia3eb8355e4609a1f3328f8eff00621fab594d0a3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41059 Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Daniel Kiss <kiss@de.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41088 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_extract_sbe_rc: Level 3Joachim Fenkes2017-05-311-1/+8
| | | | | | | | | | | | | | | | | | | | | - Rename the RE_IPL action to REIPL_UPD_SEEPROM to reduce confusion - Remove the RUNNING action and suggest RESTART_SBE if it's running - Add callouts and FFDC - Change some actions and rename some errors to avoid confusion - Add detection of FI2C ECC errors Change-Id: I58de05e73146168ed641be473ca97d6b1bb21f5d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38803 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40630 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* future proof EC feature attributes, add missing P9N DD2 initsJoe McGill2017-05-314-174/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | redefine EC feature attributes, using inverse logic where required, to qualify inits specific to P9N DD1 where possible, to eliminate need for updates for future chips in plan attempt to remove usage of generic P9N_DD1_SPY_NAMES and P9N_DD2_SPY_NAMES attributes added to support initial P9NDD2 engineering data -- several spies were not being set as a result ----------------- initfile updates: ----------------- p9.cme.scan.initfile add HW391162, SCAN_SICR_TLBIE_QUIESCE feature attributes p9.core.common.scan.initfile remove fused core init, it was applying scan default for P9N DD1 and is not needed for P9N DD2+ given fuse controls p9.core.scan.initfile add CORE_P9NDD1 to qualify P9N DD1 specific register hierarchy and dial programming replace usage of P9N_DD1_SPY_NAMES, P9N_DD2_SPY_NAMES using CORE_P9NDD1 and inverse, to pick up initial pass at P9C DD1 inits p9.cxa.scom.initfile add CXA_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy p9.ddrphy.scom.initfile add DDRPHY_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy p9.dpll.scan.initfile remove POSTDD1N_DPLL_SETTINGS feature attribute, use DD1_DPLL_SETTINGS attribute and inverse to drive inits p9.l2.scan.initfile invert definition of OPTIMAL_LARX_STCX_PERF, HW409069 feature attributes p9.l3.scan.initfile p9.l3.scom.initifle remove OPTIMAL_LCO_SCOM, HW396230_SCOM feature attributes use HW386657, HW396230 attributes to drive inits p9.mca.scom.initfile add MCA_P9NDD1_ASYNC to differentiate asynchronous boundary crossing programming and dial name differences between P9N DD1, P9N DD2 p9.mmu.scan.initfile p9.mmu.scom.initfile invert definition of NMMU_DMT_DD2, NMMU_ISS734_DD2_1 feature attributes p9.ncu.scan.initfile p9.ncu.scom.initifle remove HW396230_SCOM, use HW396230 attribute to drive inits p9.npu.scom.initfile remove usage of P9N_DD1_SPY_NAMES, refactor CONFIG_ENABLE_PBUS specification to work for both P9NDD1, P9NDD2 ENGD p9.obus.scan.initfile remove EC qualification of OBUS FIR mask for simulation sample.ec.scan.initfile remove testcase requiring use of P9N_DD1_SPY_NAMES, properties of testcase are covered by other tests ----------------- HWP updates: ----------------- p9_xip_customize add customization of epsilon attributes for NMMU application p9_chiplet_scominit invert definition of P9_NDL_IOVALID feature attribute remove usage of P9N_DD1_SPY_NAMES p9_npu_scominit replace usage of P9N_DD1_SPY_NAMES with SETUP_BARS_NPU_DD1_ADDR p9_sbe_tracearray invert definition of CORE_TRACE_SCOMABLE feature attribute p9_sim_get_nia remove usage of P9N_DD1_SPY_NAMES, directly process CT/EC attributes (ok as this HWP is used for VBU sim only and not consumed by FW) Change-Id: I63bfe8a4bfb8824b94e35a3688a6c69eecc1cf01 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40911 Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40915 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Check scrach register 3 bit 6 before potentially disabling securityNick Bofferding2017-05-291-6/+16
| | | | | | | | | | | | | | | | Change-Id: I3b0574a10ef0483581e357b506b5e4e69fc13936 RTC: 170650 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39570 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Dev-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39576 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Update behavioral description of ATTR_SECURITY_MODE attributeNick Bofferding2017-05-291-2/+8
| | | | | | | | | | | | | | | | | | - Update behavioral description of ATTR_SECURITY_MODE attribute Change-Id: I34eacb3e541d8cec505713ed2e55a55fd872cbe5 RTC: 170650 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39569 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Dev-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39573 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* L3 update -- p9_sbe_fabricinitJoe McGill2017-05-283-22/+67
| | | | | | | | | | | | | | | | | remove stale TODO comments replace local defined bit field constants with SCOM address header constants add FFDC, HW callouts for all errors Change-Id: I8440323904cf1c76e0f056b2ecc71de357d522e0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40361 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40362 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* jgr17050500 Added Centaur and DMI IO SCOM initfilesJohn Rell2017-05-281-0/+18
| | | | | | | | | | | | | | | Change-Id: I66e57795b5f9ca8c39ed244c7590a31e0c4cd79f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40154 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40156 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L3 updates -- p9_build_smp, p9_fbc_utilsJoe McGill2017-05-284-349/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | p9_build_smp: constrain FFDC collection at 16 chips (current max size for P9 based systems) scrub node references, replace with group clarify X link requirements based on pump mode review and complete callouts p9_fbc_utils: add feature attribute to support pb_init sampling on NDD2+ replace locally defined bit constants with SCOM header file constants Change-Id: Ib1f71488ffd07580a647709d9227112f7d73384f CQ: HW328175 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40308 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40310 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_perv_sbe_cmn: Level 3Joachim Fenkes2017-05-273-5/+61
| | | | | | | | | | | | | | Change-Id: Ide7c1912b0ac753532a2304095e5d987d4c4d81b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38780 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38782 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_pstate_parameter_block: Pound W enhancement for VID ComparePrasad Bg Ranganath2017-05-271-0/+22
| | | | | | | | | | | | | | | | | | | - Add changes to Compare VID slopes support - Added changes for threshold slopes Change-Id: I6ce9f7630cf8f8bbb19a2914da43c24308c3c7fd RTC:172523 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39955 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40767 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* support chip swap in memory map via FBC XOR mask programmingJoe McGill2017-05-278-86/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_sbe_fabricinit.C p9.fbc.ab_hp.scom.initfile set PB_CFG_XLATE_ADDR_TO_ID based on XOR of effective & absolute FBC group/chip ID attribute values, prior to island mode FBC init cleanup register/field constant todos p9_fbc_utils.C parametrize p9_fbc_utils_get_chip_base_address to support calculation of origin address based on: - effective FBC group/chip ID attributes (EFF_FBC_GRP_CHIP_IDS) - effective FBC drawer origin -- effective FBC group ID + chip ID=0 (EFF_FBC_GRP_ID_ONLY) - absolute FBC group/chip ID attributes (ABS_FBC_GRP_CHIP_IDS) p9_sbe_mcs_setup.C (MCS BAR for HB dcbz support) set p9_fbc_utils_get_chip_base_address call to use EFF_FBC_GRP_ID_ONLY configures BAR address based on drawer base + HRMOR p9_sbe_load_bootloader.C set p9_fbc_utils_get_chip_base_address call for bootloader load to use EFF_FBC_GRP_ID_ONLY (drawer) store XSCOM/LPC BAR into bootloader config data structure in exception vector (based on chip offset) p9_mss_eff_grouping.C (MCS/HTM BARs) p9_pcie_config.C (PCIE MMIO BARs) p9_rng_init_phase2.C / p9_hcode_image_build.C (NX RNG BAR) p9_sbe_scominit.C (XSCOM/LPC BARs) p9_setup_bars.C (MCD, FSP/PSI/NPU/INT MMIO BARs) set p9_fbc_utils_get_chip_base_address call to use EFF_FBC_GRP_CHIP_IDS p9_setup_sbe_config.C p9_sbe_attr_setup.C transmit ATTR_PROC_EFF_FABRIC_[GROUP/CHIP]_ID via scratch6 mailbox p9_xip_customize.C init ATTR_PROC_EFF_FABRIC_[GROUP_CHIP]_ID to zero in image Change-Id: I3f30bc81a986872c2e7f47422b96bf7bf7c59b06 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37261 Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37776 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update backing build and add CMVC pre-reqSachin Gupta2017-05-271-1/+1
| | | | | | | | | Change-Id: Iabe54cd27cebde5549de10d673b7a6d9b6fcbe45 CMVC-Prereq: 1025116 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41071 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PUTRING: Bug fix for termination handling in override pathPrasad Bg Ranganath2017-05-263-2/+12
| | | | | | | | | | | | | | | Change-Id: Ice8dbb4bad109f3fb99cda98024264176d455cf8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40682 Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40683 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Enablement of support for Stumped and Cmsk ringsSumit Kumar2017-05-255-93/+207
| | | | | | | | | | | | | | | | | | | | | | - Currently its enabled for ec_func ring only - Introduced new function read_scan_data_care_ring() to read scan data & care bits for rings - Updated scan address for cmsk ring - Both ec_func's stumped and cmsk rs4 rings treated as non-overrides Change-Id: Id684ecb68d987f6ecd3f2e0476ab9aa2adce338f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38788 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38791 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Enter dump state on MPIPL failurespashabk-in2017-05-252-12/+7
| | | | | | | | | | | | | Transition to dump state on enter/continue mpipl chip-op failures Allow cntl instruction, putscom in mpipl state to support termination flows during mpipl Change-Id: I54e1373878a946d5886384f6d8609bbb6629ae7a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40903 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* Modify ppe trace prefix to have same trace hash for DD1 and DD2spashabk-in2017-05-251-1/+1
| | | | | | | | | Change-Id: Ic8b7223b7de6b22fe42b12e9208f0fac7a36cfe9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40263 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
* H-code ddLevel support: Bridging front-end to back-end.Martin Peschke2017-05-252-11/+81
| | | | | | | | | | | | | | | | | | Further add a small update to xip_image.C to clear the ddSupport field in XipSection upon deleting a section. Change-Id: I5a0aa28ac209d8d31a1e30a75389910da366c5f6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40046 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40476 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_mcs_setup/p9_revert_sbe_mcs_setup -- add support for CumulusPeng Fei GOU2017-05-251-2/+69
| | | | | | | | | | | | | | | | | 1) Things are mostly copied from Nimbus to Cumulus. 2) Bit 5 of MCFIR is ignore by Cumulus. Change-Id: If14f66997d410d581746dd78db8ac3498aeb09ba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39482 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39489 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Updated memory DD1 vs DD2 attributeStephen Glancy2017-05-251-2/+2
| | | | | | | | | | | | | | | | | Change-Id: Ie6d0f188a2ce94375535b0bf16c8ed1756558e5f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40632 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40635 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L3 update -- p9_sbe_scominitJoe McGill2017-05-253-31/+60
| | | | | | | | | | | | | | | | replace locally defined bit field constants with SCOM address header content add FFDC, code callouts for all errors Change-Id: I41d242a173bef2a3bf7a545ad9878b01a9376768 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40363 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40365 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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