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-rwxr-xr-xsrc/test/testcases/test.xml5
-rw-r--r--src/test/testcases/testIstep.xml6
2 files changed, 6 insertions, 5 deletions
diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml
index 8cc9842e..d1bb92c9 100755
--- a/src/test/testcases/test.xml
+++ b/src/test/testcases/test.xml
@@ -41,6 +41,11 @@
<include>../simics/targets/p9_nimbus/sbeTest/testAduMem.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testPSUSetFFDCAddr.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testSram.xml</include>
+ <!-- we want to start hostboot after our memory testcases -->
+ <testcase>
+ <simcmd>sbe-istep 5 2</simcmd>
+ <exitonerror>yes</exitonerror>
+ </testcase>
<!-- TODO add testCntlInstruction.xml -->
<include>../simics/targets/p9_nimbus/sbeTest/testRegAccess.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testFifoReset.xml</include>
diff --git a/src/test/testcases/testIstep.xml b/src/test/testcases/testIstep.xml
index 00362545..858414e2 100644
--- a/src/test/testcases/testIstep.xml
+++ b/src/test/testcases/testIstep.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2017 -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2018 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -317,10 +317,6 @@
<simcmd>sbe-istep 5 1</simcmd>
<exitonerror>yes</exitonerror>
</testcase>
- <testcase>
- <simcmd>sbe-istep 5 2</simcmd>
- <exitonerror>yes</exitonerror>
- </testcase>
<!-- Stash address test case -->
<testcase>
<simcmd>run-python-file targets/p9_nimbus/sbeTest/testMatchStashPair.py</simcmd>
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