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-rw-r--r--src/test/testcases/testMemUtil.py12
-rw-r--r--src/test/testcases/testPSUUtil.py53
-rw-r--r--src/test/testcases/testUnsecureMemRegions.py14
3 files changed, 34 insertions, 45 deletions
diff --git a/src/test/testcases/testMemUtil.py b/src/test/testcases/testMemUtil.py
index ea987fef..b73a5f39 100644
--- a/src/test/testcases/testMemUtil.py
+++ b/src/test/testcases/testMemUtil.py
@@ -31,6 +31,8 @@ import testRegistry as reg
import testUtil
err = False
+RUN_CYCLES = 1
+
def gethalfword(dataInInt):
hex_string = '0'*(4-len(str(hex(dataInInt))[2:])) + str(hex(dataInInt))[2:]
return list(struct.unpack('<BB',hex_string.decode('hex')))
@@ -77,7 +79,7 @@ def putmem(addr, data, flags, ecc=0):
+ data)
testUtil.writeUsFifo(req)
testUtil.writeEot( )
- testUtil.runCycles( 10000000 )
+ testUtil.runCycles( RUN_CYCLES )
if(flags & 0x0008):
lenInBytes += int(len(data)/8)
if(flags & 0x0010):
@@ -108,7 +110,7 @@ def putmem_failure(addr, data, flags, responseWord, ecc=0):
+ data)
testUtil.writeUsFifo(req)
testUtil.writeEot( )
- testUtil.runCycles( 10000000 )
+ testUtil.runCycles( RUN_CYCLES )
expResp = ([0x0, 0x0, 0x0, 0x0]
+ [0xc0,0xde,0xa4,0x02]
+ getsingleword(responseWord)
@@ -117,7 +119,7 @@ def putmem_failure(addr, data, flags, responseWord, ecc=0):
testUtil.readEot( )
def getmem(addr, len, flags):
- testUtil.runCycles( 10000000 )
+ testUtil.runCycles( RUN_CYCLES )
req = (getsingleword(6)
+ [0, 0, 0xA4, 0x01]
+ getsingleword(flags)
@@ -150,7 +152,7 @@ def getmem(addr, len, flags):
return data[:lenExp]
def getmem_failure(addr, len, flags, responseWord, withLen = True):
- testUtil.runCycles( 10000000 )
+ testUtil.runCycles( RUN_CYCLES )
req = (getsingleword(6)
+ [0, 0, 0xA4, 0x01]
+ getsingleword(flags)
@@ -169,7 +171,7 @@ def getmem_failure(addr, len, flags, responseWord, withLen = True):
testUtil.readEot( )
def setUnsecureMemRegion(addr, size, controlFlag, responseWord):
- testUtil.runCycles( 10000000 )
+ testUtil.runCycles( RUN_CYCLES )
req = (["write", reg.REG_MBOX0,"0"*(8-len(hex(controlFlag).split('0x')[-1]))+hex(controlFlag).split('0x')[-1] +"00F0D601", 8, "None", "Writing to MBOX0 address"],
["write", reg.REG_MBOX1, "0"*(16-len(hex(size).split('0x')[-1]))+hex(size).split('0x')[-1], 8, "None", "Writing to MBOX1 address"],
["write", reg.REG_MBOX2, "0"*(16-len(hex(addr).split('0x')[-1]))+hex(addr).split('0x')[-1], 8, "None", "Writing to MBOX1 address"],
diff --git a/src/test/testcases/testPSUUtil.py b/src/test/testcases/testPSUUtil.py
index 6b814701..553f5ca1 100644
--- a/src/test/testcases/testPSUUtil.py
+++ b/src/test/testcases/testPSUUtil.py
@@ -6,7 +6,7 @@
#
# OpenPOWER sbe Project
#
-# Contributors Listed Below - COPYRIGHT 2016,2017
+# Contributors Listed Below - COPYRIGHT 2016,2018
# [+] International Business Machines Corp.
#
#
@@ -113,9 +113,9 @@ class registry(object):
address = self.regAddr
value = self.stringToByte(self.regVal)
size = self.regSize
- print " WData : 0x%s -> Byte Data %s"% (self.regVal,value)
- print " Addr :", hex(address)
- print " Size : %s Bytes"% size
+# print " WData : 0x%s -> Byte Data %s"% (self.regVal,value)
+# print " Addr :", hex(address)
+# print " Size : %s Bytes"% size
self.__write(objType,address,value,size)
return
@@ -130,8 +130,8 @@ class registry(object):
size = 8
for i in range (entryCount):
value = stringToByte(data[i])
- print "\n Writting ", hex(REGDATA_SBE[i])
- print " %x %x %x %x %x %x %x %x" % (value[0],value[1],value[2],value[3],value[4],value[5],value[6],value[7])
+# print "\n Writting ", hex(REGDATA_SBE[i])
+# print " %x %x %x %x %x %x %x %x" % (value[0],value[1],value[2],value[3],value[4],value[5],value[6],value[7])
simObj.write(None, REGDATA_SBE[regIndex],
(value[0],value[1],value[2],value[3],value[4],value[5],value[6],value[7]),
size)
@@ -161,10 +161,10 @@ class registry(object):
address = self.regAddr
size = self.regSize
value = self.regVal
- if int(value) !=0:
- print " RData :", value
- print " Addr :", hex(address)
- print " Size : %s Bytes"% size
+# if int(value) !=0:
+# print " RData :", value
+# print " Addr :", hex(address)
+# print " Size : %s Bytes"% size
value = self.__read(objType,address,size)
return value
@@ -181,20 +181,20 @@ class registry(object):
value = self.regVal # Max lentgth it should read
MaxAddr = address + value # This is the addres range it could read
- print " MaxAddr Range:",hex(MaxAddr)
+# print " MaxAddr Range:",hex(MaxAddr)
OffsetAddr = address
- print " OffsetAddr:",hex(OffsetAddr)
+# print " OffsetAddr:",hex(OffsetAddr)
- print " Memory Entries to be read : %d" % (value/8)
- print " Match Magic Number : ", magicNum
+# print " Memory Entries to be read : %d" % (value/8)
+# print " Match Magic Number : ", magicNum
while ( OffsetAddr <= MaxAddr):
sim_data = self.__read(objType,OffsetAddr,size)
- print " ", hex(OffsetAddr),self.joinListDataToHex(sim_data).upper()
+# print " ", hex(OffsetAddr),self.joinListDataToHex(sim_data).upper()
OffsetAddr += 8
if self.validateTestMemOp(sim_data,magicNum) == True:
- print " Test validated .. [ OK ]"
+# print " Test validated .. [ OK ]"
return SUCCESS
return FAILURE # Failed validation
@@ -251,8 +251,8 @@ class registry(object):
#--------------------------------------------
for l_params in test_bucket:
#--------------------------------------------
- print " Desc : %s " % l_params[5]
- print " Op : %s " % l_params[0]
+# print " Desc : %s " % l_params[5]
+# print " Op : %s " % l_params[0]
if "func" == l_params[0]:
print " Func : %s " % l_params[1]
if l_params[4] != "None":
@@ -269,9 +269,6 @@ class registry(object):
# ---------------------------------------------
if "read" == l_params[0]:
sim_data = self.readFromReg(testOp)
- print " ++++++++++++++++++++++++++++++++++++++++++"
- print " simics Data : ", sim_data
- print " simics Hex : ", self.joinListDataToHex(sim_data).upper()
# Validate the test data
'''
@@ -282,11 +279,14 @@ class registry(object):
if self.validateTestOp(sim_data,l_params[4]) == True:
print " Test validated .. [ OK ]"
else:
+ print " ++++++++++++++++++++++++++++++++++++++++++"
+ print " simics Data : ", sim_data
+ print " simics Hex : ", self.joinListDataToHex(sim_data).upper()
if(raiseException == True):
raise Exception('Data mistmach');
return FAILURE # Failed validation
- else:
- print " ++++++++++++++++++++++++++++++++++++++++++"
+# else:
+# print " ++++++++++++++++++++++++++++++++++++++++++"
elif "write" == l_params[0]:
self.writeToReg(testOp)
elif "memRead" == l_params[0]:
@@ -351,13 +351,10 @@ class registry(object):
def pollingOn(self, simObj, test_data, retries=20):
for l_param in test_data:
while True:
- print "\n***** Polling On result - retrials left [%d] " % retries
- print "\n"
testUtil.runCycles( 1000000);
test_d = (l_param,)
rc = self.ExecuteTestOp(simObj, test_d, False)
if rc == SUCCESS:
- print ('Polling Successful for - ' + l_param[5])
break
elif retries <= 0:
print " Retrials exhausted... Exiting polling"
@@ -365,6 +362,10 @@ class registry(object):
break
else:
retries = retries - 1
+
+ # TODO: cleanup this handling
+ test_data = (["write", test_data[0][1], "0000000000000000" ,8, None, "Reading Host Doorbell for Interrupt"],)
+ self.ExecuteTestOp(simObj, test_data)
return SUCCESS
#----------------------------------------------------
diff --git a/src/test/testcases/testUnsecureMemRegions.py b/src/test/testcases/testUnsecureMemRegions.py
index e0445b47..a3c19cd7 100644
--- a/src/test/testcases/testUnsecureMemRegions.py
+++ b/src/test/testcases/testUnsecureMemRegions.py
@@ -163,30 +163,20 @@ def main():
# Test case 11: access memory spanning across two windows
testcase = 11
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x40, 0x0111, 0)
- testUtil.runCycles(100000)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x80, 0x40, 0x0111, 0)
- testUtil.runCycles(100000)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0xC0, 0x40, 0x0111, 0)
- testUtil.runCycles(1000000)
# start and end on edges
testMemProcUtil.getmem(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x80, 0xA5)
- testUtil.runCycles(100000)
# start in between and end on edge
testMemProcUtil.getmem(MEM_WINDOWS_BASE_ADDRESS+0x60, 0x60, 0xA5)
- testUtil.runCycles(100000)
# start on edge and end in between
testMemProcUtil.getmem(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x60, 0xA5)
- testUtil.runCycles(100000)
# start on edge and end in between - 3rd window
testMemProcUtil.getmem(MEM_WINDOWS_BASE_ADDRESS+0x40, 0xA0, 0xA5)
- testUtil.runCycles(100000)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x40, 0x0120, 0)
- testUtil.runCycles(100000)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x80, 0x40, 0x0120, 0)
- testUtil.runCycles(100000)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0xC0, 0x40, 0x0120, 0)
- testUtil.runCycles(100000)
# Test case 12: read access in read-write window - ADU
testcase = 12
@@ -211,16 +201,12 @@ def main():
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x80, 128, 0x0120, 0)
# Test case 16: access memory for which a partial window is open
testcase = 16
- testUtil.runCycles(1000000)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x30, 0x0111, 0)
# start in between and end outside
- testUtil.runCycles(1000000)
testMemProcUtil.getmem_failure(MEM_WINDOWS_BASE_ADDRESS+0x60, 0x40, 0xA5, 0x00050014)
# start on edge and end outside
- testUtil.runCycles(1000000)
testMemProcUtil.getmem_failure(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x40, 0xA5, 0x00050014)
# start and end within
- testUtil.runCycles(1000000)
testMemProcUtil.getmem(MEM_WINDOWS_BASE_ADDRESS+0x50, 0x10, 0xA5)
testMemProcUtil.setUnsecureMemRegion(MEM_WINDOWS_BASE_ADDRESS+0x40, 0x30, 0x0120, 0)
#-------------------------------------------------
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