diff options
Diffstat (limited to 'src/test/testcases')
-rwxr-xr-x | src/test/testcases/test.xml | 1 | ||||
-rw-r--r-- | src/test/testcases/testPSUGetCapabilities.py | 4 | ||||
-rw-r--r-- | src/test/testcases/testSecurityListDump.py | 103 | ||||
-rwxr-xr-x | src/test/testcases/testSecurityListDump.xml | 30 |
4 files changed, 136 insertions, 2 deletions
diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml index c71e459b..e7b54cac 100755 --- a/src/test/testcases/test.xml +++ b/src/test/testcases/test.xml @@ -57,6 +57,7 @@ <include>../simics/targets/p9_nimbus/sbeTest/testRegAccess.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testFifoReset.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testSystemFabricMap.xml</include> + <include>../simics/targets/p9_nimbus/sbeTest/testSecurityListDump.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testExecutorCntrlTimer.xml</include> <!-- temporarily disable in preparation for an update to the trace bus IDs <include>../simics/targets/p9_nimbus/sbeTest/testArrayAccess.xml</include> --> <include>../simics/targets/p9_nimbus/sbeTest/testSecurity.xml</include> diff --git a/src/test/testcases/testPSUGetCapabilities.py b/src/test/testcases/testPSUGetCapabilities.py index 6fc53c21..922eb80e 100644 --- a/src/test/testcases/testPSUGetCapabilities.py +++ b/src/test/testcases/testPSUGetCapabilities.py @@ -5,7 +5,7 @@ # # OpenPOWER sbe Project # -# Contributors Listed Below - COPYRIGHT 2017,2018 +# Contributors Listed Below - COPYRIGHT 2017,2019 # [+] International Business Machines Corp. # # @@ -60,7 +60,7 @@ capMsg = (getsingleword(0xC000003F) + getsingleword(0xD5800000) + getsingleword(0xD6000001) + getsingleword(0xD6800000) + - getsingleword(0xD700007E) + + getsingleword(0xD70000FE) + getsingleword(0xD7800000)) def getCapabilities(addr, size, exp_status): diff --git a/src/test/testcases/testSecurityListDump.py b/src/test/testcases/testSecurityListDump.py new file mode 100644 index 00000000..fb529b5a --- /dev/null +++ b/src/test/testcases/testSecurityListDump.py @@ -0,0 +1,103 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/test/testcases/testSecurityListDump.py $ +# +# OpenPOWER sbe Project +# +# Contributors Listed Below - COPYRIGHT 2019 +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +import testPSUUtil +import testRegistry as reg +import testUtil + +#------------------------------- +# This is a Test Data +#------------------------------- +''' +This data are the values or strings that needs to be validated for the test. +''' + +sbe_test_data = ( + #----------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #----------------------------------------------------------------------------------------------------- + ["write", reg.REG_MBOX0, "0000010000F0D708", 8, "None", "Writing to MBOX0 address"], + ["write", reg.REG_MBOX1, "0000000008000000", 8, "None", "Writing to MBOX1 address"], + ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"], + ) +''' +#--------------------- +# Host side test data - SUCCESS +#--------------------- +''' +host_test_data_success = ( + #---------------------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #---------------------------------------------------------------------------------------------------------------- + ["read", reg.REG_MBOX4, "0", 8, "0000000000F0D708", "Reading Host MBOX4 data to Validate"], + ) + +''' +#----------------------------------------------------------------------- +# Do not modify - Used to simulate interrupt on Ringing Doorbell on Host +#----------------------------------------------------------------------- +''' +host_polling_data = ( + #---------------------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #---------------------------------------------------------------------------------------------------------------- + ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR, "0", 8, "8000000000000000", "Reading Host Doorbell for Interrupt"], + ) + +#------------------------- +# Main Function +#------------------------- +def main(): + # Run Simics initially + testUtil.runCycles( 10000000 ); + + # Intialize the class obj instances + regObj = testPSUUtil.registry() # Registry obj def for operation + + testUtil.runCycles( 1000000 ); + print "\n Execute SBE Test [ System Fabric Map ] ...\n" + + ''' + Test Case 1 + ''' + # HOST->SBE data set execution + regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data ) + + print "\n Poll on Host side for INTR ...\n" + #Poll on HOST DoorBell Register for interrupt + regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 ) + + #SBE->HOST data set execution + regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success ) + + +if __name__ == "__main__": + main() + if err: + print ( "\nTest Suite completed with error(s)" ) + #sys.exit(1) + else: + print ( "\nTest Suite completed with no errors" ) + #sys.exit(0); + + diff --git a/src/test/testcases/testSecurityListDump.xml b/src/test/testcases/testSecurityListDump.xml new file mode 100755 index 00000000..b135b582 --- /dev/null +++ b/src/test/testcases/testSecurityListDump.xml @@ -0,0 +1,30 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/test/testcases/testSecurityListDump.xml $ --> +<!-- --> +<!-- OpenPOWER sbe Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2019 --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<?xml version="1.0" encoding="UTF-8"?> + + <testcase> + <simcmd>run-python-file targets/p9_nimbus/sbeTest/testSecurityListDump.py</simcmd> + <exitonerror>yes</exitonerror> + </testcase> + |