diff options
Diffstat (limited to 'src/test/testcases/testAduMem_withEccItag.py')
| -rw-r--r-- | src/test/testcases/testAduMem_withEccItag.py | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/test/testcases/testAduMem_withEccItag.py b/src/test/testcases/testAduMem_withEccItag.py index 27740483..53b34042 100644 --- a/src/test/testcases/testAduMem_withEccItag.py +++ b/src/test/testcases/testAduMem_withEccItag.py @@ -22,6 +22,7 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG +from __future__ import print_function import sys sys.path.append("targets/p9_nimbus/sbeTest" ) sys.path.append("targets/p9_axone/sbeTest" ) @@ -45,8 +46,8 @@ def main( ): if(data == readData): print ("Success - Write-Read ADU with ECC,Itag") else: - print data - print readData + print(data) + print(readData) raise Exception('data mistmach') # Partial Write test @@ -60,10 +61,10 @@ def main( ): if(sandwichData == readBackData): print ("Success - Write_Part-Read ADU with ECC,Itag") else: - print readData - print data - print readBackData - print sandwichData + print(readData) + print(data) + print(readBackData) + print(sandwichData) raise Exception('data mistmach') #------------------------------------------------- # Calling all test code |
