diff options
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rwxr-xr-x | src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.C | 115 | ||||
| -rwxr-xr-x | src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.H | 23 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C | 184 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.H | 55 |
4 files changed, 170 insertions, 207 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.C b/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.C index 19d96483..dc435895 100755 --- a/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,50 +22,29 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + /// /// @file p9_l2_flush.H /// @brief Flush the P9 L2 cache (FAPI) /// /// *HWP HWP Owner : Benjamin Gass <bgass@us.ibm.com> -/// *HWP FW Owner : Bilicon Patil <bilpatil@in.ibm.com> +/// *HWP FW Owner : Thi Tran <thi@us.ibm.com> /// *HWP Team : Quad -/// *HWP Consumed by : FSP -/// *HWP Level : 2 +/// *HWP Consumed by : FSP and SBE +/// *HWP Level : 3 /// //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ -#include <p9_quad_scom_addresses.H> #include <p9_l2_flush.H> +#include <p9_quad_scom_addresses.H> +#include <p9_quad_scom_addresses_fld.H> //------------------------------------------------------------------------------ // Constant definitions //------------------------------------------------------------------------------ -// L2 Purge Engine Command Register bit/field definitions -enum -{ - PURGE_CMD_TRIGGER_BIT = 0, - PURGE_CMD_REG_BUSY = 9, - PURGE_CMD_PRGSM_BUSY_ON_THIS_BIT = 10, - PURGE_CMD_PRGSM_BUSY_BIT = 11, - PURGE_CMD_ERR_BIT = 29, - PURGE_CMD_TYPE_BIT = 1, - PURGE_CMD_MEM_BIT = 17, - PURGE_CMD_BANK_BIT = 28, - PURGE_CMD_CGC_BIT = 20 -}; - -// L2 Purge Engine Command Register bit/field Lengths -enum -{ - PURGE_CMD_TYPE_BIT_LENGTH = 4, - PURGE_CMD_MEM_BIT_LENGTH = 3, - PURGE_CMD_BANK_BIT_LENGTH = 1, - PURGE_CMD_CGC_BIT_LENGTH = 8 -}; - // polling constants enum { @@ -78,19 +57,19 @@ enum // Function definitions //------------------------------------------------------------------------------ -//------------------------------------------------------------------------------ +///----------------------------------------------------------------------------- +/// @brief Utility subroutine to initiate L2 cache flush via purge engine. /// -/// @brief l2_flush_start: Utility subroutine to initiate L2 cache flush -/// via purge engine -/// @param[in] i_target Ex target -/// @param[in] i_regAddr The scom address to use +/// @param[in] i_target EX target +/// @param[in] i_regAddr The scom address to use /// @param[in] i_purgeData Structure having values for MEM, CGC, BANK /// passed by the user +/// /// @return FAPI2_RC_SUCCESS if purge operation was started, /// RC_P9_L2_FLUSH_PURGE_REQ_OUTSTANDING if a prior purge /// operation has not yet completed /// else FAPI getscom/putscom return code for failing operation -//------------------------------------------------------------------------------ +///----------------------------------------------------------------------------- fapi2::ReturnCode l2_flush_start( const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, const uint32_t i_regAddr, @@ -99,7 +78,7 @@ fapi2::ReturnCode l2_flush_start( fapi2::buffer<uint64_t> l_cmdReg; fapi2::buffer<uint64_t> l_purgeCmd; - FAPI_INF("l2_flush_start: Enter"); + FAPI_DBG("l2_flush_start: Enter"); // ensure that purge engine is idle before starting flush // poll Purge Engine status @@ -107,7 +86,7 @@ fapi2::ReturnCode l2_flush_start( FAPI_TRY(fapi2::getScom(i_target, i_regAddr, l_cmdReg)); // check to see if this reg is idle and ready to accept a new command - FAPI_ASSERT(!l_cmdReg.getBit<PURGE_CMD_REG_BUSY>(), + FAPI_ASSERT(!l_cmdReg.getBit<EX_PRD_PURGE_CMD_REG_BUSY>(), fapi2::P9_L2_FLUSH_PURGE_REQ_OUTSTANDING() .set_TARGET(i_target) .set_CMD_REG(l_cmdReg) @@ -118,34 +97,33 @@ fapi2::ReturnCode l2_flush_start( // ensure PURGE_CMD_TYPE/MEM/CGC/BANK are clear to specify flush // of entire cache FAPI_DBG("Write L2 Purge Engine Command Register to initiate cache flush"); - l_purgeCmd.insert<PURGE_CMD_TYPE_BIT, - PURGE_CMD_TYPE_BIT_LENGTH>(i_purgeData.iv_cmdType); + l_purgeCmd.insert<EX_PRD_PURGE_CMD_REG_TYPE, + EX_PRD_PURGE_CMD_REG_TYPE_LEN>(i_purgeData.iv_cmdType); - l_purgeCmd.insert<PURGE_CMD_MEM_BIT, - PURGE_CMD_MEM_BIT_LENGTH>(i_purgeData.iv_cmdMem); + l_purgeCmd.insert<EX_PRD_PURGE_CMD_REG_MEM, + EX_PRD_PURGE_CMD_REG_MEM_LEN>(i_purgeData.iv_cmdMem); - l_purgeCmd.insert<PURGE_CMD_BANK_BIT, - PURGE_CMD_BANK_BIT_LENGTH>(i_purgeData.iv_cmdBank); + l_purgeCmd.insert<EX_PRD_PURGE_CMD_REG_BANK, 1>(i_purgeData.iv_cmdBank); - l_purgeCmd.insert<PURGE_CMD_CGC_BIT, - PURGE_CMD_CGC_BIT_LENGTH>(i_purgeData.iv_cmdCGC); + l_purgeCmd.insert<EX_PRD_PURGE_CMD_REG_CGC, + EQ_PRD_PURGE_CMD_REG_CGC_LEN>(i_purgeData.iv_cmdCGC); - l_purgeCmd.setBit<PURGE_CMD_TRIGGER_BIT>(); + l_purgeCmd.setBit<EX_PRD_PURGE_CMD_REG_TRIGGER>(); FAPI_TRY(fapi2::putScom(i_target, i_regAddr, l_purgeCmd)); fapi_try_exit: + FAPI_DBG("l2_flush_start: Exit"); return fapi2::current_err; } - -//------------------------------------------------------------------------------ +///----------------------------------------------------------------------------- +/// @brief Utility subroutine to poll L2 purge engine status, looking for +/// clean idle state. /// -/// @brief l2_flush_check_status: Utility subroutine to poll L2 purge -/// engine status, looking for clean idle -/// state /// @param[in] i_target EX chiplet target /// @param[in] i_regAddr Purge engine register SCOM address +/// /// @return FAPI2_RC_SUCCESS if engine status returns as idle (with no errors) /// before maximum number of polls has been reached /// RC_P9_L2_FLUSH_CMD_ERROR @@ -153,8 +131,7 @@ fapi_try_exit: /// RC_P9_L2_FLUSH_CMD_TIMEOUT /// if purge operation did not complete prior to polling limit, /// else FAPI getscom/putscom return code for failing operation -/// -//------------------------------------------------------------------------------ +///----------------------------------------------------------------------------- fapi2::ReturnCode l2_flush_check_status( const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, const uint32_t i_regAddr) @@ -162,7 +139,7 @@ fapi2::ReturnCode l2_flush_check_status( fapi2::buffer<uint64_t> l_cmdReg; uint32_t l_polls = 1; - FAPI_INF("l2_flush_check_status: Enter"); + FAPI_DBG("l2_flush_check_status: Enter"); while(1) { @@ -171,15 +148,15 @@ fapi2::ReturnCode l2_flush_check_status( FAPI_TRY(fapi2::getScom(i_target, i_regAddr, l_cmdReg)); // check state of PURGE_CMD_ERR - FAPI_ASSERT(!l_cmdReg.getBit<PURGE_CMD_ERR_BIT>(), + FAPI_ASSERT(!l_cmdReg.getBit<EX_PRD_PURGE_CMD_REG_ERR>(), fapi2::P9_L2_FLUSH_CMD_ERROR() .set_TARGET(i_target) .set_CMD_REG(l_cmdReg) .set_CMD_REG_ADDR(i_regAddr), - "Purge failed. PURGE_CMD_ERR_BIT set"); + "Purge failed. EX_PRD_PURGE_CMD_REG_ERR set"); // check to see if this reg is idle and ready to accept a new command - if (!l_cmdReg.getBit<PURGE_CMD_REG_BUSY>()) + if (!l_cmdReg.getBit<EX_PRD_PURGE_CMD_REG_BUSY>()) { FAPI_DBG("Purge engine idle"); break; @@ -188,9 +165,9 @@ fapi2::ReturnCode l2_flush_check_status( // engine busy, dump status FAPI_DBG("Purge engine busy (reg_busy = %d, busy_on_this = %d," " sm_busy = %d)", - l_cmdReg.getBit<PURGE_CMD_REG_BUSY>(), - l_cmdReg.getBit<PURGE_CMD_PRGSM_BUSY_ON_THIS_BIT>(), - l_cmdReg.getBit<PURGE_CMD_PRGSM_BUSY_BIT>()); + l_cmdReg.getBit<EX_PRD_PURGE_CMD_REG_BUSY>(), + l_cmdReg.getBit<EX_PRD_PURGE_CMD_REG_PRGSM_BUSY_ON_THIS>(), + l_cmdReg.getBit<EX_PRD_PURGE_CMD_REG_PRGSM_BUSY>()); // check if loop count has expired FAPI_ASSERT((l_polls < P9_L2_FLUSH_MAX_POLLS), @@ -205,26 +182,28 @@ fapi2::ReturnCode l2_flush_check_status( FAPI_DBG("%d loops done, delaying before next poll", l_polls); FAPI_TRY(fapi2::delay(P9_L2_FLUSH_HW_NS_DELAY, - P9_L2_FLUSH_SIM_CYCLE_DELAY), - "fapi delay Error"); + P9_L2_FLUSH_SIM_CYCLE_DELAY)); l_polls++; } fapi_try_exit: + FAPI_DBG("l2_flush_check_status: Exit"); return fapi2::current_err; } //------------------------------------------------------------------------------ // Hardware Procedure +// See doxygen in header file. //------------------------------------------------------------------------------ -fapi2::ReturnCode p9_l2_flush(const fapi2::Target < fapi2::TARGET_TYPE_EX > - & i_target, - const p9core::purgeData_t& i_purgeData) +fapi2::ReturnCode p9_l2_flush( + const fapi2::Target <fapi2::TARGET_TYPE_EX>& i_target, + const p9core::purgeData_t& i_purgeData) { - FAPI_DBG("i_purgeData [iv_cmdType: 0x%x] [iv_cmdMem : 0x%x] " - "[iv_cmdBank: 0x%x] [iv_cmdCGC : 0x%x]", i_purgeData.iv_cmdType, - i_purgeData.iv_cmdMem, i_purgeData.iv_cmdBank, i_purgeData.iv_cmdCGC); + FAPI_DBG("Entering p9_l2_flush: i_purgeData [iv_cmdType: 0x%x] " + "[iv_cmdMem : 0x%x] [iv_cmdBank: 0x%x] [iv_cmdCGC : 0x%x]", + i_purgeData.iv_cmdType, i_purgeData.iv_cmdMem, + i_purgeData.iv_cmdBank, i_purgeData.iv_cmdCGC); uint32_t l_regAddr = EX_PRD_PURGE_CMD_REG; @@ -236,7 +215,7 @@ fapi2::ReturnCode p9_l2_flush(const fapi2::Target < fapi2::TARGET_TYPE_EX > FAPI_TRY(l2_flush_check_status(i_target, l_regAddr)); fapi_try_exit: - FAPI_INF("l2_flush, Ex: Exit"); + FAPI_DBG("p9_l2_flush: Exit"); return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.H b/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.H index 35738cc6..a54ad639 100755 --- a/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_l2_flush.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,15 +22,16 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + /// /// @file p9_l2_flush.H /// @brief Flush the P9 L2 cache (FAPI) /// /// *HWP HWP Owner : Benjamin Gass <bgass@us.ibm.com> -/// *HWP FW Owner : Bilicon Patil <bilpatil@in.ibm.com> +/// *HWP FW Owner : Thi Tran <thi@us.ibm.com> /// *HWP Team : Quad -/// *HWP Consumed by : FSP -/// *HWP Level : 2 +/// *HWP Consumed by : FSP and SBE +/// *HWP Level : 3 /// /// Procedure Additional Comments: /// @@ -60,9 +61,8 @@ #include <fapi2.H> //------------------------------------------------------------------------------ -// Constants +// Structure definitions //------------------------------------------------------------------------------ - namespace p9core { @@ -84,13 +84,8 @@ struct purgeData_t } // end of p9core namespace //------------------------------------------------------------------------------ -// Structure definitions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ // Function prototypes //------------------------------------------------------------------------------ - typedef fapi2::ReturnCode (*p9_l2_flush_FP_t) (const fapi2::Target < fapi2::TARGET_TYPE_EX >& i_target, const p9core::purgeData_t& i_purgeData); @@ -99,12 +94,10 @@ extern "C" { /// -/// @brief p9_l2_flush HWP to flush entire content of L2 cache via purge engine -/// @param[in] i_target Ex target +/// @brief Flush entire content of L2 cache via purge engine +/// @param[in] i_target EX target /// @param[in] i_purgeData Specifies a particular purge type /// @return: FAPI2_RC_SUCCESS if purge operation completes successfully, -/// RC_P9_L2_FLUSH_UNKNOWN_PLATFORM -/// if executed on unsupported platform, /// RC_P9_L2_FLUSH_PURGE_REQ_OUTSTANDING /// if called when existing L2 purge is in progress, /// RC_P9_L2_FLUSH_CMD_TIMEOUT diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C b/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C index e7ba964f..6a9346f3 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C @@ -22,20 +22,18 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -//-------------------------------------------------------------------------- -// -// + +///----------------------------------------------------------------------------- +/// /// @file p9_l3_flush.C -/// @brief Initiates an L3 purge request and spins until completion +/// @brief Initiates an L3 purge request /// -// *HWP HWP Owner Christina Graves clgraves@us.ibm.com -// *HWP FW Owner: Thi Tran thi@us.ibm.com -// *HWP Team: Nest -// *HWP Level: 2 -// *HWP Consumed by: HB -// -//-------------------------------------------------------------------------- - +/// *HWP HWP Owner: Benjamin Gass <bgass@us.ibm.com> +/// *HWP FW Owner: Thi Tran thi@us.ibm.com +/// *HWP Team: Nest +/// *HWP Level: 3 +/// *HWP Consumed by: FSP and SBE +/// ---------------------------------------------------------------------------- //-------------------------------------------------------------------------- // Includes @@ -44,102 +42,100 @@ #include <p9_quad_scom_addresses.H> #include <p9_quad_scom_addresses_fld.H> -extern "C" { - //-------------------------------------------------------------------------- // Constant definitions //-------------------------------------------------------------------------- -//L3 purge operation delay times for HW/sim - const uint32_t P9_L3_FLUSH_HW_NS_DELAY = 50000; - const uint32_t P9_L3_FLUSH_SIM_CYCLE_DELAY = 1000000; +// L3 purge operation delay times for HW/sim +const uint32_t P9_L3_FLUSH_HW_NS_DELAY = 50000; +const uint32_t P9_L3_FLUSH_SIM_CYCLE_DELAY = 1000000; -//If the L3 purge is not completed in P9_L3_FLUSH_TIMEOUT delays, fail with error - const uint32_t P9_L3_FLUSH_TIMEOUT_COUNT = 40; +// If the L3 purge is not completed in P9_L3_FLUSH_TIMEOUT delays, fail with error +const uint32_t P9_L3_FLUSH_TIMEOUT_COUNT = 40; //-------------------------------------------------------------------------- // HWP entry point //-------------------------------------------------------------------------- - fapi2::ReturnCode p9_l3_flush(const - fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, - const uint32_t i_purge_type, - const uint32_t i_purge_addr/*, - const uint32_t i_purge_member*/) - { - // mark HWP entry - FAPI_DBG("Entering ...\n"); - - fapi2::buffer<uint64_t> purge_reg_data(0x0); - uint32_t purge_pending_count = 0; - - //Make sure that the inputs are acceptable - //Make sure the purge type is full purge, single purge, single delete, full blind, or dynamic - //Make sure that the purge address fits withing bits 17:28 - FAPI_ASSERT(!((i_purge_type != L3_FULL_PURGE) && - (i_purge_type != L3_SINGLE_PURGE) && - (i_purge_type != L3_FULL_BLIND_PURGE) && - (i_purge_type != L3_DYNAMIC_PURGE)) && - (i_purge_addr < 0x1000) /*&& - (i_purge_member < 0x20) */ - , fapi2::P9_L3_FLUSH_INVALID_ARGS_ERR().set_TARGET(i_target).set_PURGETYPE(i_purge_type).set_PURGEADDR( - i_purge_addr)/*.set_PURGEMEMBER(i_purge_member)*/, "i_purge_type is not a compatible type"); - - //Make sure that another flush is not happening - FAPI_DBG("Verifying that a previous flush is not active"); - FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data), "Error reading from the PRD_PURGE_REG"); - FAPI_ASSERT(!(purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()), - fapi2::P9_L3_FLUSH_PREVIOUS_PURGE_ACTIVE_ERR().set_TARGET(i_target).set_PURGEREG(purge_reg_data), - "Previous Purge request has not completed error"); - - //Since there is no previous purge, build the purge request - - //Flush the data and sset the req bit to initiate the purge - purge_reg_data.flush<0>().setBit<EX_PRD_PURGE_REG_L3_REQ>(); - - //set the type of the purge - purge_reg_data.insertFromRight < EX_PRD_PURGE_REG_L3_TTYPE, - EX_PRD_PURGE_REG_L3_TTYPE_LEN > (i_purge_type); - - //set the address of where to start for the address - purge_reg_data.insertFromRight < EX_PRD_PURGE_REG_L3_DIR_ADDR, - EX_PRD_PURGE_REG_L3_DIR_ADDR_LEN> (i_purge_addr); - - /* - //set the member if singe line delete/purge - if ((i_purge_type == L3_SINGLE_PURGE) || (i_purge_type == L3_SINGLE_DELETE)) - { - purge_reg_data.insertFromRight<EX_PRD_PURGE_REG_L3_MEMBER, EX_PRD_PURGE_REG_L3_MEMBER_LEN>(i_purge_member); - }*/ - //Write the purge request - FAPI_TRY(fapi2::putScom(i_target, EX_PRD_PURGE_REG, purge_reg_data), "Error writing to the PRD_PURGE_REG"); - - //Spin on PRD_PURGE_REQ until hardware clears it - while(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT) - { - FAPI_DBG("Waiting for purge to complete..."); - - FAPI_TRY(fapi2::delay(P9_L3_FLUSH_HW_NS_DELAY, P9_L3_FLUSH_SIM_CYCLE_DELAY), "Error from P9 L3 flush delay"); +// TODO: RTC 177535 - Do we support SINGLE_PURGE/DELETE? +fapi2::ReturnCode p9_l3_flush( + const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, + const uint32_t i_purge_type, + const uint32_t i_purge_addr) +{ + // mark HWP entry + FAPI_DBG("Entering ...\n"); + + fapi2::buffer<uint64_t> purge_reg_data(0x0); + uint32_t purge_pending_count = 0; + + //Make sure that the inputs are acceptable + //Make sure the purge type is full purge, single purge, single delete, full blind, or dynamic + //Make sure that the purge address fits withing bits 17:28 + FAPI_ASSERT(!((i_purge_type != L3_FULL_PURGE) && + (i_purge_type != L3_SINGLE_PURGE) && + (i_purge_type != L3_FULL_BLIND_PURGE) && + (i_purge_type != L3_DYNAMIC_PURGE)) && + (i_purge_addr < 0x1000), + fapi2::P9_L3_FLUSH_INVALID_ARGS_ERR() + .set_TARGET(i_target) + .set_PURGETYPE(i_purge_type) + .set_PURGEADDR(i_purge_addr), + "i_purge_type is not a compatible type"); + + //Make sure that another flush is not happening + FAPI_DBG("Verifying that a previous flush is not active"); + FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data)); + FAPI_ASSERT(!(purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()), + fapi2::P9_L3_FLUSH_PREVIOUS_PURGE_ACTIVE_ERR() + .set_TARGET(i_target) + .set_PURGEREG(purge_reg_data), + "Previous Purge request has not completed error"); + + //Since there is no previous purge, build the purge request + + //Flush the data and set the req bit to initiate the purge + purge_reg_data.flush<0>().setBit<EX_PRD_PURGE_REG_L3_REQ>(); + + //set the type of the purge + purge_reg_data.insertFromRight<EX_PRD_PURGE_REG_L3_TTYPE, + EX_PRD_PURGE_REG_L3_TTYPE_LEN> (i_purge_type); + + //set the address of where to start for the address + purge_reg_data.insertFromRight<EX_PRD_PURGE_REG_L3_DIR_ADDR, + EX_PRD_PURGE_REG_L3_DIR_ADDR_LEN> (i_purge_addr); + + //Write the purge request + FAPI_TRY(fapi2::putScom(i_target, EX_PRD_PURGE_REG, purge_reg_data)); + + //Spin on PRD_PURGE_REQ until hardware clears it + while(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT) + { + FAPI_DBG("Waiting for purge to complete..."); - FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data), "Error reading from the PRD_PURGE_REG"); + FAPI_TRY(fapi2::delay(P9_L3_FLUSH_HW_NS_DELAY, + P9_L3_FLUSH_SIM_CYCLE_DELAY)); - if (!purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()) - { - FAPI_DBG("Purge complete!"); - break; - } + FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data)); - purge_pending_count++; + if (!purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()) + { + FAPI_DBG("Purge complete!"); + break; } - FAPI_ASSERT(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT, - fapi2::P9_L3_FLUSH_PURGE_REQ_TIMEOUT_ERR().set_TARGET(i_target).set_PURGETYPE(i_purge_type).set_PURGEADDR( - i_purge_addr)/*set_PURGEMEMBER(i_purge_member)*/, "Purge did not complete in time"); - - fapi_try_exit: - FAPI_DBG("Exiting..."); - return fapi2::current_err; + purge_pending_count++; } -} // extern "C" - + FAPI_ASSERT(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT, + fapi2::P9_L3_FLUSH_PURGE_REQ_TIMEOUT_ERR() + .set_TARGET(i_target) + .set_PURGETYPE(i_purge_type) + .set_PURGEADDR(i_purge_addr) + .set_EX_PRD_PURGE_REG_DATA(purge_reg_data), + "Purge did not complete in time."); + +fapi_try_exit: + FAPI_DBG("Exiting..."); + return fapi2::current_err; +} diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.H b/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.H index 80db8213..57183fe9 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,17 +22,18 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -//----------------------------------------------------------------------------------- + +///----------------------------------------------------------------------------- /// /// @file p9_l3_flush.H /// @brief Initiates an L3 purge request -// -// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com -// *HWP FW Owner: Thi Tran thi@us.ibm.com -// *HWP Team: Nest -// *HWP Level: 2 -// *HWP Consumed by: HB -// ---------------------------------------------------------------------------------- +/// +/// *HWP HWP Owner: Benjamin Gass <bgass@us.ibm.com> +/// *HWP FW Owner: Thi Tran thi@us.ibm.com +/// *HWP Team: Nest +/// *HWP Level: 3 +/// *HWP Consumed by: FSP and SBE +/// ---------------------------------------------------------------------------- #ifndef P9_L3_FLUSH_ #define P9_L3_FLUSH_ @@ -40,49 +41,43 @@ //------------------------------------------------------- // Includes //------------------------------------------------------- - #include <fapi2.H> -//------------------------------------------------------- -// Structure definitions -//------------------------------------------------------- - -//Function pointer typedef definition for HWP call support -typedef fapi2::ReturnCode -(*p9_l3_flush_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_EX>&, - const uint32_t, - const uint32_t); - - -//------------------------------------------------------- +//-------------------------------------------------------------------------- // Constant definitions -//------------------------------------------------------- - +//-------------------------------------------------------------------------- // L3 Purge ttype dials -const uint32_t L3_FULL_PURGE = 0; -const uint32_t L3_SINGLE_PURGE = 1; -const uint32_t L3_SINGLE_DELETE = 2; +const uint32_t L3_FULL_PURGE = 0; +const uint32_t L3_SINGLE_PURGE = 1; +const uint32_t L3_SINGLE_DELETE = 2; const uint32_t L3_FULL_BLIND_PURGE = 4; -const uint32_t L3_DYNAMIC_PURGE = 5; +const uint32_t L3_DYNAMIC_PURGE = 5; //-------------------------------------------------------- // Function prototypes //-------------------------------------------------------- +//Function pointer typedef definition for HWP call support +typedef fapi2::ReturnCode (*p9_l3_flush_FP_t) +(const fapi2::Target<fapi2::TARGET_TYPE_EX>&, + const uint32_t, + const uint32_t); extern "C" { /// @brief Initiates an L3 purge request and spins until completion +/// /// @param[in] i_target => EX chiplet target /// @param[in] i_purge_type => type of purge to execute /// @param[in] i_purge_addr => directory address to begin the purge -/// @return FAPI_RC_SUCCESS if the read/write completes successfully +/// +/// @return FAPI_RC_SUCCESS if the purge operation completes successfully +/// fapi2::ReturnCode p9_l3_flush( const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, const uint32_t i_purge_type, const uint32_t i_purge_addr); - }//extern "C" #endif //P9_L3_FLUSH_ |
