diff options
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C | 92 |
1 files changed, 46 insertions, 46 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C index 327e4fd1..e3a6c601 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -76,60 +76,60 @@ const uint64_t PERV_LFIR_ACTION0[15] = const uint64_t PERV_LFIR_ACTION1[15] = { - 0x8000000000000000ULL, // TP - 0x8000000000000000ULL, // N0 - 0x8000000000000000ULL, // N1 - 0x8000000000000000ULL, // N2 - 0x8000000000000000ULL, // N3 - 0x8000000000000000ULL, // X - 0x8000000000000000ULL, // MC0 - 0x8000000000000000ULL, // MC1 - 0x8000000000000000ULL, // OB0 - 0x8000000000000000ULL, // OB1 - 0x8000000000000000ULL, // OB2 - 0x8000000000000000ULL, // OB3 - 0x8000000000000000ULL, // PCI0 - 0x8000000000000000ULL, // PCI1 - 0x8000000000000000ULL // PCI2 + 0xF000000000000000ULL, // TP + 0xF000000000000000ULL, // N0 + 0xF000000000000000ULL, // N1 + 0xF000000000000000ULL, // N2 + 0xF000000000000000ULL, // N3 + 0xF000000000000000ULL, // X + 0xF000000000000000ULL, // MC0 + 0xF000000000000000ULL, // MC1 + 0xF000000000000000ULL, // OB0 + 0xF000000000000000ULL, // OB1 + 0xF000000000000000ULL, // OB2 + 0xF000000000000000ULL, // OB3 + 0xF000000000000000ULL, // PCI0 + 0xF000000000000000ULL, // PCI1 + 0xF000000000000000ULL // PCI2 }; const uint64_t PERV_LFIR_MASK[15] = { - 0xFFFFFFFFFFC00000ULL, // TP - 0xFFFFFFFFFFC00000ULL, // N0 - 0xFFFFFFFFFFC00000ULL, // N1 - 0xFFFFFFFFFFC00000ULL, // N2 - 0xFFFFFFFFFFC00000ULL, // N3 - 0xFFFFFFFFFFC00000ULL, // X - 0xFFFFFFFFFFC00000ULL, // MC0 - 0xFFFFFFFFFFC00000ULL, // MC1 - 0xFFFFFFFFFFC00000ULL, // OB0 - 0xFFFFFFFFFFC00000ULL, // OB1 - 0xFFFFFFFFFFC00000ULL, // OB2 - 0xFFFFFFFFFFC00000ULL, // OB3 - 0xFFFFFFFFFFC00000ULL, // PCI0 - 0xFFFFFFFFFFC00000ULL, // PCI1 - 0xFFFFFFFFFFC00000ULL // PCI2 + 0x0FFFBC2BFC400000ULL, // TP + 0x0FFFFFFFFFC00000ULL, // N0 + 0x0FFFFFFFFFC00000ULL, // N1 + 0x0FFFFFFFFFC00000ULL, // N2 + 0x0FFFFFFF1FC00000ULL, // N3 + 0x0FFFFFFFFFC00000ULL, // X + 0x0FFFFFFFFFC00000ULL, // MC0 + 0x0FFFFFFFFFC00000ULL, // MC1 + 0x0FFFFFFFFFC00000ULL, // OB0 + 0x0FFFFFFFFFC00000ULL, // OB1 + 0x0FFFFFFFFFC00000ULL, // OB2 + 0x0FFFFFFFFFC00000ULL, // OB3 + 0x0FFFFFFFFFC00000ULL, // PCI0 + 0x0FFFFFFFFFC00000ULL, // PCI1 + 0x0FFFFFFFFFC00000ULL // PCI2 }; // chiplet XIR constants const uint64_t PERV_XFIR_MASK[15] = { - 0x9FFFFFE000000000ULL, // TP - 0x2007FFE000000000ULL, // N0 - 0x201FFFE000000000ULL, // N1 - 0x200FFFE000000000ULL, // N2 - 0x000007E000000000ULL, // N3 - 0x210FFFE000000000ULL, // X - 0x20007FE000000000ULL, // MC0 - 0x20007FE000000000ULL, // MC1 - 0x29FFFFE000000000ULL, // OB0 - 0x29FFFFE000000000ULL, // OB1 - 0x29FFFFE000000000ULL, // OB2 - 0x29FFFFE000000000ULL, // OB3 - 0x21FFFFE000000000ULL, // PCI0 - 0x207FFFE000000000ULL, // PCI1 - 0x201FFFE000000000ULL // PCI2 + 0x0000000000000000ULL, // TP + 0x0000000000000000ULL, // N0 + 0x0000000000000000ULL, // N1 + 0x0000000000000000ULL, // N2 + 0x0000000000000000ULL, // N3 + 0x0000000000000000ULL, // X + 0x0000000000000000ULL, // MC0 + 0x0000000000000000ULL, // MC1 + 0x0000000000000000ULL, // OB0 + 0x0000000000000000ULL, // OB1 + 0x0000000000000000ULL, // OB2 + 0x0000000000000000ULL, // OB3 + 0x0000000000000000ULL, // PCI0 + 0x0000000000000000ULL, // PCI1 + 0x0000000000000000ULL // PCI2 }; /// @brief --For all chiplets exit flush |
