diff options
Diffstat (limited to 'src/import/chips/ocmb')
5 files changed, 0 insertions, 2419 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H deleted file mode 100644 index 8e30c3f3..00000000 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H +++ /dev/null @@ -1,608 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H $ */ -/* */ -/* OpenPOWER sbe Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file exp_i2c.H -/// @brief explorer I2C utility function declarations -/// -// *HWP HWP Owner: Andre A. Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:FSP - -#ifndef _MSS_EXP_I2C_H_ -#define _MSS_EXP_I2C_H_ - -#include <fapi2.H> -#include <i2c_access.H> - -#include <vector> -#include <lib/i2c/exp_i2c_fields.H> -#include <generic/memory/lib/utils/pos.H> -#include <generic/memory/lib/utils/endian_utils.H> -#include <generic/memory/lib/utils/poll.H> - -namespace mss -{ -namespace exp -{ -namespace i2c -{ -namespace check -{ - -/// -/// @brief Checks the I2c explorer status codes -/// @param[in] i_target the OCMB target -/// @param[in] i_cmd_id the command ID -/// @param[in] i_data data to check from EXP_FW_STATUS -/// @param[out] o_busy true if explorer returns FW_BUSY status, false otherwise -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode status_code( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint8_t i_cmd_id, - const std::vector<uint8_t>& i_data, - bool& o_busy ) -{ - // Set o_busy to false just in case we don't make it to where we check it - o_busy = false; - - // Set to a high number to make sure check for SUCCESS (== 0) isn't a fluke - uint8_t l_status = ~(0); - FAPI_TRY( status::get_status_code(i_target, i_data, l_status) ); - - // We need to try again if we get a FW_BUSY status, so set the flag - if (l_status == status_codes::FW_BUSY) - { - o_busy = true; - return fapi2::FAPI2_RC_SUCCESS; - } - - // Technically many cmds have their own status code decoding..but SUCCESS is always 0. - // If it's anything else we can just look up the status code - FAPI_ASSERT( l_status == status_codes::SUCCESS, - fapi2::MSS_EXP_I2C_FW_STATUS_CODE_FAILED(). - set_TARGET(i_target). - set_STATUS_CODE(l_status). - set_CMD_ID(i_cmd_id), - "Status code did not return SUCCESS (%d), received (%d) for %s", - status_codes::SUCCESS, l_status, mss::c_str(i_target) ); - - return fapi2::FAPI2_RC_SUCCESS; - -fapi_try_exit: - return fapi2::current_err; -} - -}// check - -/// -/// @brief EXP_FW_STATUS setup helper function - useful for testing -/// @param[out] o_size the size of data -/// @param[out] o_cmd_id the explorer command ID -/// -inline void fw_status_setup(size_t& o_size, - std::vector<uint8_t>& o_cmd_id) -{ - o_size = FW_STATUS_BYTE_LEN; - o_cmd_id.clear(); - o_cmd_id.push_back(FW_STATUS); -} - -/// -/// @brief EXP_FW_BYPASS_4SEC_TIMEOUT setup helper function -/// @param[out] o_cmd_id the explorer command ID -/// -inline void fw_bypass_download_window_setup(std::vector<uint8_t>& o_cmd_id) -{ - o_cmd_id.clear(); - o_cmd_id.push_back(FW_BYPASS_4SEC_TIMEOUT); -} - -/// -/// @brief get EXP_FW_STATUS bytes -/// @param[in] i_target the OCMB target -/// @param[out] o_data the return data from FW_STATUS command -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_fw_status(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& o_data) -{ - // Retrieve setup data - size_t l_size = 0; - std::vector<uint8_t> l_cmd_id; - fw_status_setup(l_size, l_cmd_id); - - // Get data and check for errors - FAPI_TRY(fapi2::getI2c(i_target, l_size, l_cmd_id, o_data)); - FAPI_DBG( "status returned ( 5 bytes ) : 0x%.02X 0x%.02X 0x%.02X 0x%.02X 0x%.02X", - o_data[0], o_data[1] , o_data[2], o_data[3], o_data[4]); -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Helper function to check FW_STATUS loop termination, for unit testing -/// @param[in] i_target the OCMB target -/// @param[in] i_busy busy flag from check::status_code -/// @param[in] i_boot_stage boot_stage output from status::get_boot_stage -/// @return true if we should break out of the loop, false otherwise -/// -inline bool fw_status_loop_done(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const bool i_busy, - const uint8_t i_boot_stage) -{ - constexpr uint8_t EXPECTED_BOOT_STAGE = boot_stages::RUNTIME_FW; - - if (i_busy) - { - FAPI_DBG( "%s reutrned FW_BUSY status. Retrying...", mss::c_str(i_target) ); - return false; - } - - if (i_boot_stage != EXPECTED_BOOT_STAGE) - { - FAPI_DBG( "%s reutrned non-RUNTIME boot stage (0x%02x). Retrying...", - mss::c_str(i_target), i_boot_stage ); - return false; - } - - return true; -} - -/// -/// @brief EXP_FW_STATUS -/// @param[in] i_target the OCMB target -/// @param[in] i_delay delay between polls -/// @param[in] i_loops number of polling loops to perform -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode fw_status(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint64_t i_delay, - const uint64_t i_loops) -{ - constexpr uint8_t EXPECTED_BOOT_STAGE = boot_stages::RUNTIME_FW; - - // So, why aren't we using the memory team's polling API? - // This is a base function that will be utilized by the platform code - // As such, we don't want to pull in more libraries than we need to: it would cause extra dependencies - // So, we're decomposing the polling library below - fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS; - bool l_busy = true; - uint8_t l_boot_stage = 0; - uint64_t l_loop = 0; - - // Loop until we max our our loop count or get a non-busy response - for(; l_loop < i_loops; ++l_loop) - { - std::vector<uint8_t> l_data; - FAPI_TRY( get_fw_status(i_target, l_data) ); - FAPI_TRY( check::status_code(i_target, FW_STATUS, l_data, l_busy) ); - FAPI_TRY( status::get_boot_stage(i_target, l_data, l_boot_stage) ); - - if (fw_status_loop_done(i_target, l_busy, l_boot_stage)) - { - break; - } - - FAPI_TRY( fapi2::delay( i_delay, 200) ); - } - - FAPI_DBG("%s stopped on loop %u/%u", mss::c_str(i_target), l_loop, i_loops); - - // Check that Explorer is not still in FW_BUSY state - FAPI_ASSERT( !l_busy, - fapi2::MSS_EXP_I2C_FW_STATUS_BUSY(). - set_TARGET(i_target), - "Polling timeout on FW_STATUS command (still FW_BUSY) for %s", - mss::c_str(i_target) ); - - // Check that Explorer is in RUNTIME_FW boot stage - FAPI_ASSERT( (l_boot_stage == EXPECTED_BOOT_STAGE), - fapi2::MSS_EXP_I2C_WRONG_BOOT_STAGE(). - set_TARGET(i_target). - set_BOOT_STAGE(l_boot_stage). - set_EXPECTED_BOOT_STAGE(EXPECTED_BOOT_STAGE), - "Polling timeout on FW_STATUS command (wrong boot stage: 0x%01x, expected 0x%01x) for %s", - l_boot_stage, EXPECTED_BOOT_STAGE, mss::c_str(i_target) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief EXP_FW_BOOT_CONFIG setup -/// @param[in,out] io_data the data to go to boot config -/// -inline void boot_config_setup(std::vector<uint8_t>& io_data) - -{ - - // Need data length as well - boot config can only ever be written - io_data.insert(io_data.begin(), FW_BOOT_CONFIG_BYTE_LEN); - - // Then add the command - io_data.insert(io_data.begin(), FW_BOOT_CONFIG); - - // Written commands need to be in the form of (MSB first). Confirmed by hardware characterization team. - // CMD - // DATA LEN - // DATA3 - // DATA2 - // DATA1 - // DATA0 -} - -/// -/// @brief EXP_FW_BOOT_CONFIG -/// @param[in] i_target the OCMB target -/// @param[in] i_data the data to write -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode boot_config(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data) -{ - // Retrieve setup data - std::vector<uint8_t> l_configured_data(i_data); - boot_config_setup(l_configured_data); - - // Send the command - FAPI_TRY(fapi2::putI2c(i_target, l_configured_data)); - - // Wait a bit for the command (DLL lock and OMI training) to complete - // Value based on initial Explorer hardware. - // The command takes ~300ms and we poll for around 100ms, so wait 250ms here - FAPI_TRY( fapi2::delay( (mss::DELAY_1MS * 250), 200) ); - - // Poll for status response - // Note: the EXP_FW_BOOT_CONFIG command trains the OMI, which takes a - // significant amount of time. We're waiting 1ms between polls, and poll for 100 loops, - // which totals at least 100ms - FAPI_TRY(fw_status(i_target, DELAY_1MS, 100)); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Checks if the I2C interface returns an ACK -/// @param[in] i_target the OCMB target -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode is_ready(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) -{ - // We send a simple but valid command to poll the I2C - // Arbitrarily send an EXP_FW_STATUS command id - size_t l_size = 0; - std::vector<uint8_t> l_cmd_id; - fw_status_setup(l_size, l_cmd_id); - - // We'll see FAPI2_RC_SUCCESS if the I2C returns an ACK. - // We just ignore the data - std::vector<uint8_t> l_data; - return fapi2::getI2c(i_target, l_size, l_cmd_id, l_data); -} - -/// -/// @brief EXP_FW_BYPASS_4SEC_TIMEOUT -/// @param[in] i_target the OCMB target -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode fw_bypass_download_window(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) -{ - std::vector<uint8_t> l_cmd_id; - fw_bypass_download_window_setup(l_cmd_id); - - // We'll see FAPI2_RC_SUCCESS if the I2C returns an ACK. - return fapi2::putI2c(i_target, l_cmd_id); -} - -/// -/// @brief Helper function for exp_check_for_ready -/// @param[in] i_target the controller -/// @param[in] i_poll_count the number of times to run the fw_status command (default = 200) -/// @param[in] i_delay delay in ns between fw_status command attempts (default = 1ms) -/// @return FAPI2_RC_SUCCESS iff ok -/// -inline fapi2::ReturnCode exp_check_for_ready_helper(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint64_t i_poll_count = 200, - const uint64_t i_delay = DELAY_1MS) -{ - std::vector<uint8_t> l_data; - uint8_t l_boot_stage = 0; - - // Using using default parameters from class, with overrides for delay and poll_count - mss::poll_parameters l_poll_params(DELAY_10NS, - 200, - i_delay, - 200, - i_poll_count); - - // From MSCC explorer firmware arch spec - // 4.1.5: After power-up, the Explorer Chip will respond with NACK to all incoming I2C requests - // from the HOST until the I2C slave interface is ready to receive commands. - FAPI_ASSERT( mss::poll(i_target, l_poll_params, [i_target]()->bool - { - return mss::exp::i2c::is_ready(i_target) == fapi2::FAPI2_RC_SUCCESS; - }), - fapi2::MSS_EXP_I2C_POLLING_TIMEOUT(). - set_TARGET(i_target), - "Failed to see an ACK from I2C -- polling timeout on %s", - mss::c_str(i_target) ); - - // If we're already in RUNTIME_FW stage, due to fuse settings or running procedures manually, - // we can (and should) skip the bypass and polling here - FAPI_TRY( get_fw_status(i_target, l_data) ); - FAPI_TRY( status::get_boot_stage(i_target, l_data, l_boot_stage) ); - - if (l_boot_stage == boot_stages::RUNTIME_FW) - { - return fapi2::FAPI2_RC_SUCCESS; - } - - // MSCC explorer firmware arch spec 4.1.6.5 - // Boot ROM will wait 4 secs and will proceed for normal boot operation. During this time, - // I2C channel will be disabled and Host will see NACK on the bus for subsequent EXP_FW_STATUS - // command. - // Sending FW_BYPASS_4SEC_TIMEOUT command will bypass the 4 secs - // and immediately load the runtime firmware. - FAPI_TRY(fw_bypass_download_window(i_target)); - - // Loop again until we get an ACK from i2c - FAPI_ASSERT( mss::poll(i_target, l_poll_params, [i_target]()->bool - { - return mss::exp::i2c::is_ready(i_target) == fapi2::FAPI2_RC_SUCCESS; - }), - fapi2::MSS_EXP_I2C_POLLING_TIMEOUT(). - set_TARGET(i_target), - "Failed to see an ACK from I2C -- polling timeout on %s", - mss::c_str(i_target) ); - - // Now poll the EXP_FW_STATUS command until it returns SUCCESS and RUNTIME_FW - FAPI_TRY(fw_status(i_target, i_delay, i_poll_count)); - - return fapi2::FAPI2_RC_SUCCESS; - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform a register write operation on the given OCMB chip -/// @param[in] i_target the OCMB target -/// @param[in] i_addr The translated address on the OCMB chip -/// @param[in] i_data_buffer buffer of data we want to write to the register -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode fw_reg_write(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint32_t i_addr, - const fapi2::buffer<uint32_t>& i_data_buffer) -{ - // create byte vector that will hold command bytes in sequence that will do the scom - std::vector<uint8_t> l_cmd_vector; - std::vector<uint8_t> l_be_vector; - - uint32_t l_input_data = static_cast<uint32_t>(i_data_buffer); - - // Start building the cmd vector for the write operation - l_cmd_vector.push_back(FW_REG_WRITE); // Byte 0 = 0x05 (FW_REG_WRITE) - l_cmd_vector.push_back(FW_WRITE_REG_DATA_SIZE); // Byte 1 = 0x08 (FW_SCOM_DATA_SIZE) - - // i_addr and i_data_buffer were converted to LE above so we can - // write them directly to the cmd_vector in the same order they - // currently are - // Byte 2:5 = Address - forceBE(i_addr, l_be_vector); - l_cmd_vector.insert(l_cmd_vector.end(), l_be_vector.begin(), l_be_vector.end()); - - l_be_vector.clear(); - forceBE(l_input_data, l_be_vector); - - // Byte 6:9 = Data - l_cmd_vector.insert(l_cmd_vector.end(), l_be_vector.begin(), l_be_vector.end()); - - // Use fapi2 putI2c interface to execute command - FAPI_TRY(fapi2::putI2c(i_target, l_cmd_vector), - "I2C FW_REG_WRITE op failed to write to 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // Check status of operation - FAPI_TRY(fw_status(i_target, DELAY_1MS, 100), - "Invalid Status after FW_REG_WRITE operation to 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform a register write operation on the given OCMB chip -/// @param[in] i_target the OCMB target -/// @param[in] i_addr The translated address on the OCMB chip -/// @param[in] o_data_buffer buffer of data we will write the contents of the register to -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode fw_reg_read(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint32_t i_addr, - fapi2::buffer<uint32_t>& o_data_buffer) -{ - // create byte vector that will hold command bytes in sequence that will do the scom - std::vector<uint8_t> l_cmd_vector; - std::vector<uint8_t> l_tmp_vector; - - // Flush o_data_buffer w/ all 0's to avoid stale data - o_data_buffer.flush<0>(); - - // Force the address to be BE - forceBE(i_addr, l_tmp_vector); - - // Build the cmd vector for the Read - l_cmd_vector.push_back(FW_REG_ADDR_LATCH); // Byte 0 = 0x03 (FW_REG_ADDR_LATCH) - l_cmd_vector.push_back(FW_REG_ADDR_LATCH_SIZE); // Byte 1 = 0x04 (FW_REG_ADDR_LATCH_SIZE) - - // i_addr was converted to BE above so we can write it - // directly to the cmd_vector in the same order it - // currently is in - // Byte 2:5 = Address - l_cmd_vector.insert(l_cmd_vector.end(), l_tmp_vector.begin(), l_tmp_vector.end()); - - // Use fapi2 putI2c interface to execute command - FAPI_TRY(fapi2::putI2c(i_target, l_cmd_vector), - "putI2c returned error for FW_REG_ADDR_LATCH operation to 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // Check i2c status after operation - FAPI_TRY(fw_status(i_target, DELAY_1MS, 100), - "Invalid Status after FW_REG_ADDR_LATCH operation to 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // Clear out the tmp_vector because we will re-use as the read buffer - l_tmp_vector.clear(); - - // Clear out cmd vector as i2c op is complete and we must prepare for next - l_cmd_vector.clear(); - - // Cmd vector is a single byte with FW_REG_READ code - l_cmd_vector.push_back(FW_REG_READ); // Byte 0 = 0x04 (FW_REG_READ) - l_cmd_vector.push_back(0x4); // Remaining bytes dont matter to HB firmware - l_cmd_vector.push_back(0x0); // but the hw is expecting something there so - l_cmd_vector.push_back(0x0); // we should write something - l_cmd_vector.push_back(0x0); - l_cmd_vector.push_back(0x0); - - // Use fapi2 getI2c interface to execute command - FAPI_TRY(fapi2::getI2c(i_target, FW_I2C_SCOM_READ_SIZE, l_cmd_vector, l_tmp_vector), - "getI2c returned error for FW_REG_READ operation to 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // The first byte returned should be the size of the remaining data - // We requested FW_REG_ADDR_LATCH_SIZE bytes so that is what we - // expect to see as the first byte. - FAPI_ASSERT( (l_tmp_vector.front() == FW_REG_ADDR_LATCH_SIZE), - fapi2::I2C_GET_SCOM_INVALID_READ_SIZE() - .set_TARGET(i_target) - .set_ADDRESS(i_addr) - .set_SIZE_RETURNED(l_tmp_vector[0]) - .set_SIZE_REQUESTED(FW_REG_ADDR_LATCH_SIZE), - "First byte of read data was expected to be 0x%lx but byte read = 0x%x", - FW_REG_ADDR_LATCH_SIZE, l_tmp_vector[0] ); - - // Check i2c status after operation - FAPI_TRY(fw_status(i_target, DELAY_1MS, 100), - "Invalid Status after FW_REG_READ operation to 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // Build uint32_t from bytes 1-4 of the returned data. Bytes are - // returned in BE so no translation neccesary. Faster to just access - // the 4 bytes and shift than to perform vector operations to pop off front - // entry and convert vector to uint32. - o_data_buffer = ( l_tmp_vector[1] << 24 | - l_tmp_vector[2] << 16 | - l_tmp_vector[3] << 8 | - l_tmp_vector[4]); -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform a register write operation on the given OCMB chip -/// @param[in] i_addr The raw address that needs to be translated to IBM scom addr -/// @param[in] i_side LHS or RHS of the IBM i2c scom. IBM addresses expect 64 bits of -/// data returned from them so we must have a LHS and a RHS which is offset -/// by 4 bytes. This is because the OCMB is a 32 bit architecture -/// @return uint32 of translated address -/// -inline uint32_t trans_ibm_i2c_scom_addr(const uint32_t i_addr, - const addrSide i_side) -{ - return (i_side == LHS) ? - ((LAST_THREE_BYTES_MASK & i_addr) << OCMB_ADDR_SHIFT) | IBM_SCOM_OFFSET_LHS | OCMB_UNCACHED_OFFSET : - ((LAST_THREE_BYTES_MASK & i_addr) << OCMB_ADDR_SHIFT) | IBM_SCOM_OFFSET_RHS | OCMB_UNCACHED_OFFSET ; -} - -/// -/// @brief Perform a register write operation on the given OCMB chip -/// @param[in] i_addr The raw address that needs to be translated to Microchip scom addr -/// @return uint32 of translated address -/// -inline uint32_t trans_micro_i2c_scom_addr(const uint32_t i_addr) -{ - return (i_addr | OCMB_UNCACHED_OFFSET) ; -} - -/// -/// @brief Issue the DOWNLOAD command to the given OCMB chip -/// @param[in] i_target the OCMB target -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode fw_download(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) -{ - // create byte vector that will hold command bytes in sequence that will do the scom - std::vector<uint8_t> l_download_cmd; - std::vector<uint8_t> l_status_data; - uint8_t l_boot_stage = 0; - - // Read status to get the current boot_stage - FAPI_TRY(get_fw_status(i_target, l_status_data)); - - // Extract the boot_stage value - FAPI_TRY(status::get_boot_stage(i_target, l_status_data, l_boot_stage)); - - // Check that we are in the BOOT_ROM or FW_UPGRADE stage of booting. - // The FW_DOWNLOAD command can only be sent in one of these modes - // (see table 13-1, pboot flowchart in FW arch doc for more info) - FAPI_ASSERT(((l_boot_stage == BOOT_ROM_STAGE) || - (l_boot_stage == FW_UPGRADE_MODE)), - fapi2::MSS_EXP_I2C_FW_DOWNLOAD_INVALID_STATE(). - set_TARGET(i_target). - set_BOOT_STAGE(l_boot_stage). - set_STATUS_DATA(l_status_data), - "Invalid boot stage[0x%02x] for FW_DOWNLOAD command on %s", - l_boot_stage, mss::c_str(i_target)); - - // Start building the cmd vector for the write operation - // Byte 0 = 0x06 (FW_DOWNLOAD) - l_download_cmd.push_back(FW_DOWNLOAD); - - // Use fapi2 putI2c interface to execute command - FAPI_TRY(fapi2::putI2c(i_target, l_download_cmd), - "I2C FW_DOWNLOAD op failed to send FW_DOWNLOAD cmd to %s", - mss::c_str(i_target)); - - // NOTE: The EXP_FW_STATUS command will not work after sending the - // EXP_FW_DOWNLOAD because we will be in TWI mode from this point on. - -fapi_try_exit: - return fapi2::current_err; -} - - -}// i2c -}// exp -}// mss - -#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H deleted file mode 100644 index 41d83cc9..00000000 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H +++ /dev/null @@ -1,525 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H $ */ -/* */ -/* OpenPOWER sbe Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file exp_i2c_fields.H -/// @brief explorer I2C field definition and operations -/// -// *HWP HWP Owner: Andre A. Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:FSP - -#ifndef _MSS_EXP_I2C_FIELDS_H_ -#define _MSS_EXP_I2C_FIELDS_H_ - -#include <functional> -#ifdef __PPE__ - #include <mss_field.H> - #include <exp_consts.H> -#else - #include <generic/memory/lib/utils/mss_field.H> - #include <lib/shared/exp_consts.H> -#endif - -namespace mss -{ -namespace exp -{ -namespace i2c -{ - -/// -/// @class fields -/// @brief Explorer I2C command fields -/// @tparam E Endian type -/// -struct fields -{ - // First value is byte index, then buffer extract start bit, and extract data length - - // Part of EXP_FW_BOOT_CONFIG - static constexpr mss::field_t<mss::endian::BIG> DFE_DISABLE{0, 0, 1}; - static constexpr mss::field_t<mss::endian::BIG> LANE_MODE{0, 1, 3}; - static constexpr mss::field_t<mss::endian::BIG> SERDES_FREQ{0, 4, 4}; - static constexpr mss::field_t<mss::endian::BIG> FW_MODE{1, 1, 2}; - static constexpr mss::field_t<mss::endian::BIG> LOOPBACK_TEST{1, 3, 1}; - static constexpr mss::field_t<mss::endian::BIG> TRANSPORT_LAYER{1, 4, 2}; - static constexpr mss::field_t<mss::endian::BIG> DL_LAYER_BOOT_MODE{1, 6, 2}; - - // Part of EXP_FW_STATUS - static constexpr mss::field_t<mss::endian::BIG> CMD_ID{0, 0, 8}; - static constexpr mss::field_t<mss::endian::BIG> STATUS_CODE{1, 0, 8}; - static constexpr mss::field_t<mss::endian::BIG> BOOT_STAGE{2, 6, 2}; -}; - -/// -/// @class fieldTraits -/// @brief Traits assoiated with the Explorer I2C commands -/// @tparam F the Explorer I2C field -/// -template < const mss::field_t<endian::BIG>& F > -struct fieldTraits; - -/// -/// @class fieldTraits - SERDES_FREQ specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::SERDES_FREQ> -{ - static constexpr uint8_t COMPARISON_VAL = 0x0F; - static constexpr const char* FIELD_STR = "SerDes Frequency"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - LANE_MODE specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::LANE_MODE> -{ - static constexpr uint8_t COMPARISON_VAL = 0x02; - static constexpr const char* FIELD_STR = "Lane mode"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - DFE_DISABLE specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::DFE_DISABLE> -{ - static constexpr uint8_t COMPARISON_VAL = 0x01; - static constexpr const char* FIELD_STR = "DFE Disable"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - DL_LAYER_BOOT_MODE specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::DL_LAYER_BOOT_MODE> -{ - static constexpr uint8_t COMPARISON_VAL = 0x01; - static constexpr const char* FIELD_STR = "DL Layer Boot mode"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - TRANSPORT_LAYER specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::TRANSPORT_LAYER> -{ - static constexpr uint8_t COMPARISON_VAL = 0x02; - static constexpr const char* FIELD_STR = "Transport Layer"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - LOOPBACK_TEST specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::LOOPBACK_TEST> -{ - static constexpr uint8_t COMPARISON_VAL = 0x01; - static constexpr const char* FIELD_STR = "OpenCapi looptest test"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - FW_MODE specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template <> -struct fieldTraits<fields::FW_MODE> -{ - static constexpr uint8_t COMPARISON_VAL = 0x02; - static constexpr const char* FIELD_STR = "FW Mode"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - CMD_ID specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template<> -struct fieldTraits<fields::CMD_ID> -{ - static constexpr uint8_t COMPARISON_VAL = 0xFF; - static constexpr const char* FIELD_STR = "Command ID"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - STATUS_CODE specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template<> -struct fieldTraits<fields::STATUS_CODE> -{ - static constexpr uint8_t COMPARISON_VAL = 0xFF; - static constexpr const char* FIELD_STR = "Status Code"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @class fieldTraits - BOOT_STAGE specialization -/// @brief Traits assoiated with the Explorer I2C commands -/// -template<> -struct fieldTraits<fields::BOOT_STAGE> -{ - static constexpr uint8_t COMPARISON_VAL = 0x03; - static constexpr const char* FIELD_STR = "Boot Stage"; - - template <typename T> - using COMPARISON_OP = std::less_equal<T>; -}; - -/// -/// @brief Explorer I2C field getter -/// @tparam F the explorer I2C field -/// @tparam IT Input type -/// @tparam OT Output type -/// @tparam TT Traits associated with exp I2C - defaults to fieldTraits<F> -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_value the output value received -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< const mss::field_t<endian::BIG>& F, - typename IT, - typename OT, - typename TT = fieldTraits<F> > -inline fapi2::ReturnCode get_field(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<IT>& i_data, - OT& o_value) -{ - return mss::get_field<endian::BIG, F, TT>(i_target, i_data, EXP_I2C_GET_FIELD, o_value); -} - -#ifndef __PPE__ -/// -/// @brief Explorer I2C field setter -/// @tparam IT Input type -/// @tparam OT Output type -/// @tparam TT Traits associated with exp I2C - defaults to fieldTraits<F> -/// @param[in] i_target the OCMB target -/// @param[in] i_value the input value to set -/// @param[in,out] io_data the buffer as a reference to a vector -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< const mss::field_t<endian::BIG>& F, - typename IT, - typename OT, - typename TT = fieldTraits<F> > -inline fapi2::ReturnCode set_field(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<OT>& io_data, - const IT i_value) - -{ - return mss::set_field<endian::BIG, F, TT>(i_target, i_value, EXP_I2C_SET_FIELD, io_data); -} - -namespace boot_cfg -{ - -/// -/// @brief SERDES_FREQ getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_serdes_freq(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::SERDES_FREQ>(i_target, i_data, o_setting); -} - -/// -/// @brief SERDES_FREQ setter -/// @param[in] i_target the OCMB target -/// @param[in,out] io_data the buffer as a reference to a vector -/// @param[in] i_freq frequency to set -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode set_serdes_freq(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint32_t i_freq); - -/// -/// @brief LANE_MODE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_lane_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::LANE_MODE>(i_target, i_data, o_setting); -} - -/// -/// @brief LANE_MODE setter -/// @param[in] i_target the OCMB target -/// @param[in,out] io_data the buffer as a reference to a vector -/// @param[in] i_setting the value to set -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_lane_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint8_t i_setting) -{ - return set_field<fields::LANE_MODE>(i_target, io_data, i_setting); -} - -/// -/// @brief DFE_DISABLE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_dfe_disable(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::DFE_DISABLE>(i_target, i_data, o_setting); -} - -/// -/// @brief DFE_DISABLE setter -/// @param[in] i_target the OCMB target -/// @param[in,out] io_data the buffer as a reference to a vector -/// @param[in] i_setting the value to set -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_dfe_disable(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint8_t i_setting) -{ - return set_field<fields::DFE_DISABLE>(i_target, io_data, i_setting); -} - -/// @brief DL_LAYER_BOOT_MODE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_dl_layer_boot_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::DL_LAYER_BOOT_MODE>(i_target, i_data, o_setting); -} - -/// -/// @brief DL_LAYER_BOOT_MODE setter -/// @param[in] i_target the OCMB target -/// @param[in,out] io_data the buffer as a reference to a vector -/// @param[in] i_setting the value to set -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_dl_layer_boot_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint8_t i_setting) -{ - return set_field<fields::DL_LAYER_BOOT_MODE>(i_target, io_data, i_setting); -} - -/// -/// @brief DL_LAYER_BOOT_MODE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_transport_layer(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::TRANSPORT_LAYER>(i_target, i_data, o_setting); -} - - -/// -/// @brief TRANSPORT_LAYER setter -/// @param[in] i_target the OCMB target -/// @param[in,out] io_data the buffer as a reference to a vector -/// @param[in] i_setting the value to set -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_transport_layer(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint8_t i_setting) -{ - return set_field<fields::TRANSPORT_LAYER>(i_target, io_data, i_setting); -} - -/// -/// @brief LOOPBACK_TEST getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_loopback_test(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::LOOPBACK_TEST>(i_target, i_data, o_setting); -} - -/// -/// @brief LOOPBACK_TEST setter -/// @param[in] i_target the OCMB target -/// @param[in,out] io_data the buffer as a reference to a vector -/// @param[in] i_setting the value to set -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_loopback_test(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint8_t i_setting) -{ - return set_field<fields::LOOPBACK_TEST>(i_target, io_data, i_setting); -} - -/// -/// @brief FW_MODE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_fw_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::FW_MODE>(i_target, i_data, o_setting); -} - -/// -/// @brief FW_MODE setter -/// @param[in] i_target the OCMB target -/// @param[in] i_setting the value to set -/// @param[in,out] io_data the buffer as a reference to a vector -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_fw_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - std::vector<uint8_t>& io_data, - const uint8_t i_setting) -{ - return set_field<fields::FW_MODE>(i_target, io_data, i_setting); -} - -}// boot_cfg - -#endif - -namespace status -{ - -/// -/// @brief BOOT_STAGE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_boot_stage(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::BOOT_STAGE>(i_target, i_data, o_setting); -} - - -/// -/// @brief STATUS_CODE getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_status_code(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::STATUS_CODE>(i_target, i_data, o_setting); -} - -#ifndef __PPE__ -/// -/// @brief CMD_ID getter -/// @param[in] i_target the OCMB target -/// @param[in] i_data the buffer as a reference to a vector -/// @param[out] o_setting -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode get_cmd_id(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const std::vector<uint8_t>& i_data, - uint8_t& o_setting) -{ - return get_field<fields::CMD_ID>(i_target, i_data, o_setting); -} -#endif - -}// status -}// i2c -}// exp -}// mss - -#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H deleted file mode 100644 index ae25f408..00000000 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H +++ /dev/null @@ -1,221 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H $ */ -/* */ -/* OpenPOWER sbe Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file exp_i2c_scom.H -/// @brief explorer I2C scom function declarations -/// -// *HWP HWP Owner: Christian Geddes <crgeddes@us.ibm.com> -// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:SBE - -#ifndef _MSS_EXP_I2C_SCOM_H_ -#define _MSS_EXP_I2C_SCOM_H_ - -#include <lib/i2c/exp_i2c.H> - - -namespace mss -{ -namespace exp -{ -namespace i2c -{ - -/// -/// @brief Perform a put scom operation over i2c to OCMB explorer chip -/// @note OCMB chip is little-endian and Host is likely running big-endian -/// -/// @param[in] i_addr 32 bit IBM scom address we want to write on the OCMB -/// @param[in] i_target the OCMB target -/// @param[in] i_data_buffer Contains data which will be written to i_addr on i_target -/// -/// @return FAPI2_RC_SUCCESS iff okay -/// -/// @note this is the IBM scom version the overloaded function i2c_put_scom -/// IBM i2c scoms to the explorer chips are 64 bits of data -fapi2::ReturnCode i2c_put_scom( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint32_t i_addr, - const fapi2::buffer<uint64_t>& i_data_buffer) -{ - // We need to separate 64 bit input buffer into two 32-bit halves, - // use this 32-bit buffer to pull out 32 bits at a time - fapi2::buffer<uint32_t> l_side_specific_buffer; - - // check if this is an IBM address - FAPI_ASSERT( ((i_addr & FIRST_BYTE_MASK) == IBM_SCOM_INDICATOR), - fapi2::I2C_SCOM_EXPECTED_IBM_INDICATOR() - .set_TARGET(i_target) - .set_ADDRESS(i_addr), - "First byte of 0x%lx does not = 0x%lx, address is not valid for IBM I2C scom", - i_addr, IBM_SCOM_INDICATOR); - - // The LHS is the bits 0-31 of the input buffer - i_data_buffer.extractToRight<0, 32>(l_side_specific_buffer); - - // Perform the write operation to complete the LHS of the write - FAPI_TRY(fw_reg_write(i_target, trans_ibm_i2c_scom_addr(i_addr, LHS), l_side_specific_buffer), - "(LHS) Failed i2c scom register write to ibm scom addr 0x%lx on OCMB w/ fapi_pos = %d", - i_addr, mss::fapi_pos(i_target)); - - // The RHS is the bits 32-63 of the input buffer - i_data_buffer.extractToRight<32, 32>(l_side_specific_buffer); - - // Perform the write operation to complete the RHS of the write - FAPI_TRY(fw_reg_write(i_target, trans_ibm_i2c_scom_addr(i_addr, RHS), l_side_specific_buffer), - "(RHS) Failed i2c scom register write to ibm scom addr 0x%lx on OCMB w/ fapi_pos = %d", - i_addr, mss::fapi_pos(i_target) ); - -fapi_try_exit: - return fapi2::current_err; - -} - -/// -/// @brief Perform a put scom operation over i2c to OCMB explorer chip -/// @note OCMB chip is little-endian and Host is likely running big-endian -/// @param[in] i_target the OCMB target -/// @param[in] i_addr 32 bit Microchip scom address we want to write on the OCMB -/// @param[in] i_data_buffer Contains data which will be written to i_addr on i_target -/// -/// @return FAPI2_RC_SUCCESS iff okay -/// -/// @note this is the Microchip scom version the overloaded function i2c_put_scom -/// Microchip i2c scoms to the explorer chips are 32 bits of data -fapi2::ReturnCode i2c_put_scom( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint32_t i_addr, - const fapi2::buffer<uint32_t>& i_data_buffer) -{ - // The micro-semi addresses should not have the IBM indicator - FAPI_ASSERT( ((i_addr & FIRST_BYTE_MASK) != IBM_SCOM_INDICATOR), - fapi2::I2C_SCOM_UNEXPECTED_IBM_INDICATOR() - .set_TARGET(i_target) - .set_ADDRESS(i_addr), - "First byte of 0x%lx == 0x%lx, address is not valid for microchip I2C scom", - i_addr, IBM_SCOM_INDICATOR); - - // Perform the write operation, note we must apply the UNCACHED_OFFSET to the - // address before performing the write - // Also note that we pass i_data_buffer directly to the fw_reg_read function - FAPI_TRY(fw_reg_write(i_target, trans_micro_i2c_scom_addr(i_addr) , i_data_buffer), - "Failed i2c scom register write to microchip scom addr 0x%lx on OCMB w/ fapi_pos = %d", - i_addr, mss::fapi_pos(i_target)); - -fapi_try_exit: - return fapi2::current_err; - -} - - - - -/// -/// @brief Perform a get scom operation over i2c to OCMB explorer chip -/// @note OCMB chip is little-endian and Host is likely running big-endian -/// @param[in] i_target the OCMB target -/// @param[in] i_addr 32 bit IBM scom address we want to read from on the OCMB -/// @param[out] o_data_buffer Buffer where data found at i_addr will be written to -/// -/// @return FAPI2_RC_SUCCESS iff okay -/// -/// @note this is the IBM scom version the overloaded function i2c_get_scom -/// IBM i2c scoms to the explorer chips are 64 bits of data -fapi2:: ReturnCode i2c_get_scom(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint32_t i_addr, - fapi2::buffer<uint64_t>& o_data_buffer) -{ - // IBM get scom expects 64 bits of data returned but we can only - // read 32 bits of data per command so we will do 2 reads in this getscom step. - fapi2::buffer<uint32_t> l_read_buffer; - - // check if this is an IBM address - FAPI_ASSERT( ((i_addr & FIRST_BYTE_MASK) == IBM_SCOM_INDICATOR), - fapi2::I2C_SCOM_EXPECTED_IBM_INDICATOR() - .set_TARGET(i_target) - .set_ADDRESS(i_addr), - "First byte of 0x%lx does not = 0x%lx, address is not valid for IBM I2C scom", - i_addr, IBM_SCOM_INDICATOR); - - FAPI_TRY(fw_reg_read(i_target, trans_ibm_i2c_scom_addr(i_addr, LHS), l_read_buffer), - "(LHS) Failed i2c scom register read from ibm scom addr 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // Data was put in correct order by fw_reg_read, copy data to LHS of out buffer - o_data_buffer.insertFromRight<0, 32>(l_read_buffer); - - FAPI_TRY(fw_reg_read(i_target, trans_ibm_i2c_scom_addr(i_addr, RHS), l_read_buffer), - "(RHS) Failed i2c scom register read from ibm scom addr 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - // Data was put in correct order by fw_reg_read, copy data to RHS of out buffer - o_data_buffer.insertFromRight<32, 32>(l_read_buffer); - - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform a get scom operation over i2c to OCMB explorer chip -/// @note OCMB chip is little-endian and Host is likely running big-endian -/// @param[in] i_target the OCMB target -/// @param[in] i_addr 32 bit Microchip scom address we want to read from on the OCMB -/// @param[out] o_data_buffer Buffer where data found at i_addr will be written to -/// -/// @return FAPI2_RC_SUCCESS iff okay -/// -/// @note this is the Microchip scom version the overloaded function i2c_get_scom -/// Microchip i2c scoms to the explorer chips are 32 bits of data -fapi2:: ReturnCode i2c_get_scom(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, - const uint32_t i_addr, - fapi2::buffer<uint32_t>& o_data_buffer) -{ - // The micro-semi addresses should not have the IBM indicator - FAPI_ASSERT( ((i_addr & FIRST_BYTE_MASK) != IBM_SCOM_INDICATOR), - fapi2::I2C_SCOM_UNEXPECTED_IBM_INDICATOR() - .set_TARGET(i_target) - .set_ADDRESS(i_addr), - "First byte of 0x%lx == 0x%lx, address is not valid for microchip I2C scom", - i_addr, IBM_SCOM_INDICATOR); - - // Perform the read operation, note we must apply the UNCACHED_OFFSET to the - // address before performing the read. - // Also note that we pass o_data_buffer directly to the fw_reg_read function - FAPI_TRY(fw_reg_read(i_target, trans_micro_i2c_scom_addr(i_addr) , o_data_buffer), - "Failed i2c scom register read from microchip scom addr 0x%.8X on OCMB w/ fapiPos = 0x%.8X", - i_addr, mss::fapi_pos(i_target)); - - -fapi_try_exit: - return fapi2::current_err; -} - -} // end i2c namespace -} // end exp namespace -} // end mss namespace - -#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H deleted file mode 100644 index 8aef80e4..00000000 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ /dev/null @@ -1,386 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H $ */ -/* */ -/* OpenPOWER sbe Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file explorer_check_for_ready.H -/// @brief explorer_check_for_ready HWP declaration -/// -// *HWP HWP Owner: Andre A. Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: CI - -#ifndef MSS_EXP_CONSTS_H -#define MSS_EXP_CONSTS_H - -#ifndef __PPE__ - #include <generic/memory/lib/utils/shared/mss_generic_consts.H> -#endif - -namespace mss -{ - -namespace exp -{ - -constexpr uint32_t OCMB_ADDR_SHIFT = 3; - -#ifndef __PPE__ -/// -/// @brief enum list for the indexes for the address delays -/// @note Taken from 07-MAY-19 firwmare document -/// -enum attr_delay_index -{ - ODT1 = 0, - ODT0 = 0, - CS_N0 = 0, - CS_N1 = 0, - ADDR13 = 1, - ADDR5 = 1, - BG0 = 1, - CKE1 = 1, - ADDR17 = 2, - ADDR7 = 2, - BA0 = 2, - ADDR16 = 2, - ADDR8 = 3, - BG1 = 3, - CID1 = 3, - CID0 = 3, - ADDR1 = 4, - ADDR9 = 4, - ADDR2 = 4, - CAPARITY = 4, - ADDR12 = 5, - ADDR3 = 5, - ADDR4 = 5, - ADDR0 = 5, - CKE0 = 6, - ADDR15 = 6, - ACT_N = 6, - ADDR10 = 6, - ADDR11 = 7, - ADDR6 = 7, - BA1 = 7, - ADDR14 = 7, -}; - -/// -/// @brief enum list of explorer SPD derived attributes to set -/// @note these attrs are strictly derived from SPD -/// @warning wrapped in exp namesapce to be distinguished from -/// the exp::attr_eff_engine_fields -/// -enum class attr_eff_engine_fields -{ - // Template recursive base case - ATTR_EFF_BASE_CASE = 0, - - // Attrs to set - BYTE_ENABLES = 1, - NIBBLE_ENABLES = 2, - SPD_TAA_MIN = 3, - FOUR_RANK_MODE = 4, - DDP_COMPATIBILITY = 5, - TSV_8H_SUPPORT = 6, - PSTATES = 7, - MRAM_SUPPORT = 8, - SPD_CL_SUPPORTED = 9, - ADDRESS_MIRROR = 10, - - // Dispatcher set to last enum value - DISPATCHER = ADDRESS_MIRROR, -}; - -/// -/// @brief common explorer sizes -/// -enum sizes -{ - MAX_PORT_PER_OCMB = 1, - MAX_DIMM_PER_PORT = 2, - MAX_RANK_PER_DIMM = 4, - MAX_DQ_BITS_PER_PORT = 80, - MAX_SYMBOLS_PER_PORT = 72, - MAX_RANKS_DIMM1 = 2, - MAX_MRANK_PER_PORT = MAX_DIMM_PER_PORT * MAX_RANK_PER_DIMM, -}; - -#endif - -/// -/// @brief explorer ffdc codes -/// -enum ffdc_codes -{ - EXP_I2C_GET_FIELD = 0x0000, - EXP_I2C_SET_FIELD = 0x0001, - READ_HOST_FW_RESPONSE_STRUCT = 0x0003, - READ_SENSOR_CACHE_STRUCT = 0x0004, - READ_CRCT_ENDIAN = 0x0005, - READ_TRAINING_RESPONSE_STRUCT = 0x0006, - - SET_EXP_DRAM_ADDRESS_MIRRORING = 0x1040, - SET_BYTE_ENABLES = 0x1041, - SET_NIBBLE_ENABLES = 0x1042, - SET_TAA_MIN = 0x1043, - SET_FOUR_RANK_MODE = 0x1044, - SET_DDP_COMPATIBILITY = 0x1045, - SET_TSV_8H_SUPPORT = 0x1046, - SET_VREF_DQ_TRAIN_RANGE = 0x1047, - SET_PSTATES = 0x1048, - SET_MRAM_SUPPORT = 0x1049, - SET_SPD_CL_SUPPORTED = 0x1050, - SET_SERDES_FREQ = 0x1051, -}; - -/// -/// @brief constants for getecid procedure -/// -enum ecid_consts -{ - FUSE_ARRAY_SIZE = 14, - DATA_IN_SIZE = 16, - // TK - Will need to be changed once ATTR_ECID is made larger - ATTR_ECID_SIZE = 2, -}; - -/// -/// @brief generic explorer constants -/// -enum generic_consts -{ - // Number of DRAM for x4 vs x8 - EXP_NUM_DRAM_X4 = 20, - EXP_NUM_DRAM_X8 = 10, -}; - -namespace i2c -{ - -/// -/// @brief List of explorer I2C commands -/// -enum cmd_id : uint8_t -{ - FW_BOOT_CONFIG = 0x01, - FW_STATUS = 0x02, - FW_REG_ADDR_LATCH = 0x03, - FW_REG_READ = 0x04, - FW_REG_WRITE = 0x05, - FW_DOWNLOAD = 0x06, - FW_CONT_REG_READ = 0x07, - FW_CONT_REG_WRITE = 0x08, - FW_BYPASS_4SEC_TIMEOUT = 0x09, - FW_PQM_LANE_SET = 0x0A, - FW_PQM_LANE_GET = 0x0B, - FW_PQM_FREQ_SET = 0x0C, - FW_PQM_FREQ_GET = 0x0D, - FW_PQM_LANE_TRAINING = 0x0E, - FW_PQM_TRAINING_RESET = 0x0F, - FW_PQM_RX_ADAPTATION_OBJ_READ = 0x10, - FW_PQM_RX_CALIBRATION_VALUE_READ = 0x11, - FW_PQM_CSU_CALIBRATION_VALUE_STATUS_READ = 0x12, - FW_PQM_PRBS_PATTERN_MODE_SET = 0x13, - FW_PQM_PRBS_USER_DEFINED_PATTERN_SET = 0x14, - FW_PQM_PRBS_MONITOR_CONTROL = 0x15, - FW_PQM_PRBS_GENERATOR_CONTROL = 0x16, - FW_PQM_PRBS_ERR_COUNT_READ = 0x17, - FW_PQM_HORIZONTAL_BATHTUB_GET = 0x18, - FW_PQM_VERTICAL_BATHTUB_GET = 0x19, - FW_PQM_2D_BATHTUB_GET = 0x1A, -}; - -/// -/// @brief common explorer sizes -/// -enum sizes -{ - // 32-bit commands - FW_BOOT_CONFIG_BYTE_LEN = 4, - FW_STATUS_BYTE_LEN = 5, - - FW_WRITE_REG_DATA_SIZE = 0x08, - FW_REG_ADDR_LATCH_SIZE = 0x04, - FW_I2C_SCOM_READ_SIZE = 0x05, - - // Largest R/W length for bytes of data - MIN_DATA_BYTES_LEN = 1, - MAX_DATA_BYTES_LEN = 32, -}; - -/// -/// @brief General I2C status codes -/// @note Shared I2C status codes for EXP_FW_REG_READ, EXP_FW_REG_WRITE, -/// EXP_FW_CONT_REG_READ, and EXP_FW_CONT_REG_WRITE -/// -enum status_codes -{ - SUCCESS = 0x00, - ADDRESS_OUT_OF_RANGE = 0x01, - ADDRESS_PROHIBITED = 0x02, - FW_BUSY = 0xFE, -}; - -#ifndef __PPE__ -/// -/// @brief status codes for FW_BOOT_CONFIG -/// -enum fw_boot_cfg_status -{ - FW_BOOT_CFG_SUCCESS = status_codes::SUCCESS, - - // Loopback fail - FW_BOOT_CFG_LB_FAIL = 0x01, - // Transport layer fail - FW_BOOT_CFG_UNSUPPORTED_TL = 0x02, - // DL (data link) layer fail - FW_BOOT_CFG_UNSUPPORTED_DL = 0x03, - // SERDES (serializer/deserializer) FREQ fail - FW_BOOT_CFG_UNSUPPORTED_SERDES_FREQ = 0x04, -}; - -#endif -/// -/// @brief I2C boot stage options -/// @note certain cmds work in certain boot stages -/// -enum boot_stages -{ - BOOT_ROM_STAGE = 0x01, - FW_UPGRADE_MODE = 0x02, - RUNTIME_FW = 0x03, -}; - -/// -/// @brief Useful constants for i2c scom functionality -/// -/// @note FIRST_BYTE_MASK = allows us to mask off first by of -/// an address to check if its an IBM SCOM -/// LAST_THREE_BYTES_MASK = used as part of formula to translate -/// a given address to an IBM scom address -/// OCBM_UNCACHED_OFFSET = Also used as part of formula for translating -/// a given address to the correct IBM or microchip form -/// IBM_SCOM_OFFSET_LHS and IBM_SCOM_OFFSET_RHS are used in formula -/// for calculating IBM scom address for left and right side of addr -/// IBM_SCOM_INDICATOR is the indicator bit in the first byte of an -/// address that tells us if it is a IBM scom or not -/// -enum i2c_scom_consts : uint32_t -{ - FIRST_BYTE_MASK = 0xFF000000, - LAST_THREE_BYTES_MASK = 0x00FFFFFF, - OCMB_UNCACHED_OFFSET = 0xA0000000, - IBM_SCOM_OFFSET_LHS = 0x08000000, - IBM_SCOM_OFFSET_RHS = 0x08000004, - IBM_SCOM_INDICATOR = IBM_SCOM_OFFSET_LHS, -}; - -/// -/// @brief Simple enum allows code to pick between left and right -/// -/// This is used when deciding if we are writing/reading from left -/// side of IBM address or right side. This is needed because IBM -/// scoms are 64 bits while the OCMB only has 32 bit regs. -enum addrSide -{ - LHS = 0x00, - RHS = 0x01 -}; - -}// i2c - -#ifndef __PPE__ -namespace omi -{ - -/// -/// @brief HOST-FW Commands and Responses -/// -enum cmd_and_response_id -{ - // initialize the DDR PHY controller when Step-by-Step BOOT mode - // is selected - EXP_FW_PHY_STEP_BY_STEP_INIT = 0x01, - - // sent by the Host along with PHY initialization data copied - // into data buffer for FW to use for configuring DDR PHY interface. - EXP_FW_DDR_PHY_INIT = 0x02, - - // read temperature sensor - EXP_FW_TEMP_SENSOR_PASS_THROUGH_READ = 0x03, - - // configure temperature sensor - EXP_FW_TEMP_SENSOR_PASS_THROUGH_WRITE = 0x04, - - // configure interval read mechanism - EXP_FW_TEMP_SENSOR_CONFIG_INTERVAL_READ = 0x05, - - // transition the FW into runtime mode when Step-by-Step BOOT mode - // is selected - EXP_FW_GO_COMMAND = 0x06, - - // determine various configurations related to controller - EXP_FW_ADAPTER_PROPERTIES_GET = 0x07, - - // sent by Host along with latest FW executable code, which is - // copied into data buffer location so that existing FW can - // upgrade the FW image - EXP_FW_BINARY_UPGRADE = 0x08, - - // find the flash loader version information - EXP_FW_FLASH_LOADER_VERSION_INFO = 0x09, - - // read the error logs from various modules of Explorer block - EXP_FW_ERROR_LOG_GET = 0x0A, -}; - -/// -/// @brief Command flag definitions -/// -enum cmd_flags -{ - NO_FLAGS = 0, - ADDITIONAL_DATA = 1, -}; - -/// -/// @brief Response argument parameters -/// -enum response_arg -{ - SUCCESS = 0, - ERROR_CODE = 1, -}; - -}// omi -#endif - -}// exp -}// mss - -#endif diff --git a/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml b/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml deleted file mode 100644 index 9f29367b..00000000 --- a/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml +++ /dev/null @@ -1,679 +0,0 @@ -<!-- IBM_PROLOG_BEGIN_TAG --> -<!-- This is an automatically generated prolog. --> -<!-- --> -<!-- $Source: src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml $ --> -<!-- --> -<!-- OpenPOWER sbe Project --> -<!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2018,2019 --> -<!-- [+] International Business Machines Corp. --> -<!-- --> -<!-- --> -<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> -<!-- you may not use this file except in compliance with the License. --> -<!-- You may obtain a copy of the License at --> -<!-- --> -<!-- http://www.apache.org/licenses/LICENSE-2.0 --> -<!-- --> -<!-- Unless required by applicable law or agreed to in writing, software --> -<!-- distributed under the License is distributed on an "AS IS" BASIS, --> -<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> -<!-- implied. See the License for the specific language governing --> -<!-- permissions and limitations under the License. --> -<!-- --> -<!-- IBM_PROLOG_END_TAG --> -<hwpErrors> - - <registerFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <scomRegister>EXPLR_MCBIST_MCBMR0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBCFGQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCB_CNTLQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCB_CNTLSTATQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBSTATQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBMCATQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBPARMQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBAGRAQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MBSEC1Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MBSTRQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBISTFIRQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBAMR0A0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBAMR1A0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBAMR2A0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBAMR3A0Q</scomRegister> - - <scomRegister>EXPLR_MCBIST_MCBFD0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD1Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD2Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD3Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD4Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD5Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD6Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBFD7Q</scomRegister> - - <scomRegister>EXPLR_MCBIST_MCBSA0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBSA1Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBSA2Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBSA3Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBEA0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBEA1Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBEA2Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBEA3Q</scomRegister> - </registerFfdc> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_COMPARE_ERROR_IN_LAST_PATTERN</rc> - <description>A miscompare error was caused by the last MCBIST pattern</description> - <ffdc>PORT</ffdc> - <ffdc>SUBTEST</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_ERROR_IN_LAST_PATTERN</rc> - <description>An error was caused by the last MCBIST pattern</description> - <ffdc>STATUS0</ffdc> - <ffdc>STATUS1</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_MCBIST_FAILED_TO_START</rc> - <description>The MCBIST engine failed to start its program</description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_PORT_NOT_FUNCTIONAL</rc> - <description>The port used in an MCBIST program is not functional</description> - <ffdc>RELATIVE_PORT_POSITION</ffdc> - <ffdc>ADDRESS</ffdc> - <ffdc>MC_TARGET</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <procedure>CODE</procedure> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_SUPERFAST_INIT_FAILED_TO_INIT</rc> - <description>A superfast init operation failed initialization</description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_SUPERFAST_READ_FAILED_TO_INIT</rc> - <description>A superfast read operation failed initialization</description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_MCBIST_FAILED_TO_STOP</rc> - <description>The MCBIST engine failed to stop its program</description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <ffdc>POLL_COUNT</ffdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_CONTINUOUS_SCRUB_FAILED_TO_INIT</rc> - <description>A continuous scrub operation failed initialization</description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_TARGETED_SCRUB_FAILED_TO_INIT</rc> - <description>A continuous scrub operation failed initialization</description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MEMDIAGS_ALREADY_AT_BOUNDARY</rc> - <description>A continue request asked to stop at a boundary, but we are there already</description> - <ffdc>MC_TARGET</ffdc> - <ffdc>BOUNDARY</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <procedure>CODE</procedure> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_MCBIST_TIMEOUT</rc> - <description> - MCBIST program failed to return in the time allowed - Software timer, MCBIST has not finished in the time allowed - </description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MC_TARGET</target> - </deconfigure> - <gard> - <target>MC_TARGET</target> - </gard> - </hwpError> - - <hwpError> - <rc>RC_EXP_MCBIST_DATA_FAIL</rc> - <description> - MCBIST program appeared to have failed, but set conflicting bits in the status register - </description> - <ffdc>STATUS_REGISTER</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MC_TARGET</target> - </deconfigure> - <gard> - <target>MC_TARGET</target> - </gard> - </hwpError> - - <hwpError> - <rc>RC_EXP_MCBIST_UNKNOWN_FAILURE</rc> - <description>MCBIST program reported a failure but no error status was found</description> - <ffdc>STATUS_REGISTER</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_MEMDIAGS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MC_TARGET</target> - </deconfigure> - <gard> - <target>MC_TARGET</target> - </gard> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_DRAMINIT_BAD_NUM_RANKS</rc> - <description>Bad number of ranks were passed in the bad bits functionality</description> - <ffdc>TARGET</ffdc> - <ffdc>NUM_RANKS</ffdc> - <ffdc>MAX_RANKS</ffdc> - <callout> - <target>CODE</target> - <priority>HIGH</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_DRAMINIT_UNSUPPORTED_DIMM_TYPE</rc> - <description>Unsupported DIMM type encountered in draminit_training procedure</description> - <ffdc>OCMB_TARGET</ffdc> - <ffdc>PORT</ffdc> - <ffdc>TYPE</ffdc> - <callout> - <target>OCMB_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>OCMB_TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_DRAMINIT_UNSUPPORTED_DRAM_WIDTH</rc> - <description>Unsupported DRAM width encountered in draminit_training procedure</description> - <ffdc>OCMB_TARGET</ffdc> - <ffdc>PORT</ffdc> - <ffdc>DATA_WIDTH</ffdc> - <callout> - <target>OCMB_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>OCMB_TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_DRAMINIT_UNSUPPORTED_3DS_HEIGHT</rc> - <description>Unsupported 3DS height encountered in draminit_training procedure</description> - <ffdc>OCMB_TARGET</ffdc> - <ffdc>PORT</ffdc> - <ffdc>HEIGHT</ffdc> - <callout> - <target>OCMB_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>OCMB_TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_ENTERPRISE_SETUP_ERROR</rc> - <description>The enterprise mode bit is in the incorrect state</description> - <ffdc>EXPECTED</ffdc> - <ffdc>ACTUAL</ffdc> - <ffdc>REGISTER_DATA</ffdc> - <callout> - <target>OCMB_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>OCMB_TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_I2C_FW_STATUS_CODE_FAILED</rc> - <description> - Explorer status code for command ID EXP_FW_STATUS - did not return SUCCESS - </description> - <ffdc>TARGET</ffdc> - <ffdc>STATUS_CODE</ffdc> - <ffdc>CMD_ID</ffdc> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_I2C_FW_STATUS_BUSY</rc> - <description> - Received FW_BUSY status after polling timeout for - command ID EXP_FW_STATUS - </description> - <ffdc>TARGET</ffdc> - <ffdc>STATUS_CODE</ffdc> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_I2C_WRONG_BOOT_STAGE</rc> - <description> - Received incorrect boot stage from - command ID EXP_FW_STATUS - </description> - <ffdc>TARGET</ffdc> - <ffdc>BOOT_STAGE</ffdc> - <ffdc>EXPECTED_BOOT_STAGE</ffdc> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_I2C_POLLING_TIMEOUT</rc> - <description> - Polling the explorer I2C slave interface for an ACK - timed out. - </description> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_STATUS_POLLING_TIMEOUT</rc> - <description> - Polling the explorer for successful return code - timed out. - </description> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_RSP_ARG_FAILED</rc> - <description> - The response_argument field of the host_fw_response_struct returned a FAILURE - </description> - <ffdc>RSP_ID</ffdc> - <ffdc>ERROR_CODE</ffdc> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_SENSOR_CACHE_ENABLE_FAILED</rc> - <description> - The response_argument field of the host_fw_response_struct returned - a FAILURE for enabling sensor cache - </description> - <ffdc>RSP_ID</ffdc> - <ffdc>ERROR_CODE</ffdc> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <registerFfdc> - <id>REG_FFDC_EXP_CCS_FAILURE</id> - <scomRegister>EXPLR_MCBIST_CCS_MODEQ</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_STATQ</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_CNTLQ</scomRegister> - <scomRegister>EXPLR_MCBIST_MCBMCATQ</scomRegister> - - <!-- Instructions --> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_00</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_01</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_02</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_03</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_04</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_05</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_06</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_07</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_08</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_09</scomRegister> - - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_10</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_11</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_12</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_13</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_14</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_15</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_16</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_17</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_18</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_19</scomRegister> - - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_20</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_21</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_22</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_23</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_24</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_25</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_26</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_27</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_28</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_29</scomRegister> - - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_30</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR0_31</scomRegister> - - <!-- Control array --> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_00</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_01</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_02</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_03</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_04</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_05</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_06</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_07</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_08</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_09</scomRegister> - - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_10</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_11</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_12</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_13</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_14</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_15</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_16</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_17</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_18</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_19</scomRegister> - - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_20</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_21</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_22</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_23</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_24</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_25</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_26</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_27</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_28</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_29</scomRegister> - - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_30</scomRegister> - <scomRegister>EXPLR_MCBIST_CCS_INST_ARR1_31</scomRegister> - - <!-- to get the CCS state machine hung state --> - <scomRegister>EXPLR_MCBIST_MBA_MCBERRPT0Q</scomRegister> - <scomRegister>EXPLR_MCBIST_MBA_MCBERRPT1Q</scomRegister> - </registerFfdc> - - <hwpError> - <rc>RC_MSS_EXP_CCS_READ_MISCOMPARE</rc> - <description> - CCS reports a read miscompare. - </description> - <ffdc>FAIL_TYPE</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_CCS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>PORT_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>PORT_TARGET</target> - </deconfigure> - <gard> - <target>PORT_TARGET</target> - </gard> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_CCS_UE_SUE</rc> - <description> - CCS reports a UE or SUE in the CCS program array - Chould be an indicator of corruption in the CCS program - </description> - <ffdc>FAIL_TYPE</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_CCS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MC_TARGET</target> - </deconfigure> - <gard> - <target>MC_TARGET</target> - </gard> - </hwpError> - - <hwpError> - <rc>RC_MSS_EXP_CCS_HUNG</rc> - <description> - Software reported that the machine is not seeing the CCS finish in the alloted time - </description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_CCS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MC_TARGET</target> - </deconfigure> - <gard> - <target>MC_TARGET</target> - </gard> - <callout> - <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - </hwpError> - - <hwpError> - <rc>RC_EXP_CCS_HUNG_TRYING_TO_STOP</rc> - <description> - CCS failed to return from in-progress status while trying to stop a previous program - Software reported that CCS did not finish in alloted time after manually triggering stop - </description> - <collectRegisterFfdc> - <id>REG_FFDC_EXP_CCS_FAILURE</id> - <target>MC_TARGET</target> - <targetType>TARGET_TYPE_OCMB_CHIP</targetType> - </collectRegisterFfdc> - <callout> - <target>MC_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MC_TARGET</target> - </deconfigure> - <gard> - <target>MC_TARGET</target> - </gard> - </hwpError> - -</hwpErrors> |
