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-rw-r--r--hwpf/src/plat/target.C4
-rw-r--r--sbe/sbefw/sberegaccess.C39
-rw-r--r--sbe/sbefw/sberegaccess.H8
3 files changed, 30 insertions, 21 deletions
diff --git a/hwpf/src/plat/target.C b/hwpf/src/plat/target.C
index 4a95e637..15bc397c 100644
--- a/hwpf/src/plat/target.C
+++ b/hwpf/src/plat/target.C
@@ -447,10 +447,6 @@ fapi_try_exit:
FAPI_DBG("ATTR_EQ_GARD:: 0x%08x", l_eqGards);
FAPI_DBG("ATTR_EC_GARD:: 0x%08x", l_ecGards);
- // Normalize the values read from the attributes (they are right aligned)
- l_eqGards <<= ((sizeof(l_eqGards) * 8) - EQ_TARGET_COUNT);
- l_ecGards <<= ((sizeof(l_ecGards) * 8) - CORE_TARGET_COUNT);
-
// Iterate over the bits in EQ and EC gards, if set, mark the
// corresponding target non-functional
// TODO: Need to mark corresponding EX targets non-functional when we
diff --git a/sbe/sbefw/sberegaccess.C b/sbe/sbefw/sberegaccess.C
index be5bdb2a..2dbbe8b3 100644
--- a/sbe/sbefw/sberegaccess.C
+++ b/sbe/sbefw/sberegaccess.C
@@ -9,6 +9,7 @@
#include "sbetrace.H"
#include "fapi2.H"
#include <ppe42_scom.h>
+#include <p9_perv_scom_addresses.H>
using namespace fapi2;
@@ -31,7 +32,7 @@ uint32_t SbeRegAccess::init()
}
Target<TARGET_TYPE_PROC_CHIP> l_chip = plat_getChipTarget();
// Read SBE messaging register into iv_messagingReg
- l_rc = getscom_abs(SBE_MESSAGING_REGISTER_ADDR, &iv_messagingReg);
+ l_rc = getscom_abs(PERV_SB_MSG_SCOM, &iv_messagingReg);
if(PCB_ERROR_NONE != l_rc)
{
SBE_ERROR(SBE_FUNC"Failed reading sbe messaging reg., RC: 0x%08X. ",
@@ -40,7 +41,7 @@ uint32_t SbeRegAccess::init()
}
// Read Mailbox register 8 to check if the mailbox registers 3 and 6 are
// valid
- l_rc = getscom_abs(SBE_MBX8_REGISTER_ADDR, &l_mbx8);
+ l_rc = getscom_abs(PERV_SCRATCH_REGISTER_8_SCOM, &l_mbx8);
if(PCB_ERROR_NONE != l_rc)
{
SBE_ERROR(SBE_FUNC"Failed reading mailbox reg 7, RC: 0x%08X. ",
@@ -50,7 +51,7 @@ uint32_t SbeRegAccess::init()
if(l_mbx8 & SBE_MBX8_MBX3_VALID_MASK)
{
// Read MBX3
- l_rc = getscom_abs(SBE_MBX3_REGISTER_ADDR, &iv_mbx3);
+ l_rc = getscom_abs(PERV_SCRATCH_REGISTER_3_SCOM, &iv_mbx3);
if(PCB_ERROR_NONE != l_rc)
{
SBE_ERROR(SBE_FUNC"Failed reading mailbox reg 3, RC: 0x%08X. ",
@@ -78,7 +79,7 @@ uint32_t SbeRegAccess::init()
if(l_mbx8 & SBE_MBX8_MBX6_VALID_MASK)
{
// Read MBX6
- l_rc = getscom_abs(SBE_MBX6_REGISTER_ADDR, &iv_mbx6);
+ l_rc = getscom_abs(PERV_SCRATCH_REGISTER_6_SCOM, &iv_mbx6);
if(PCB_ERROR_NONE != l_rc)
{
SBE_ERROR(SBE_FUNC"Failed reading mailbox reg 6, RC: 0x%08X. "
@@ -86,9 +87,27 @@ uint32_t SbeRegAccess::init()
break;
}
}
- // TODO via RTC:150291 Need to get the exact attribute name that
- // provides the master/slave role
+ // If the master/slave bit is 0 (either default or read from mbx6),
+ // check the C4 board pin to determine role
+ if(0 == iv_isSlave)
+ {
+ uint64_t l_sbeDevIdReg = 0;
+ // Read device ID register
+ l_rc = getscom_abs(PERV_DEVICE_ID_REG, &l_sbeDevIdReg);
+ if(PCB_ERROR_NONE != l_rc)
+ {
+ SBE_ERROR(SBE_FUNC"Failed reading device id reg, RC: 0x%08X. "
+ l_rc);
+ break;
+ }
+ iv_isSlave = l_sbeDevIdReg & SBE_DEV_ID_C4_PIN_MASK;
+ SBE_DEBUG(SBE_FUNC"Overriding master/slave with data read from "
+ "C4 pin: HI: 0x%08X, LO: 0x%08X",
+ (uint32_t)(l_sbeDevIdReg >> 32),
+ (uint32_t)(l_sbeDevIdReg & 0xFFFFFFFF));
+ }
} while(false);
+
SBE_DEBUG(SBE_FUNC"Read mailbox registers: mbx8: 0x%08X, mbx3: 0x%08X, "
"mbx6: 0x%08X", (uint32_t)(l_mbx8 >> 32),
(uint32_t)(iv_mbx3 >> 32), (uint32_t)(iv_mbx6 >> 32));
@@ -115,7 +134,7 @@ uint32_t SbeRegAccess::updateSbeState(const sbeState &i_state)
iv_prevState = iv_currState;
iv_currState = i_state;
- l_rc = putscom_abs(SBE_MESSAGING_REGISTER_ADDR, iv_messagingReg);
+ l_rc = putscom_abs(PERV_SB_MSG_SCOM, iv_messagingReg);
if(PCB_ERROR_NONE != l_rc)
{
SBE_ERROR(SBE_FUNC"Failed to update state to messaging "
@@ -145,7 +164,7 @@ uint32_t SbeRegAccess::updateSbeStep(const uint8_t i_major,
iv_majorStep = i_major;
iv_minorStep = i_minor;
- l_rc = putscom_abs(SBE_MESSAGING_REGISTER_ADDR, iv_messagingReg);
+ l_rc = putscom_abs(PERV_SB_MSG_SCOM, iv_messagingReg);
if(l_rc)
{
SBE_ERROR(SBE_FUNC"Failed to update SBE step to messaging "
@@ -170,7 +189,7 @@ uint32_t SbeRegAccess::setSbeReady()
uint32_t l_rc = 0;
iv_sbeBooted = true;
- l_rc = putscom_abs(SBE_MESSAGING_REGISTER_ADDR, iv_messagingReg);
+ l_rc = putscom_abs(PERV_SB_MSG_SCOM, iv_messagingReg);
if(l_rc)
{
SBE_ERROR(SBE_FUNC"Failed to update SBE ready state to "
@@ -198,7 +217,7 @@ uint32_t SbeRegAccess::setMpIplMode(const bool i_set)
uint8_t l_set = i_set;
iv_mpiplMode = i_set;
FAPI_ATTR_SET(ATTR_IS_MPIPL, Target<TARGET_TYPE_SYSTEM>(), l_set);
- l_rc = putscom_abs(SBE_MBX3_REGISTER_ADDR, iv_mbx3);
+ l_rc = putscom_abs(PERV_SCRATCH_REGISTER_3_SCOM, iv_mbx3);
if(l_rc)
{
SBE_ERROR(SBE_FUNC"Failed to set/clear MPIPL flag in "
diff --git a/sbe/sbefw/sberegaccess.H b/sbe/sbefw/sberegaccess.H
index 5f0005d1..e89f4d82 100644
--- a/sbe/sbefw/sberegaccess.H
+++ b/sbe/sbefw/sberegaccess.H
@@ -214,17 +214,11 @@ class SbeRegAccess
uint64_t iv_messagingReg;
};
- // Scom address definitions for mailbox scratch registers, note that the
- // mailbox numbering starts at 0
- static const uint32_t SBE_MESSAGING_REGISTER_ADDR = 0x50009;
- static const uint32_t SBE_MBX3_REGISTER_ADDR = 0x5003A;
- static const uint32_t SBE_MBX6_REGISTER_ADDR = 0x5003D;
- static const uint32_t SBE_MBX8_REGISTER_ADDR = 0x5003F;
-
// Bit masks defining bits in the above registers that the SBE is
// interested in
static const uint64_t SBE_MBX8_MBX3_VALID_MASK = 0x2000000000000000ULL;
static const uint64_t SBE_MBX8_MBX6_VALID_MASK = 0x0400000000000000ULL;
+ static const uint64_t SBE_DEV_ID_C4_PIN_MASK = 0x0000000000800000ULL;
};
#endif //__SBEFW_SBEREGACCESS_H
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