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-rw-r--r--src/build/Makefile25
-rw-r--r--src/build/img_defs.mk18
-rw-r--r--src/build/linkerscripts/linksbe.cmd28
-rw-r--r--src/sbefw/sbecmdcntlinst.C13
-rw-r--r--src/sbefw/sbecmdcntrldmt.C8
-rw-r--r--src/sbefw/sbecmdiplcontrol.C33
-rw-r--r--src/sbefw/sbecmdmemaccess.C30
-rw-r--r--src/sbefw/sbecmdregaccess.C20
-rw-r--r--src/sbefw/sbecmdsram.C9
-rw-r--r--src/sbefw/sbeutil.H27
-rwxr-xr-xsrc/test/framework/build-script5
-rwxr-xr-xsrc/tools/utils/sbeCmvcConstants.py8
-rwxr-xr-xsrc/tools/utils/sbePrime.py4
13 files changed, 157 insertions, 71 deletions
diff --git a/src/build/Makefile b/src/build/Makefile
index 11413045..f83fab18 100644
--- a/src/build/Makefile
+++ b/src/build/Makefile
@@ -98,15 +98,14 @@ LIB_DIRS += -L$(OBJDIR)/pm
PMLIB := $(OBJDIR)/pm/libpm.a
LLIBS += -lpm
-SIMICS_PPE_TAR_FILES += $(IMG_DIR)/$(IMAGE_SBE_NAME).out
-SIMICS_PPE_TAR_FILES += $(IMG_DIR)/$(IMAGE_SBE_NAME).map
-SIMICS_PPE_TAR_FILES += $(IMG_DIR)/$(IMAGE_SBE_NAME).dis
SIMICS_PPE_TAR_FILES += $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).out
SIMICS_PPE_TAR_FILES += $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).map
SIMICS_PPE_TAR_FILES += $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).dis
+ifeq ($(img), seeprom)
SIMICS_PPE_TAR_FILES += $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out
SIMICS_PPE_TAR_FILES += $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).map
SIMICS_PPE_TAR_FILES += $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).dis
+endif
SIMICS_PPE_TAR_FILES += $(IMG_DIR)/sbe.syms
SIMICS_PPE_TAR_FILES += $(TEST_SRCDIR)/*.xml
SIMICS_PPE_TAR_FILES += $(TEST_SRCDIR)/*.py
@@ -154,6 +153,7 @@ $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out: ppe_trace_bin buildInfo $(SUBDIRS) $(LINK_
$(LINK_SCRIPT_SEEPROM): $(LINKER_DIR)/linkseeprom.cmd
$(CPP) -I $(INCLUDES) -E -x c++ -P $(DEFS) $(LINKER_DIR)/linkseeprom.cmd -o $(LINK_SCRIPT_SEEPROM)
+ifeq ($(img), pibmem)
# ---- PIBMEM Image ------
#This removes all unecessary headers from the ELF executable
$(IMG_DIR)/$(IMAGE_SBE_NAME).bin $(IMG_DIR)/$(IMAGE_SBE_NAME).dis: $(IMG_DIR)/$(IMAGE_SBE_NAME).out
@@ -161,7 +161,6 @@ $(IMG_DIR)/$(IMAGE_SBE_NAME).bin $(IMG_DIR)/$(IMAGE_SBE_NAME).dis: $(IMG_DIR)/$(
0x`/usr/bin/nm $(IMG_DIR)/$(IMAGE_SBE_NAME).out | grep "A _sbe_end" \
| cut -d " " -f 1`
$(OBJDUMP) -S $< > $(IMG_DIR)/$(IMAGE_SBE_NAME).dis
- $(NM) $< > $(IMG_DIR)/$(IMAGE_SBE_NAME).syms
# create a linked ELF executable
$(IMG_DIR)/$(IMAGE_SBE_NAME).out: ppe_trace_bin buildInfo $(SUBDIRS) $(LINK_OBJS) $(LINK_SCRIPT_SBE)
@@ -170,10 +169,18 @@ $(IMG_DIR)/$(IMAGE_SBE_NAME).out: ppe_trace_bin buildInfo $(SUBDIRS) $(LINK_OBJ
# pass the link command file through the C preprocessor to evaluate macros and remove comments
$(LINK_SCRIPT_SBE): $(LINKER_DIR)/linksbe.cmd
$(CPP) -E -x c++ -I $(INCLUDES) -P $(DEFS) $(LINKER_DIR)/linksbe.cmd -o $(LINK_SCRIPT_SBE)
+endif
-all: $(OBJDIR) xml $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).bin $(IMG_DIR)/$(IMAGE_SBE_NAME).bin \
+ifeq ($(img), pibmem)
+all: $(OBJDIR) xml \
+ $(IMG_DIR)/$(IMAGE_SBE_NAME).bin \
+ symbols tracehash
+endif
+ifeq ($(img), seeprom)
+all: $(OBJDIR) xml $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).bin \
$(SBE_TOOLS) normalize defaultset $(IMG_DIR)/fixed.bin appendloader \
appendoverrides add_LoaderAddr symbols tracehash buildinfo report
+endif
install: all
@echo "Installing simics.tar"
@@ -203,9 +210,15 @@ add_LoaderAddr: $(P9_XIP_TOOL) $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out
$(P9_XIP_TOOL) $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).bin set L2_LoaderAddr 0x`nm $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).out | grep __l2_loader_setup | cut -f 1 -d " "`
$(P9_XIP_TOOL) $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).bin set kernelAddr 0x`nm $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out | grep __pk_boot | cut -f 1 -d " "`
-symbols: $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).out $(IMG_DIR)/$(IMAGE_SBE_NAME).out
+ifeq ($(img), seeprom)
+symbols: $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).out
$(NM) $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).out > $(IMG_DIR)/$(SBE_SYMBOLS_NAME)
$(NM) $(BOOT_OBJDIR)/$(IMAGE_LOADER_NAME).out >> $(IMG_DIR)/$(SBE_SYMBOLS_NAME)
+endif
+ifeq ($(img), pibmem)
+symbols: $(IMG_DIR)/$(IMAGE_SBE_NAME).out
+ $(NM) $(IMG_DIR)/$(IMAGE_SBE_NAME).out > $(IMG_DIR)/$(SBE_SYMBOLS_NAME)
+endif
report: $(P9_XIP_TOOL) $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).bin
$(P9_XIP_TOOL) $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).bin report > $(IMG_DIR)/$(IMAGE_SEEPROM_NAME).rpt
diff --git a/src/build/img_defs.mk b/src/build/img_defs.mk
index ad8f3a9c..999d7105 100644
--- a/src/build/img_defs.mk
+++ b/src/build/img_defs.mk
@@ -433,6 +433,23 @@ GCC-CFLAGS += -mcpu=ppe42
GCC-CFLAGS += -ffunction-sections
GCC-CFLAGS += -fdata-sections
endif
+############################################################################
+# Image settings
+# pass argument img=seeprom/pibmem
+# By default seeprom image is built
+ifndef img
+img = seeprom
+endif
+
+ifeq ($(img), seeprom)
+GCC-DEFS += -DSEEPROM_IMAGE
+endif
+ifeq ($(img), pibmem)
+GCC-DEFS += -DPIBMEM_ONLY_IMAGE
+endif
+
+###########################################################################
+
CFLAGS =
PPE-CFLAGS = $(CFLAGS) -c $(GCC-CFLAGS) $(PIPE-CFLAGS) $(GCC-O-LEVEL) $(INCLUDES)
@@ -446,7 +463,6 @@ ifdef P2P_ENABLE
#use this to disable optimizations (fused compare/branch etc.)
PCP-FLAG = -b
endif
-
############################################################################
#override the GNU Make implicit rule for going from a .C to a .o
diff --git a/src/build/linkerscripts/linksbe.cmd b/src/build/linkerscripts/linksbe.cmd
index 12250a9d..7a5cc5bf 100644
--- a/src/build/linkerscripts/linksbe.cmd
+++ b/src/build/linkerscripts/linksbe.cmd
@@ -35,20 +35,16 @@ OUTPUT_FORMAT(elf32-powerpc);
MEMORY
{
- // increasing ram size as workaround so that pibmem image compilation
- // doe not fail.
- // TODO: Reducing the SBE_BASE_ORIGIN by 0x1F000 to reduce the size of
- // generated sbe_pibmem.bin. Just a workaround to use pibmem for poweron
- sram : ORIGIN = SBE_BASE_ORIGIN - 0x1F000, LENGTH = SBE_BASE_LENGTH + 0x1F000
+ pibmem : ORIGIN = SBE_BASE_ORIGIN, LENGTH = SBE_BASE_LENGTH
}
SECTIONS
{
- . = SBE_BASE_ORIGIN - 0x1F000;
+ . = SBE_BASE_ORIGIN;
- .vectors : {. = ALIGN(512); *(.vectors)} > sram
- .fixed . : {. = ALIGN(512); *(.fixed) } > sram
- .text . : {. = ALIGN(512); *(.text)} > sram
+ .vectors : {. = ALIGN(512); *(.vectors)} > pibmem
+ .fixed . : {. = ALIGN(512); *(.fixed) } > pibmem
+ .text . : {. = ALIGN(512); *(.text)} > pibmem
////////////////////////////////
// Read-only Data
@@ -62,8 +58,8 @@ SECTIONS
// offsets.
_SDA2_BASE_ = .;
- .sdata2 . : { *(.sdata2*) } > sram
- .sbss2 . : { *(.sbss2*) } > sram
+ .sdata2 . : { *(.sdata2*) } > pibmem
+ .sbss2 . : { *(.sbss2*) } > pibmem
// Other read-only data.
@@ -71,7 +67,7 @@ SECTIONS
.rodata . : { ctor_start_address = .;
*(.ctors) *(.ctors.*)
ctor_end_address = .;
- *(rodata*) *(.got2) } > sram
+ *(rodata*) *(.got2) } > pibmem
_RODATA_SECTION_SIZE = . - _RODATA_SECTION_BASE;
@@ -87,16 +83,16 @@ SECTIONS
// offsets.
_SDA_BASE_ = .;
- .sdata . : { *(.sdata*) } > sram
+ .sdata . : { *(.sdata*) } > pibmem
_sbss_start = .;
- .sbss . : { *(.sbss*) } > sram
+ .sbss . : { *(.sbss*) } > pibmem
_sbss_end = .;
// Other read-write data
// It's not clear why boot.S is generating empty .glink,.iplt
- .rela . : { *(.rela*) } > sram
- .rwdata . : { *(.data*) *(.bss*) } > sram
+ .rela . : { *(.rela*) } > pibmem
+ .rwdata . : { *(.data*) *(.bss*) } > pibmem
. = ALIGN(8);
_PK_INITIAL_STACK_LIMIT = .;
diff --git a/src/sbefw/sbecmdcntlinst.C b/src/sbefw/sbecmdcntlinst.C
index 40e5948b..41e1f0ba 100644
--- a/src/sbefw/sbecmdcntlinst.C
+++ b/src/sbefw/sbecmdcntlinst.C
@@ -46,7 +46,9 @@ static const uint8_t SINGLE_THREAD_BIT_MASK = 0x08;
// TODO via RTC 152424
// Currently all proecdures in core directory are in seeprom.
// So we have to use function pointer to force a long call.
+#ifdef SEEPROM_IMAGE
p9_thread_control_FP_t threadCntlhwp = &p9_thread_control;
+#endif
/* @brief Map User Thread Command to Hwp ThreadCommands Enum */
ThreadCommands getThreadCommand(const sbeCntlInstRegMsgHdr_t & i_req)
@@ -144,11 +146,12 @@ uint32_t sbeCntlInst(uint8_t *i_pArg)
do
{
// Call the Procedure
- l_fapiRc = threadCntlhwp(
- l_coreTgt,
- (SINGLE_THREAD_BIT_MASK >> l_thread),
- l_cmd, l_warnCheck,
- l_data64, l_state);
+ SBE_EXEC_HWP(l_fapiRc,
+ threadCntlhwp,
+ l_coreTgt,
+ (SINGLE_THREAD_BIT_MASK >> l_thread),
+ l_cmd, l_warnCheck,
+ l_data64, l_state)
if(l_fapiRc != FAPI2_RC_SUCCESS)
{
diff --git a/src/sbefw/sbecmdcntrldmt.C b/src/sbefw/sbecmdcntrldmt.C
index a1a43c96..d948310b 100644
--- a/src/sbefw/sbecmdcntrldmt.C
+++ b/src/sbefw/sbecmdcntrldmt.C
@@ -45,9 +45,11 @@
using namespace fapi2;
+#ifdef SEEPROM_IMAGE
// Using Function pointer to force long call
p9_sbe_check_master_stop15_FP_t p9_sbe_check_master_stop15_hwp =
&p9_sbe_check_master_stop15;
+#endif
////////////////////////////////////////////////////////////////////
//Static initialization of the Dmt Pk timer
@@ -154,7 +156,7 @@ uint32_t sbeStartCntlDmt()
// Go around a loop till you get FAPI2_RC_SUCCESS
do
{
- l_fapiRc = p9_sbe_check_master_stop15_hwp(l_coreTgt);
+ SBE_EXEC_HWP(l_fapiRc, p9_sbe_check_master_stop15_hwp, l_coreTgt)
//Conversion is required here, since ReturnCode doesn't support
//comparision '!=' or '=='
//TODO RTC:149021
@@ -172,8 +174,8 @@ uint32_t sbeStartCntlDmt()
// Only for Pending and Success case
if(RC_CHECK_MASTER_STOP15_PENDING != l_rcFapi) // Success
{
- l_fapiRc = p9_block_wakeup_intr(l_coreTgt,
- p9pmblockwkup::CLEAR );
+ SBE_EXEC_HWP(l_fapiRc, p9_block_wakeup_intr, l_coreTgt,
+ p9pmblockwkup::CLEAR )
if( l_fapiRc )
{
SBE_ERROR(SBE_FUNC" p9_block_wakeup_intr failed ");
diff --git a/src/sbefw/sbecmdiplcontrol.C b/src/sbefw/sbecmdiplcontrol.C
index 825db91f..962604f1 100644
--- a/src/sbefw/sbecmdiplcontrol.C
+++ b/src/sbefw/sbecmdiplcontrol.C
@@ -124,8 +124,10 @@ ReturnCode istepStartInstruction( sbeIstepHwp_t i_hwp);
ReturnCode istepWithCoreConditional( sbeIstepHwp_t i_hwp);
ReturnCode istepWithEqConditional( sbeIstepHwp_t i_hwp);
+#ifdef SEEPROM_IMAGE
// Using function pointer to force long call.
p9_sbe_select_ex_FP_t p9_sbe_select_ex_hwp = &p9_sbe_select_ex;
+#endif
//structure for mapping SBE wrapper and HWP functions
typedef struct
@@ -167,6 +169,7 @@ sbeRole g_sbeRole = SBE_ROLE_MASTER;
static istepMap_t g_istep2PtrTbl[ ISTEP2_MAX_SUBSTEPS ] =
{
+#ifdef SEEPROM_IMAGE
{ NULL, NULL },
{ &istepAttrSetup, { .procHwp = &p9_sbe_attr_setup }},
{ &istepWithProc, { .procHwp = &p9_sbe_tp_chiplet_init1 }},
@@ -184,10 +187,12 @@ static istepMap_t g_istep2PtrTbl[ ISTEP2_MAX_SUBSTEPS ] =
{ &istepWithProc, { .procHwp = &p9_sbe_tp_initf }},
{ &istepNoOp, NULL }, // DFT only
{ &istepWithProc, { .procHwp = &p9_sbe_tp_chiplet_init3 }},
+#endif
};
static istepMap_t g_istep3PtrTbl[ ISTEP3_MAX_SUBSTEPS ] =
{
+#ifdef SEEPROM_IMAGE
{ &istepWithProc, { .procHwp = &p9_sbe_chiplet_reset }},
{ &istepWithProc, { .procHwp = &p9_sbe_gptr_time_initf }},
{ &istepWithProc, { .procHwp = &p9_sbe_chiplet_pll_initf }},
@@ -210,9 +215,11 @@ static istepMap_t g_istep3PtrTbl[ ISTEP3_MAX_SUBSTEPS ] =
{ &istepCheckSbeMaster, NULL },
{ &istepWithProc, { .procHwp = &p9_sbe_mcs_setup }},
{ &istepSelectEx, NULL },
+#endif
};
static istepMap_t g_istep4PtrTbl[ ISTEP4_MAX_SUBSTEPS ] =
{
+#ifdef SEEPROM_IMAGE
{ &istepWithEq, { .eqHwp = &p9_hcd_cache_poweron} },
{ &istepWithEq, { .eqHwp = &p9_hcd_cache_chiplet_reset } },
{ &istepWithEq, { .eqHwp = &p9_hcd_cache_chiplet_l3_dcc_setup }},
@@ -248,14 +255,17 @@ static istepMap_t g_istep4PtrTbl[ ISTEP4_MAX_SUBSTEPS ] =
{ &istepWithCoreConditional, { .coreHwp = &p9_hcd_core_scomcust }},
{ &istepNoOp, NULL },
{ &istepNoOp, NULL },
+#endif
};
// TODO via RTC 135345
// Add the support for istep 5 HWP
static istepMap_t g_istep5PtrTbl[ ISTEP5_MAX_SUBSTEPS ]
{
+#ifdef SEEPROM_IMAGE
{ &istepLoadBootLoader, NULL },
{ &istepStartInstruction, { .coreHwp = &p9_sbe_instruct_start }},
+#endif
};
// Functions
@@ -461,7 +471,7 @@ ReturnCode istepAttrSetup( sbeIstepHwp_t i_hwp)
do
{
assert( NULL != i_hwp.procHwp );
- rc = i_hwp.procHwp(proc);
+ SBE_EXEC_HWP(rc, i_hwp.procHwp, proc)
if( rc != FAPI2_RC_SUCCESS )
{
break;
@@ -477,20 +487,24 @@ ReturnCode istepAttrSetup( sbeIstepHwp_t i_hwp)
ReturnCode istepWithProc( sbeIstepHwp_t i_hwp)
{
+ ReturnCode rc = FAPI2_RC_SUCCESS;
Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
assert( NULL != i_hwp.procHwp );
- return i_hwp.procHwp(proc);
+ SBE_EXEC_HWP(rc, i_hwp.procHwp,proc)
+ return rc;
}
//----------------------------------------------------------------------------
ReturnCode istepSelectEx( sbeIstepHwp_t i_hwp)
{
+ ReturnCode rc = FAPI2_RC_SUCCESS;
Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
// TODO via RTC 135345
// Once multicast targets are supported, we may need to pass
// p9selectex::ALL as input.
- return p9_sbe_select_ex_hwp(proc, p9selectex::SINGLE);
+ SBE_EXEC_HWP(rc, p9_sbe_select_ex_hwp, proc, p9selectex::SINGLE)
+ return rc;
}
//----------------------------------------------------------------------------
@@ -498,6 +512,7 @@ ReturnCode istepSelectEx( sbeIstepHwp_t i_hwp)
ReturnCode istepWithEq( sbeIstepHwp_t i_hwp)
{
+ ReturnCode rc = FAPI2_RC_SUCCESS;
// TODO via RTC 135345
// Curently we are passing Hard code eq target. Finally it is
// going to be a multicast target. Once multicast support is
@@ -513,13 +528,15 @@ ReturnCode istepWithEq( sbeIstepHwp_t i_hwp)
}
assert( NULL != i_hwp.eqHwp );
- return i_hwp.eqHwp( eqTgt );
+ SBE_EXEC_HWP(rc, i_hwp.eqHwp, eqTgt )
+ return rc;
}
//----------------------------------------------------------------------------
ReturnCode istepWithCore( sbeIstepHwp_t i_hwp)
{
+ ReturnCode rc = FAPI2_RC_SUCCESS;
// TODO via RTC 135345
// Curently we are passing Hard code core target. Finally it is
// going to be a multicast target. Once multicast support is
@@ -534,7 +551,8 @@ ReturnCode istepWithCore( sbeIstepHwp_t i_hwp)
coreTgt = coreList[0];
}
assert( NULL != i_hwp.coreHwp );
- return i_hwp.coreHwp( coreTgt );
+ SBE_EXEC_HWP(rc, i_hwp.coreHwp, coreTgt )
+ return rc;
}
//----------------------------------------------------------------------------
@@ -583,6 +601,7 @@ ReturnCode istepWithCoreConditional( sbeIstepHwp_t i_hwp)
ReturnCode istepLoadBootLoader( sbeIstepHwp_t i_hwp)
{
+ ReturnCode rc = FAPI2_RC_SUCCESS;
// Get master Ex
uint8_t exId = 0;
Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
@@ -593,8 +612,8 @@ ReturnCode istepLoadBootLoader( sbeIstepHwp_t i_hwp)
P9XipHeader *hdr = getXipHdr();
P9XipSection *hbblSection = &(hdr->iv_section[P9_XIP_SECTION_SBE_HBBL]);
- ReturnCode rc = p9_sbe_load_bootloader( proc, exTgt, hbblSection->iv_size,
- getSectionAddr(hbblSection) );
+ SBE_EXEC_HWP(rc, p9_sbe_load_bootloader, proc, exTgt, hbblSection->iv_size,
+ getSectionAddr(hbblSection) )
return rc;
}
diff --git a/src/sbefw/sbecmdmemaccess.C b/src/sbefw/sbecmdmemaccess.C
index cff8e594..84b46dd7 100644
--- a/src/sbefw/sbecmdmemaccess.C
+++ b/src/sbefw/sbecmdmemaccess.C
@@ -318,13 +318,14 @@ uint32_t processPbaRequest(const sbeMemAccessReqMsgHdr_t &i_hdr,
while (l_granulesCompleted < l_lenCacheAligned)
{
// Call the PBA setup HWP
- l_fapiRc = p9_pba_setup(
- l_proc,
- l_ex,
- l_addr,
- i_isFlagRead,
- ((l_isFastMode) ? (1<<PBA_FAST_MODE_SHIFT) : 0),
- l_numGranules);
+ SBE_EXEC_HWP(l_fapiRc,
+ p9_pba_setup,
+ l_proc,
+ l_ex,
+ l_addr,
+ i_isFlagRead,
+ ((l_isFastMode) ? (1<<PBA_FAST_MODE_SHIFT) : 0),
+ l_numGranules)
// if p9_pba_setup returns error
if(l_fapiRc != FAPI2_RC_SUCCESS)
@@ -372,14 +373,15 @@ uint32_t processPbaRequest(const sbeMemAccessReqMsgHdr_t &i_hdr,
CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc);
}
// Call PBA access
- l_fapiRc = p9_pba_access(
+ SBE_EXEC_HWP(l_fapiRc,
+ p9_pba_access,
l_proc,
l_addr,
i_isFlagRead,
((l_isFastMode) ? (1<<PBA_FAST_MODE_SHIFT) : 0),
l_firstGran,
l_lastGran,
- (uint8_t *)&l_dataFifo);
+ (uint8_t *)&l_dataFifo)
// if p9_pba_access returns error
if( l_fapiRc != FAPI2_RC_SUCCESS )
@@ -493,11 +495,12 @@ uint32_t processAduRequest(const sbeMemAccessReqMsgHdr_t &i_hdr,
while (l_granulesCompleted < l_lenCacheAligned)
{
// Call the ADU setup HWP
- l_fapiRc = p9_adu_setup (l_proc,
+ SBE_EXEC_HWP(l_fapiRc,
+ p9_adu_setup,l_proc,
l_addr,
i_isFlagRead,
l_aduSetupFlags,
- l_numGranules);
+ l_numGranules)
// if p9_adu_setup returns error
if( (l_fapiRc != FAPI2_RC_SUCCESS) )
{
@@ -603,14 +606,15 @@ uint32_t processAduRequest(const sbeMemAccessReqMsgHdr_t &i_hdr,
}
// Call ADU access HWP for ADU write/read request
- l_fapiRc = p9_adu_access (
+ SBE_EXEC_HWP(l_fapiRc,
+ p9_adu_access,
l_proc,
l_addr,
i_isFlagRead,
l_aduSetupFlags,
l_firstGran,
l_lastGran,
- &(((uint8_t *)&(l_dataFifo))[l_bufIdx]));
+ &(((uint8_t *)&(l_dataFifo))[l_bufIdx]))
// if p9_adu_access returns error
if( l_fapiRc != FAPI2_RC_SUCCESS )
{
diff --git a/src/sbefw/sbecmdregaccess.C b/src/sbefw/sbecmdregaccess.C
index 860f773a..57492c59 100644
--- a/src/sbefw/sbecmdregaccess.C
+++ b/src/sbefw/sbecmdregaccess.C
@@ -99,11 +99,13 @@ uint32_t sbeGetReg(uint8_t *i_pArg)
break;
}
uint8_t core = regReqMsg.coreChiplet;
+#ifdef SEEPROM_IMAGE
RamCore ramCore( plat_getTargetHandleByChipletNumber
<fapi2::TARGET_TYPE_CORE>(core),
regReqMsg.threadNr );
+#endif
- fapiRc = ramCore.ram_setup();
+ SBE_EXEC_HWP_NOARG(fapiRc, ramCore.ram_setup)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" ram_setup failed. threadNr:0x%x"
@@ -118,8 +120,8 @@ uint32_t sbeGetReg(uint8_t *i_pArg)
uint64_t respData = 0;
for( uint32_t regIdx = 0; regIdx < regReqMsg.numRegs; regIdx++ )
{
- fapiRc = ramCore.get_reg( getRegType(regReqMsg), reqData[regIdx],
- &data64, true );
+ SBE_EXEC_HWP(fapiRc, ramCore.get_reg, getRegType(regReqMsg), reqData[regIdx],
+ &data64, true )
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" get_reg failed. threadNr:0x%x"
@@ -146,7 +148,7 @@ uint32_t sbeGetReg(uint8_t *i_pArg)
{
break;
}
- fapiRc = ramCore.ram_cleanup();
+ SBE_EXEC_HWP_NOARG(fapiRc, ramCore.ram_cleanup)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" ram_cleanup failed. threadNr:0x%x"
@@ -211,11 +213,13 @@ uint32_t sbePutReg(uint8_t *i_pArg)
break;
}
uint8_t core = regReqMsg.coreChiplet;
+#ifdef SEEPROM_IMAGE
RamCore ramCore( plat_getTargetHandleByChipletNumber
<fapi2::TARGET_TYPE_CORE>(core),
regReqMsg.threadNr );
+#endif
- fapiRc = ramCore.ram_setup();
+ SBE_EXEC_HWP_NOARG(fapiRc, ramCore.ram_setup)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" ram_setup failed. threadNr:0x%x"
@@ -230,9 +234,9 @@ uint32_t sbePutReg(uint8_t *i_pArg)
for( uint32_t regIdx = 0; regIdx < regReqMsg.numRegs; regIdx++ )
{
data64 = regPkg[regIdx].getData();
- fapiRc = ramCore.put_reg( getRegType(regReqMsg),
+ SBE_EXEC_HWP(fapiRc, ramCore.put_reg, getRegType(regReqMsg),
regPkg[regIdx].regNr,
- &data64, true );
+ &data64, true )
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" get_reg failed. threadNr:0x%x"
@@ -251,7 +255,7 @@ uint32_t sbePutReg(uint8_t *i_pArg)
{
break;
}
- fapiRc = ramCore.ram_cleanup();
+ SBE_EXEC_HWP_NOARG(fapiRc, ramCore.ram_cleanup)
if( fapiRc )
{
SBE_ERROR(SBE_FUNC" ram_cleanup failed. threadNr:0x%x"
diff --git a/src/sbefw/sbecmdsram.C b/src/sbefw/sbecmdsram.C
index 69850958..d03d3fa5 100644
--- a/src/sbefw/sbecmdsram.C
+++ b/src/sbefw/sbecmdsram.C
@@ -139,9 +139,9 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag)
// Setup Needs to be called in Normal and Debug Mode only
if( (l_req.mode == NORMAL_MODE) || (l_req.mode == DEBUG_MODE) )
{
- l_fapiRc = p9_pm_ocb_indir_setup_linear(l_proc, l_chan,
+ SBE_EXEC_HWP(l_fapiRc, p9_pm_ocb_indir_setup_linear,l_proc, l_chan,
p9ocb::OCB_TYPE_LINSTR,
- l_req.addr);
+ l_req.addr)
if(l_fapiRc != FAPI2_RC_SUCCESS)
{
SBE_ERROR(SBE_FUNC "p9_pm_ocb_indir_setup_linear failed, "
@@ -193,7 +193,8 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag)
// Don't need to put any check for Linear/Circular - It's the same
// API for access, For circular valid address flag is false, Hwp
// doesn't need the address field from us.
- l_fapiRc = p9_pm_ocb_indir_access(
+ SBE_EXEC_HWP(l_fapiRc,
+ p9_pm_ocb_indir_access,
l_proc,
l_chan,
l_ocb_access, // Get/Put
@@ -201,7 +202,7 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag)
l_validAddrForFirstAccess, // If requested addr is valid
l_req.addr, // Requested Addr being passed
l_actLen, // O/p from hwp not used
- (uint64_t *)l_getBuf); // O/p buffer
+ (uint64_t *)l_getBuf) // O/p buffer
if(l_fapiRc != FAPI2_RC_SUCCESS)
{
SBE_ERROR(SBE_FUNC "p9_pm_ocb_indir_access failed, "
diff --git a/src/sbefw/sbeutil.H b/src/sbefw/sbeutil.H
index 425c771c..9bd4bd18 100644
--- a/src/sbefw/sbeutil.H
+++ b/src/sbefw/sbeutil.H
@@ -36,7 +36,32 @@
if ((l_rc) != SBE_SEC_OPERATION_SUCCESSFUL) \
{ \
break; \
-} \
+}
+
+// To handle unused variables compilation error
+static inline void UNUSED(int dummy, ...) {}
+
+// Macro to execute HWP
+#ifdef SEEPROM_IMAGE
+#define SBE_EXEC_HWP_NOARG(...) SBE_EXEC_HWP(__VA_ARGS__)
+#define SBE_EXEC_HWP(fapiRc, hwp, ...) \
+{ \
+ fapiRc = hwp(__VA_ARGS__); \
+}
+#else
+#define SBE_EXEC_HWP_NOARG(fapiRc, hwp) \
+{ \
+ SBE_INFO("Procedure not present in the image:No-Op"); \
+ fapiRc = FAPI2_RC_SUCCESS; \
+}
+#define SBE_EXEC_HWP(fapiRc, hwp, ...) \
+{ \
+ /* handling unused variables */ \
+ UNUSED(0, __VA_ARGS__); \
+ SBE_INFO("Procedure not present in the image:No-Op"); \
+ fapiRc = FAPI2_RC_SUCCESS; \
+}
+#endif
void sbeHandleFifoResponse (const uint32_t i_rc);
diff --git a/src/test/framework/build-script b/src/test/framework/build-script
index e50d129d..3e6c6b2f 100755
--- a/src/test/framework/build-script
+++ b/src/test/framework/build-script
@@ -39,7 +39,10 @@ source "$SBEROOT/src/test/framework/setup-env"
#COPYRIGHT_PID=$!
-# Build .
+# Build PIBMEM Image
+scl enable devtoolset-2 " bash -c \"make install img=pibmem\"" || exit -1
+bash -c "rm -rf $SBEROOT/obj/sbefw" || exit -1
+# Build SEEPROM Image
scl enable devtoolset-2 " bash -c \"make install\"" || exit -1
# Create simics sandbox.
diff --git a/src/tools/utils/sbeCmvcConstants.py b/src/tools/utils/sbeCmvcConstants.py
index 680d3b3b..339d83b7 100755
--- a/src/tools/utils/sbeCmvcConstants.py
+++ b/src/tools/utils/sbeCmvcConstants.py
@@ -66,8 +66,8 @@ SUCCESS_TRACK_STATE = 53
SUCCESS_CI_TRIGGER = 54
# This is a default files list to Check-in
-CMVC_FILE_LIST ="sbe_sp_intf.H,simics.tar,sbe_pibmem.bin,sbe_seeprom.bin,releaseNotes.html"
-CMVC_FILE_UNDO_LIST ="src/sbei/sbfw/sbe_sp_intf.H src/sbei/sbfw/simics.tar src/sbei/sbfw/img/sbe_pibmem.bin src/sbei/sbfw/img/sbe_seeprom.bin,src/sbei/sbfw/releaseNotes.html"
+CMVC_FILE_LIST ="sbe_sp_intf.H,simics.tar,sbe_seeprom.bin,releaseNotes.html"
+CMVC_FILE_UNDO_LIST ="src/sbei/sbfw/sbe_sp_intf.H src/sbei/sbfw/simics.tar src/sbei/sbfw/img/sbe_seeprom.bin,src/sbei/sbfw/releaseNotes.html"
CMVC_DIR_CREATE ="sandbox_"
@@ -77,9 +77,9 @@ SUCCESS_HASH_CHECK = 100
ERROR_HASH_CHECK = 101
-# For Development
+# For Development
ERROR_SANDBOX_EXIST = 200 # Sandbox doesnt exist
ERROR_FILE_INPUT = 201 # User have entered no file
ERROR_BUILD_FAILED = 202 # Compilation failed
ERROR_HOOKING_FILE = 203 # Error while building shell hooks
-FILE_LOOKUP_LIST ="src/sbei/sbfw/sbe_sp_intf.H,src/sbei/sbfw/simics.tar,src/sbei/sbfw/img/sbe_pibmem.bin,src/sbei/sbfw/img/sbe_seeprom.bin,src/sbei/sbfw/releaseNotes.html"
+FILE_LOOKUP_LIST ="src/sbei/sbfw/sbe_sp_intf.H,src/sbei/sbfw/simics.tar,src/sbei/sbfw/img/sbe_seeprom.bin,src/sbei/sbfw/releaseNotes.html"
diff --git a/src/tools/utils/sbePrime.py b/src/tools/utils/sbePrime.py
index 2d5bd764..9afec66c 100755
--- a/src/tools/utils/sbePrime.py
+++ b/src/tools/utils/sbePrime.py
@@ -52,7 +52,7 @@ import sbeCmvcUtility as utilcode
import sbePatchUtility as utilpatch
# Files to copy for sbe prime
-PRIME_FILE_LIST ="sbe_sp_intf.H,simics.tar,sbe_pibmem.bin,sbe_seeprom.bin"
+PRIME_FILE_LIST ="sbe_sp_intf.H,simics.tar,sbe_seeprom.bin"
#-------------------------
# Main Function
@@ -79,7 +79,7 @@ def main():
print " \t and you want to compile, use this option then only"
print " \t -i,--files = [ Optional ] Firmware Files coma ',' separated input file1,file2"
print " \t Only the pre-define listed files bellow:"
- print " \t sbe_sp_intf.H,simics.tar,sbe_pibmem.bin,sbe_seeprom.bin"
+ print " \t sbe_sp_intf.H,simics.tar,sbe_seeprom.bin"
print " \t -r,--rc_file = [ Optional ] The RC file for the sandbox (with absolute path)"
print " \t -n,--no_build = [ Optional ] Flag to determine if sbei component should be compiled"
print " \t -h,--help = Help"
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