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-rw-r--r--src/hwpf/src/plat_ring_traverse.C6
-rw-r--r--src/sbefw/sbeFifoMsgUtils.C5
-rw-r--r--src/sbefw/sbeSpMsg.H4
-rw-r--r--src/sbefw/sbecmdiplcontrol.C7
-rw-r--r--src/sbefw/sbecmdmpipl.C7
-rw-r--r--src/sbefw/sbecmdregaccess.C15
-rw-r--r--src/sbefw/sbecmdringaccess.C4
-rw-r--r--src/sbefw/sbecmdsram.C4
8 files changed, 33 insertions, 19 deletions
diff --git a/src/hwpf/src/plat_ring_traverse.C b/src/hwpf/src/plat_ring_traverse.C
index f93e566d..0c7c8df9 100644
--- a/src/hwpf/src/plat_ring_traverse.C
+++ b/src/hwpf/src/plat_ring_traverse.C
@@ -387,7 +387,7 @@ fapi2::ReturnCode getRS4ImageFromTor(
uint32_t *l_sectionAddr = reinterpret_cast<uint32_t *>(g_seepromAddr +
i_sectionOffset + l_sectionOffset);
- SBE_TRACE ("l_sectionAddr %08X",l_sectionAddr);
+ SBE_TRACE ("l_sectionAddr %08X",(uint32_t)l_sectionAddr);
uint16_t *l_ringTorAddr = NULL;
@@ -431,7 +431,7 @@ fapi2::ReturnCode getRS4ImageFromTor(
// 3. Risk Level
- SBE_TRACE ("ring tor address %04X\n",l_ringTorAddr);
+ SBE_TRACE ("ring tor address %08X\n",(uint32_t)l_ringTorAddr);
// If there are non-base variants of the ring, we'll have to check
// attributes to determine the sequence of ring apply.
@@ -468,7 +468,7 @@ fapi2::ReturnCode getRS4ImageFromTor(
uint8_t *l_addr = reinterpret_cast<uint8_t *>(l_sectionAddr);
uint8_t *l_rs4Address = reinterpret_cast<uint8_t *>
(l_addr + *l_ringTorAddr);
- SBE_TRACE("l_rs4Address %08x",l_rs4Address);
+ SBE_TRACE("l_rs4Address %08x",(uint32_t)l_rs4Address);
l_rc = rs4DecompressionSvc(i_target,l_rs4Address,
i_applyOverride,i_ringMode,l_ringType);
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
diff --git a/src/sbefw/sbeFifoMsgUtils.C b/src/sbefw/sbeFifoMsgUtils.C
index 26085022..99af2802 100644
--- a/src/sbefw/sbeFifoMsgUtils.C
+++ b/src/sbefw/sbeFifoMsgUtils.C
@@ -364,10 +364,11 @@ uint32_t sbeDsSendRespHdr(const sbeRespGenHdr_t &i_hdr,
// If there is a SBE internal failure
if((i_hdr.primaryStatus != SBE_PRI_OPERATION_SUCCESSFUL) ||\
- (i_hdr.secondaryStatus != SBE_SEC_OPERATION_SUCCESSFUL))
+ (i_hdr.secondaryStatus != SBE_SEC_OPERATION_SUCCESSFUL))
{
SBE_ERROR( SBE_FUNC" primaryStatus:0x%08X secondaryStatus:0x%08X",
- i_hdr.primaryStatus, i_hdr.secondaryStatus);
+ (uint32_t)i_hdr.primaryStatus,
+ (uint32_t)i_hdr.secondaryStatus);
//Add FFDC data as well.
//Generate all the fields of FFDC package
diff --git a/src/sbefw/sbeSpMsg.H b/src/sbefw/sbeSpMsg.H
index 3b0cc6ff..ace397ce 100644
--- a/src/sbefw/sbeSpMsg.H
+++ b/src/sbefw/sbeSpMsg.H
@@ -569,7 +569,7 @@ typedef struct
default:
SBE_ERROR(SBE_FUNC "Invalid TargetType[%d] ChipletId[%d] "
- "by User",targetType,chipletId);
+ "by User",(uint32_t)targetType,(uint32_t)chipletId);
break;
}
return l_validatePassFlag;
@@ -603,7 +603,7 @@ typedef struct
!((threadNum <= SMT4_THREAD3) || (threadNum == SMT4_THREAD_ALL)))
{
SBE_ERROR(SBE_FUNC "Invalid Parameter by User, ThreadOps[%d] "
- "mode[%d] ThreadNum[%d]", threadOps, mode, threadNum);
+ "mode[%d] ThreadNum[%d]", (uint32_t)threadOps, (uint32_t)mode, (uint32_t)threadNum);
l_validatePassFlag = false;
}
return l_validatePassFlag;
diff --git a/src/sbefw/sbecmdiplcontrol.C b/src/sbefw/sbecmdiplcontrol.C
index 0f92c966..1558ac47 100644
--- a/src/sbefw/sbecmdiplcontrol.C
+++ b/src/sbefw/sbecmdiplcontrol.C
@@ -385,7 +385,8 @@ uint32_t sbeHandleIstep (uint8_t *i_pArg)
if( false == validateIstep( req.major, req.minor ) )
{
SBE_ERROR(SBE_FUNC" Invalid Istep. major:0x%08x"
- " minor:0x%08x", req.major, req.minor);
+ " minor:0x%08x",
+ (uint32_t)req.major, (uint32_t)req.minor);
// @TODO via RTC 132295.
// Need to change code asper better error handling.
respHdr.setStatus( SBE_PRI_INVALID_DATA,
@@ -397,7 +398,9 @@ uint32_t sbeHandleIstep (uint8_t *i_pArg)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" sbeExecuteIstep() Failed. major:0x%08x"
- " minor:0x%08x", req.major, req.minor);
+ " minor:0x%08x",
+ (uint32_t)req.major,
+ (uint32_t)req.minor);
respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
ffdc.setRc(fapiRc);
diff --git a/src/sbefw/sbecmdmpipl.C b/src/sbefw/sbecmdmpipl.C
index f6faf10d..ad519f68 100644
--- a/src/sbefw/sbecmdmpipl.C
+++ b/src/sbefw/sbecmdmpipl.C
@@ -196,7 +196,8 @@ uint32_t sbeStopClocks(uint8_t *i_pArg)
CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc);
SBE_INFO(SBE_FUNC "TargetType 0x%04X ChipletId 0x%02X",
- l_reqMsg.targetType, l_reqMsg.chipletId);
+ (uint16_t)l_reqMsg.targetType,
+ (uint8_t)l_reqMsg.chipletId);
if(false == l_reqMsg.validateInputTargetType())
{
@@ -268,7 +269,9 @@ uint32_t sbeStopClocks(uint8_t *i_pArg)
if( l_fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" Stopclocks failed for TargetType [0x%04X] "
- "ChipletId [0x%02X]", l_reqMsg.targetType, l_reqMsg.chipletId);
+ "ChipletId [0x%02X]",
+ (uint16_t)l_reqMsg.targetType,
+ (uint8_t)l_reqMsg.chipletId);
l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
l_ffdc.setRc(l_fapiRc);
diff --git a/src/sbefw/sbecmdregaccess.C b/src/sbefw/sbecmdregaccess.C
index 57492c59..dd5f4e89 100644
--- a/src/sbefw/sbecmdregaccess.C
+++ b/src/sbefw/sbecmdregaccess.C
@@ -109,7 +109,7 @@ uint32_t sbeGetReg(uint8_t *i_pArg)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" ram_setup failed. threadNr:0x%x"
- "chipletId:0x%02x", regReqMsg.threadNr, core);
+ "chipletId:0x%02x", (uint32_t)regReqMsg.threadNr, core);
respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
ffdc.setRc(fapiRc);
@@ -152,7 +152,7 @@ uint32_t sbeGetReg(uint8_t *i_pArg)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" ram_cleanup failed. threadNr:0x%x"
- "chipletId:0x%02x", regReqMsg.threadNr, core);
+ "chipletId:0x%02x", (uint32_t)regReqMsg.threadNr, core);
respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
ffdc.setRc(fapiRc);
@@ -197,8 +197,10 @@ uint32_t sbePutReg(uint8_t *i_pArg)
if( false == regReqMsg.isValidRequest() )
{
SBE_ERROR(SBE_FUNC" Invalid request. threadNr:0x%x"
- " regType:0x%02x numRegs:0x%02x", regReqMsg.threadNr,
- regReqMsg.regType, regReqMsg.numRegs);
+ " regType:0x%02x numRegs:0x%02x",
+ (uint32_t)regReqMsg.threadNr,
+ (uint32_t)regReqMsg.regType,
+ (uint32_t)regReqMsg.numRegs);
respHdr.setStatus( SBE_PRI_INVALID_DATA,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
break;
@@ -223,7 +225,7 @@ uint32_t sbePutReg(uint8_t *i_pArg)
if( fapiRc != FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC" ram_setup failed. threadNr:0x%x"
- "chipletId:0x%02x", regReqMsg.threadNr, core);
+ "chipletId:0x%02x", (uint32_t)regReqMsg.threadNr, core);
respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
ffdc.setRc(fapiRc);
@@ -259,7 +261,8 @@ uint32_t sbePutReg(uint8_t *i_pArg)
if( fapiRc )
{
SBE_ERROR(SBE_FUNC" ram_cleanup failed. threadNr:0x%x"
- " chipletId:0x%02x", regReqMsg.threadNr, core);
+ " chipletId:0x%02x",
+ (uint32_t)regReqMsg.threadNr, core);
respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
ffdc.setRc(fapiRc);
diff --git a/src/sbefw/sbecmdringaccess.C b/src/sbefw/sbecmdringaccess.C
index c0e7cb0e..071647cb 100644
--- a/src/sbefw/sbecmdringaccess.C
+++ b/src/sbefw/sbecmdringaccess.C
@@ -136,7 +136,9 @@ uint32_t sbeGetRing(uint8_t *i_pArg)
SBE_INFO(SBE_FUNC "Ring Address 0x%08X User Ring Mode 0x%04X "
"Length in Bits 0x%08X",
- l_reqMsg.ringAddr, l_reqMsg.ringMode, l_reqMsg.ringLenInBits);
+ (uint32_t)l_reqMsg.ringAddr,
+ (uint32_t)l_reqMsg.ringMode,
+ (uint32_t)l_reqMsg.ringLenInBits);
uint16_t l_ringMode = sbeToFapiRingMode(l_reqMsg.ringMode);
diff --git a/src/sbefw/sbecmdsram.C b/src/sbefw/sbecmdsram.C
index d03d3fa5..af2a3388 100644
--- a/src/sbefw/sbecmdsram.C
+++ b/src/sbefw/sbecmdsram.C
@@ -93,7 +93,9 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag)
}
SBE_INFO("mode [0x%08X] addr[0x%08X] len[0x%08X]",
- l_req.mode, l_req.addr, l_req.len);
+ (uint32_t)l_req.mode,
+ (uint32_t)l_req.addr,
+ (uint32_t)l_req.len);
// Get the Proc Chip Target to be passed in to the procedure call
Target<fapi2::TARGET_TYPE_PROC_CHIP> l_proc = plat_getChipTarget();
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