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authorYue Du <daviddu@us.ibm.com>2016-10-13 15:54:13 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-10-14 13:29:04 -0400
commite5abfe5f5da515ca51f9ae8524d47822b28e49ea (patch)
tree0e63f1dde43931f5b735de3cf5026a435c65b6c3 /src
parentc13eb5277d013f404cf58dd7336c87d0ea192a23 (diff)
downloadtalos-sbe-e5abfe5f5da515ca51f9ae8524d47822b28e49ea.tar.gz
talos-sbe-e5abfe5f5da515ca51f9ae8524d47822b28e49ea.zip
HW390253: change core scan ratio to 2:1 as clock controller is 2:1
Change-Id: Ib98b02495e189a035e464a5d0ced942a02e0b1ae Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31184 Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31188 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C
index a72b4516..e589933b 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C
@@ -141,9 +141,12 @@ p9_hcd_core_chiplet_reset(
if (l_dpll_bypass == 0)
{
- FAPI_DBG("Set scan ratio to 4:1 in non-bypass mode via OPCG_ALIGN[47-51]");
+ // HW390253: The core clock controller itself is clocked at 2:1 versus the core clock,
+ // so it will introduce an additional 2:1 into whatever scan raito is set up. Hence,
+ // to get the core to scan at 4:1, need to put a scan ratio of 2:1 if run at pll speed.
+ FAPI_DBG("Set scan ratio to 2:1 in non-bypass mode via OPCG_ALIGN[47-51]");
FAPI_TRY(getScom(i_target, C_OPCG_ALIGN, l_data64));
- l_data64.insertFromRight<47, 5>(0x3);
+ l_data64.insertFromRight<47, 5>(0x1);
FAPI_TRY(putScom(i_target, C_OPCG_ALIGN, l_data64));
}
else
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