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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-12-02 13:22:40 -0600 |
|---|---|---|
| committer | spashabk-in <shakeebbk@in.ibm.com> | 2016-12-20 05:18:53 -0600 |
| commit | e1690a0cd6270b3530f83f9e8db5a300e1dea018 (patch) | |
| tree | dda02fb03405be8efaf19b07d8bec8b22d6a311f /src | |
| parent | eb18c5d69d878aa8aac570d01ad16812e8dc35b4 (diff) | |
| download | talos-sbe-e1690a0cd6270b3530f83f9e8db5a300e1dea018.tar.gz talos-sbe-e1690a0cd6270b3530f83f9e8db5a300e1dea018.zip | |
update core internal/external hang timeouts
update base pervasive hang pulse
scale core (internal) / nest (external) hang dividers
resultant timeouts measured at 1866 MHz:
~50ms internal
~1.2s external
Change-Id: I747a059c1f62c334114f9a5324c6f727364c76ac
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33374
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33375
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C | 11 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C | 2 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C index 976a48c0..50f4e40f 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C @@ -42,6 +42,7 @@ //----------------------------------------------------------------------------- #include <p9_quad_scom_addresses.H> +#include <p9_quad_scom_addresses_fld.H> #include <p9_hcd_common.H> #include <p9_core_scom.H> #include "p9_hcd_core_scominit.H" @@ -49,6 +50,8 @@ //----------------------------------------------------------------------------- // Constant Definitions //----------------------------------------------------------------------------- +const uint8_t CORE_HANG_DIVIDER_4X = 0x9F; +const uint8_t CORE_HANG_DIVIDER_64X = 0x7B; //----------------------------------------------------------------------------- // Procedure: Core SCOM Inits @@ -84,6 +87,14 @@ p9_hcd_core_scominit( goto fapi_try_exit; } + // update core hang pulse dividers + FAPI_TRY(getScom(i_target, C_HANG_CONTROL, l_data64), + "Error from getScom (C_HANG_CONTROL)"); + l_data64.insertFromRight<C_HANG_CONTROL_CORE_LIMIT, C_HANG_CONTROL_CORE_LIMIT_LEN>(CORE_HANG_DIVIDER_4X); + l_data64.insertFromRight<C_HANG_CONTROL_NEST_LIMIT, C_HANG_CONTROL_NEST_LIMIT_LEN>(CORE_HANG_DIVIDER_64X); + FAPI_TRY(putScom(i_target, C_HANG_CONTROL, l_data64), + "Error from putScom (C_HANG_CONTROL)"); + fapi_try_exit: FAPI_INF("<<p9_hcd_core_scominit"); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index 2e1ca6eb..c2174c21 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -540,7 +540,7 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup( else if(l_chipletID >= 0x20 && l_chipletID < 0x38) { i_reg0_val = p9SbeChipletReset::HANG_PULSE_0X10; - i_reg1_val = p9SbeChipletReset::HANG_PULSE_0X1A; + i_reg1_val = p9SbeChipletReset::HANG_PULSE_0X17; i_reg5_val = p9SbeChipletReset::HANG_PULSE_0X06; i_reg6_val = p9SbeChipletReset::HANG_PULSE_0X08; } |
