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authorYue Du <daviddu@us.ibm.com>2017-03-25 00:17:16 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-04-18 11:01:03 -0400
commitda1116faab5d1da1b5174b11455f4989c7ce6798 (patch)
tree01f19b505326341c35b6d7e4d25595d397623fcf /src
parenta09a753ff329d1a715ae00a68f1a5cd75333cb7a (diff)
downloadtalos-sbe-da1116faab5d1da1b5174b11455f4989c7ce6798.tar.gz
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STOP: Enable CHTM
CHTM traces use Homer CpmrBase + 0x80000 + 16KB*cme_id When enabled, the CHTM traces are hard coded to 0x20000000 + 16MB*EX Change-Id: I80256273a0b7fc31c2f8b5119108ca34e1599106 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38437 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38438 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml38
1 files changed, 38 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index 6a642b40..430a6f6d 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -1604,6 +1604,44 @@
</attribute>
<!-- ********************************************************************* -->
<attribute>
+ <id>ATTR_CME_CHTM_TRACE_ENABLE</id>
+ <description>
+ Enables the SGPE Hcode to enable the CME instruction traces into the CHTM
+ for debug. Note: all configured CMEs will be put into this
+ mode if this attribute is ON.
+
+ Consumer: p9_hcode_image_build.c ->
+ SGPE Header field
+
+ Platform default: OFF
+ </description>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <valueType>uint8</valueType>
+ <enum>
+ OFF = 0x00, ON = 0x01
+ </enum>
+ <platInit/>
+ <initToZero/>
+ </attribute>
+ <!-- ********************************************************************* -->
+ <attribute>
+ <id>ATTR_CME_CHTM_TRACE_MEMORY_CONFIG</id>
+ <description>
+ CHTM Trace Memory Configuration value goes directly into CHTM_MEM register.
+ User is responsible to put correct data for each bit field of the register.
+
+ Consumer: p9_hcode_image_build.c ->
+ SGPE Header field
+
+ Platform default: 0
+ </description>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <valueType>uint64</valueType>
+ <platInit/>
+ <initToZero/>
+ </attribute>
+ <!-- ********************************************************************* -->
+ <attribute>
<id>ATTR_PGPE_HCODE_FUNCTION_ENABLE</id>
<description>
Enables the PGPE Hcode to physically perform frequency and voltage operations
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