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| author | Srinivas Naga <srinivan@in.ibm.com> | 2016-11-01 21:44:51 +0100 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-11-08 07:51:21 -0500 |
| commit | d79e6a0fc73ec610bb864d4010bfa3d6d811911b (patch) | |
| tree | 0a72b8a184491a5bfa358eb3516bf3797ee2c7ef /src | |
| parent | ae485093385af17094b0bdd244a4a108aec10373 (diff) | |
| download | talos-sbe-d79e6a0fc73ec610bb864d4010bfa3d6d811911b.tar.gz talos-sbe-d79e6a0fc73ec610bb864d4010bfa3d6d811911b.zip | |
Commit for PLL unlock error unmask in pcb slave config reg IPL xls Ver 222
Change-Id: Ic7116ab8e57632112b8cbaa856e5107367c799c9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32083
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32085
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C | 4 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C | 19 |
2 files changed, 23 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C index 0b51aef1..c1cb606c 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C @@ -315,6 +315,10 @@ static fapi2::ReturnCode p9_sbe_chiplet_pll_setup_function( //Setting ERROR_REG register value //ERROR_REG = 0xFFFFFFFFFFFFFFFF FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_ERROR_REG, 0xFFFFFFFFFFFFFFFF)); + FAPI_DBG(" Unmasking pll unlock error in Pcb slave config reg"); + FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_SLAVE_CONFIG_REG, l_data64)); + l_data64.clearBit<12>(); + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_SLAVE_CONFIG_REG, l_data64)); FAPI_INF("p9_sbe_chiplet_pll_setup_function: Exiting ..."); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C index 9c10724b..be89e97d 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C @@ -253,6 +253,25 @@ fapi2::ReturnCode p9_sbe_npll_setup(const l_data64_perv_ctrl0)); } + l_read_reg.flush<1>(); + + // Clear Perv pcb slave error register + // Clearing mask bit in pcb slave config register [bit 12] to allow unlock error + // to propagate to Pervasive Lfir [ bit 21] + if ( l_nest_bypass == 0x0 && l_attr_cp_filter == 0x0 && l_attr_ss_filter == 0x0 && l_attr_io_filter == 0x0 ) + { + + FAPI_DBG(" Reset PCB error reg"); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_ERROR_REG, l_read_reg)); + + FAPI_DBG(" Unmasking pll unlock error in Pcb slave config reg"); + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SLAVE_CONFIG_REG, l_read_reg)); + l_read_reg.clearBit<12>(); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SLAVE_CONFIG_REG, l_read_reg)); + } + + + FAPI_INF("p9_sbe_npll_setup: Exiting ..."); fapi_try_exit: |
