STOP: Add Core quiesce workaround to CME Fit Timer

-- p7:  Added a check for LSU and Nest quiesce as well
-- p8:  Added clear of the TSR FIS to IOTA fit handler
-- p9:  Added stop workaround on checkstop or special attention
-- p10: rebase on disable flag support
-- p11:
1) enable for Cumulus 1.0 and Nimbus 2.0 & 2.1 only
2) disable the livelock buster if special wakeup done is asserted
3) clear the fit_counter when special wakeup done
   or stop entry is done on either core
4) delete CME_FLAGS_DISABLE_PERIODIC_CORE_QUIESCE and
   instead look at bit 2 of CPPMR with dualcast OR
   unless nimbus dd2.0 then you have to
   read both cores and OR because of the bug
-- p12:
1) no longer have PGPE sample OCC Flag bit 13 (back out the change)
2) have SGPE init set CPMMR bit 2 in response to the attribute
   instead of CME flag bit 23.
3) add cme_flags[12] as workaround active bit (nor of both cpmmr[2])
-- p13:
   kills the CME flag, OCC flag and SGPE header flag
   diff commit will establish attr-> cpmmr[2] simple flow
   cme only read cpmmr[2]
-- p14:
   in case of stop0/1, assert pm_exit and poll for it to wake core up
-- p15: rebase
-- p16: add drop pm_exit after workaround
-- p17: add pm_exit delay, remove pm_active=1 poll
        remove some PK_TRACEs, change to unified compiler flag

Change-Id: I855f7f8e4b5ce7275511d581b8e68d10217ab601
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44965
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45134
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

1 files changed, 5 insertions, 29 deletions

diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
index a0b33276..0c57e593 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
@@ -143,31 +143,6 @@ namespace p9hcd
 {
 #endif
 
-//Enum form of CME FLAGs.
-enum PM_CME_CMEFLG_DEFS
-{
-    CME_STOP_READY                      = 0,
-    CME_PMCR_READY                      = 1,
-    CME_QMGR_READY                      = 2,
-    CME_QMGR_MASTER                     = 3,
-    CME_RCLK_OPERABLE                   = 4,
-    CME_IVRM_OPERABLE                   = 5,
-    CME_VDM_OPERABLE                    = 6,
-    CME_OCC_HB_SAFE_MODE                = 7,
-    CME_BLOCK_STOP_EXIT_ENABLED_C0      = 8,
-    CME_BLOCK_STOP_EXIT_ENABLED_C1      = 9,
-    CME_BLOCK_STOP_ENTRY_ENABLED_C0     = 10,
-    CME_BLOCK_STOP_ENTRY_ENABLED_C1     = 11,
-    // Reserve 12:24
-    CME_FREQ_UPDATE_DISABLE             = 25,
-    CME_EX_ID                           = 26,
-    CME_SIBLING_FUNCTIONAL              = 27,
-    CME_STOP_ENTRY_FIRST_C0             = 28,
-    CME_STOP_ENTRY_FIRST_C1             = 29,
-    CME_CORE0_GOOD                      = 30,
-    CME_CORE1_GOOD                      = 31
-};
-
 //Enum form of OCC FLAGs.
 enum PM_GPE_OCCFLG_DEFS
 {
@@ -181,7 +156,6 @@ enum PM_GPE_OCCFLG_DEFS
     SGPE_IGNORE_STOP_ACTION             = 10,
     SGPE_IGNORE_STOP_EXITS              = 11,
     SGPE_IGNORE_STOP_ENTRIES            = 12,
-    OCCFLG_CORE_QUIESCE_WORKARND_DIS    = 13,
     SGPE_24_7_ACTIVATE                  = 14,
     SGPE_24_7_ACTIVE                    = 15,
     PIB_I2C_MASTER_ENGINE_1_LOCK_BIT0   = 16, //BIT0 ored BIT1 gives the field
@@ -223,9 +197,11 @@ enum PM_CME_FLAGS_DEFS
     CME_FLAGS_IVRM_OPERABLE                 = 5,
     CME_FLAGS_VDM_OPERABLE                  = 6,
     CME_FLAGS_OCC_HB_SAFE_MODE              = 7,
-    CME_FLAGS_BLOCK_WKUP_C0                 = 8,
-    CME_FLAGS_BLOCK_WKUP_C1                 = 9,
-    CME_CORE_QUIESCE_WORKARND_DIS           = 23,
+    CME_FLAGS_STOP_BLOCK_EXIT_C0            = 8,
+    CME_FLAGS_STOP_BLOCK_EXIT_C1            = 9,
+    CME_FLAGS_STOP_BLOCK_ENTRY_C0           = 10,
+    CME_FLAGS_STOP_BLOCK_ENTRY_C1           = 11,
+    CME_FLAGS_CORE_QUIESCE_ACTIVE           = 12,
     CME_FLAGS_PSTATES_ENABLED               = 24,
     CME_FLAGS_FREQ_UPDT_DISABLE             = 25,
     CME_FLAGS_EX_ID                         = 26,