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author | Ben Gass <bgass@us.ibm.com> | 2017-03-22 15:57:25 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-04-06 11:01:26 -0400 |
commit | bf390fb845e8b725db86a44f7f79d33234c8ef7b (patch) | |
tree | 44cd58b6575494a9017c8930c81447d59819c9e4 /src | |
parent | f0cc20d3a251e14890c8d39bce29e38b9d6899c4 (diff) | |
download | talos-sbe-bf390fb845e8b725db86a44f7f79d33234c8ef7b.tar.gz talos-sbe-bf390fb845e8b725db86a44f7f79d33234c8ef7b.zip |
Build p9n 10 and 20 by default.
Enabling 20 caused generated initfile procedures to
change.
Chip target needed to be added to p9.fbc.ioo_dl.scom.initfile
Change-Id: Id24aa67f8d2c3f07ef85ed3bf8a555c85b4a0d72
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38324
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38328
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C | 60 |
1 files changed, 50 insertions, 10 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C index 61e33cfa..b4933141 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C @@ -108,10 +108,21 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c52ull, l_scom_buffer )); - constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; - l_scom_buffer.insert<20, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); - l_scom_buffer.insert<24, 1, 62, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); - l_scom_buffer.insert<26, 1, 63, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; + l_scom_buffer.insert<20, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + l_scom_buffer.insert<24, 1, 62, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + l_scom_buffer.insert<26, 1, 63, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00; + l_scom_buffer.insert<20, 1, 52, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + l_scom_buffer.insert<24, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + l_scom_buffer.insert<26, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + l_scom_buffer.insert<30, 1, 59, uint64_t>(literal_0b11111 ); l_scom_buffer.insert<60, 4, 60, uint64_t>(literal_0b11111 ); l_scom_buffer.insert<0, 12, 52, uint64_t>(literal_0x00E ); @@ -120,23 +131,52 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c53ull, l_scom_buffer )); - constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; - l_scom_buffer.insert<2, 2, 60, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; + l_scom_buffer.insert<2, 2, 60, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00; + l_scom_buffer.insert<2, 2, 55, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + l_scom_buffer.insert<32, 16, 48, uint64_t>(literal_0x0258 ); FAPI_TRY(fapi2::putScom(TGT0, 0x5012c53ull, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c54ull, l_scom_buffer )); - constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; - l_scom_buffer.insert<16, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; + l_scom_buffer.insert<16, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00; + l_scom_buffer.insert<16, 1, 53, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + l_scom_buffer.insert<58, 2, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + FAPI_TRY(fapi2::putScom(TGT0, 0x5012c54ull, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c55ull, l_scom_buffer )); - constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; - l_scom_buffer.insert<16, 1, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70; + l_scom_buffer.insert<16, 1, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00; + l_scom_buffer.insert<16, 1, 54, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + l_scom_buffer.insert<58, 2, 61, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV ); + } + constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_ON = 0x1; l_scom_buffer.insert<21, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_ON ); constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON = 0x1; |