diff options
author | Doug Gilbert <dgilbert@us.ibm.com> | 2016-05-19 17:03:40 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-09-13 00:30:10 -0400 |
commit | ba2cbe433250067580013e2d9debb162a31b1438 (patch) | |
tree | df17761b46b547988a5a326d22e17095bf3b2ecd /src | |
parent | d57a4f70c5ba28729376021a2f7327d012f1c97d (diff) | |
download | talos-sbe-ba2cbe433250067580013e2d9debb162a31b1438.tar.gz talos-sbe-ba2cbe433250067580013e2d9debb162a31b1438.zip |
GPE PK PBA setup API
Change-Id: Iaead553f1adefaea7a34ded6dbf89b3423d6dc27
RTC: 148003
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25037
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29503
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
3 files changed, 46 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_context.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_context.h index 2019d1f6..7bfb4b5d 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_context.h +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_context.h @@ -132,7 +132,12 @@ .set PK_CTX_GPR0, 0x50 # Volatile; Language specific .set PK_CTX_KERNEL_CTX, 0x54 # Saved __PkKernelContext for IRQ - .set PK_CTX_SIZE, 0x58 # Must be 8-byte aligned +#ifdef HWMACRO_GPE + .set PK_CTX_PBASLVCTLV, 0x58 # PBA slave controller value(8 bytes) + .set PK_CTX_SIZE, 0x60 # Must be 8-byte aligned +#else + .set PK_CTX_SIZE, 0x58 +#endif ## ------------------------------------------------------------ ## Push the interrupted context if necessary @@ -212,7 +217,9 @@ typedef struct uint32_t srr1; uint32_t r0; uint32_t sprg0; - +#ifdef HWMACRO_GPE + uint64_t pbaslvctlv; +#endif } PkThreadContext; diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S index 43d625c1..9b776d3e 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S @@ -245,6 +245,27 @@ restore_and_update_sprg0: rlwimi %r3, %r31, 24, 2, 7 mtsprg0 %r3 +#ifdef HWMACRO_GPE + ## restore PBA slave on GPE if it needed + _liw %r29, PBA_SLVCTLN(PBASLVCTLN) + lvd %d3, 0(%r29) + lvd %d30, PK_CTX_PBASLVCTLV(%r1) + + ## check if the thread to be resumed has a different pba context + ## than what was running. if so then restore the pba context + cmpwbne %r3, %r30, pbaslvctl_restore + + ## else skip pba context restore if it has not changed + cmpwbeq %r4, %r31, pbaslvctl_continue + +pbaslvctl_restore: + bl gpe_pba_reset + stvd %d30, 0(%r29) + +pbaslvctl_continue: + +#endif + b ctx_pop fit_handler: @@ -360,6 +381,14 @@ ctx_continue_push: ## pointer stw %r1, PK_THREAD_OFFSET_SAVED_STACK_POINTER(%r4) +#ifdef HWMACRO_GPE + ## Save the context of the PBASLVCTL reg + _liw %r7, PBA_SLVCTLN(PBASLVCTLN) + lvd %d7, 0(%r7) + stvd %d7, PK_CTX_PBASLVCTLV(%r4) +#endif + + switch_to_kernel_stack: _stwsd %r1, __pk_saved_sp _lwzsd %r1, __pk_kernel_stack diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_thread_init.S b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_thread_init.S index a706805b..0423e064 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_thread_init.S +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_thread_init.S @@ -60,7 +60,7 @@ __pk_thread_context_initialize: ## R4 = thread_routine (param) ## R5 = private (param) ## R6 = thread stack pointer (computed) - ## R7 = scratch + ## D7 (R7,R8) = scratch .macro _gpr_init, prefix, reg, val li %r7, \val @@ -111,6 +111,13 @@ __pk_thread_context_initialize: _gpr_init PK_CTX_GPR, 30, 0x3030 _gpr_init PK_CTX_GPR, 31, 0x3131 +#ifdef HWMACRO_GPE + ## Save the context of the PBASLVCTL reg + _liw %r7, PBA_SLVCTLN(PBASLVCTLN) + lvd %d7, 0(%r7) + stvd %d7, PK_CTX_PBASLVCTLV(%r6) +#endif + ## Initialize the kernel context on the thread stack. ## Note: Thread priority is set later each time the thread is ## resumed. |