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authorJoe McGill <jmcgill@us.ibm.com>2016-11-07 08:17:13 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2016-11-09 23:50:50 -0500
commit898712503096decf08879f87894d06796df8ffe9 (patch)
treee25af97bb30f67eca6fe11400c5dbc518acae016 /src
parentadb5939e4044f4711eaa8c7d09d946c847aa2493 (diff)
downloadtalos-sbe-898712503096decf08879f87894d06796df8ffe9.tar.gz
talos-sbe-898712503096decf08879f87894d06796df8ffe9.zip
p9_pba_coherent_utils -- correct LCO targeting in PBA SLVCTL
Change-Id: I780b1b0d5068800b5be522219547d8a6584dde4c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32304 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32305 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
index 6a91e66a..4f1836c1 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
@@ -296,11 +296,11 @@ extern "C"
if (l_operType == p9_PBA_oper_flag::LCO && !i_rnw)
{
FAPI_TRY(fapi2::getScom(i_ex_target, EX_L3_MODE_REG1, l3_mode_reg1), "Error reading from the L3 Mode Register");
- l3_mode_reg1.extractToRight(chiplet_number, 1, 5);
+ l3_mode_reg1.extractToRight(chiplet_number, 2, 4);
}
pba_slave_ctl_data.insertFromRight < PBA_SLVCTL_WRITE_TSIZE_START_BIT,
- (PBA_SLVCTL_WRITE_TSIZE_END_BIT - PBA_SLVCTL_WRITE_TSIZE_START_BIT) + 1 > (chiplet_number);
+ (PBA_SLVCTL_WRITE_TSIZE_END_BIT - PBA_SLVCTL_WRITE_TSIZE_START_BIT) + 1 > (chiplet_number << 1);
//set bits 36:49 to the ext addr
extaddr = ((uint32_t) (i_address >> PBA_SLVCTL_EXTADDR_SHIFT)) &
PBA_SLVCTL_EXTADDR_MASK;
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