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authorClaus Michael Olsen <cmolsen@us.ibm.com>2017-03-15 23:00:23 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-11-02 02:50:59 -0400
commit8247c1a74c108600dd571e4a1d80475647a79d8c (patch)
treed2558c4f181b593f4570f1e53aae936e586ea38e /src
parent0d8c248cc29e659ab67fffcd26f54a660569ab8a (diff)
downloadtalos-sbe-8247c1a74c108600dd571e4a1d80475647a79d8c.tar.gz
talos-sbe-8247c1a74c108600dd571e4a1d80475647a79d8c.zip
Centaur ring support - TOR API
Key_Cronus_Test=XIP_REGRESS - Updates to TOR API codes to allow user codes to call TOR API function on a Centaur image. Note that the API no longer needs the caller to supply and XIP section ID. - Updates to TOR API codes to take advantage of the improved data and meta-data representation in the ring Id codes and the more self-contained ring image which now has the TOR magic header. - Updates to xip_tool to allow dissection of Centaur image. - Additional updates to TOR API codes and ring Id codes to continue improving overall clarity of data, data structures and flow through TOR API, incl name changes to related data variables and structures. Change-Id: I42891b9662cc0c443d2b16ce866ac945dc2c58dc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38018 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38562 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/build/img_defs.mk10
-rw-r--r--src/hwpf/hw_access.H4
-rw-r--r--src/hwpf/plat_ring_traverse.C90
-rw-r--r--src/import/chips/centaur/utils/imageProcs/cen_ringId.C76
-rw-r--r--src/import/chips/centaur/utils/imageProcs/cen_ringId.H40
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.H11
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.C80
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.H222
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_tor.C340
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_tor.H1
-rw-r--r--src/import/chips/p9/xip/p9_xip_tool.C19
-rw-r--r--src/tools/iplbuild/Makefile6
12 files changed, 465 insertions, 434 deletions
diff --git a/src/build/img_defs.mk b/src/build/img_defs.mk
index aa6f0579..eacf2415 100644
--- a/src/build/img_defs.mk
+++ b/src/build/img_defs.mk
@@ -198,8 +198,12 @@ ifndef IMAGEPROCS_COMMON_SRCDIR
export IMAGEPROCS_COMMON_SRCDIR = $(IMPORT_SRCDIR)/chips/common/utils/imageProcs
endif
-ifndef IMAGEPROCS_SRCDIR
-export IMAGEPROCS_SRCDIR = $(IMPORT_SRCDIR)/chips/p9/utils/imageProcs
+ifndef IMAGEPROCS_P9_SRCDIR
+export IMAGEPROCS_P9_SRCDIR = $(IMPORT_SRCDIR)/chips/p9/utils/imageProcs
+endif
+
+ifndef IMAGEPROCS_CEN_SRCDIR
+export IMAGEPROCS_CEN_SRCDIR = $(IMPORT_SRCDIR)/chips/centaur/utils/imageProcs
endif
ifndef BASE_OBJDIR
@@ -219,7 +223,7 @@ export P9_XIP_BINDIR = $(BASE_OBJDIR)/xip
endif
ifndef IMG_INCLUDES
-export IMG_INCLUDES = -I$(IMAGEPROCS_COMMON_SRCDIR) -I$(IMAGEPROCS_SRCDIR) -I$(P9_XIP_SRCDIR) -I$(BUILD_DIR) -I$(CACHE_SRCDIR) -I$(UTILS_SRCDIR) -I$(CORE_SRCDIR) -I$(PERV_SRCDIR) -I$(NEST_SRCDIR) -I$(PM_SRCDIR) -I$(INITFILES_SRCDIR) -I$(HWPLIB_SRCDIR) -I$(HWPFFDC_SRCDIR)
+export IMG_INCLUDES = -I$(IMAGEPROCS_COMMON_SRCDIR) -I$(IMAGEPROCS_P9_SRCDIR) -I$(IMAGEPROCS_CEN_SRCDIR) -I$(P9_XIP_SRCDIR) -I$(BUILD_DIR) -I$(CACHE_SRCDIR) -I$(UTILS_SRCDIR) -I$(CORE_SRCDIR) -I$(PERV_SRCDIR) -I$(NEST_SRCDIR) -I$(PM_SRCDIR) -I$(INITFILES_SRCDIR) -I$(HWPLIB_SRCDIR) -I$(HWPFFDC_SRCDIR)
endif
ifndef BOOT_OBJDIR
diff --git a/src/hwpf/hw_access.H b/src/hwpf/hw_access.H
index de0ac924..ab17a763 100644
--- a/src/hwpf/hw_access.H
+++ b/src/hwpf/hw_access.H
@@ -39,7 +39,7 @@
#endif
#include <utils.H>
-#include <p9_ringId.H>
+#include <common_ringId.H>
#include <plat_hw_access.H>
#include "plat_ring_traverse.H" // for findRS4InImageAndApply
@@ -279,7 +279,7 @@ __fapi2exit__:
/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
template< TargetType K, typename V >
inline ReturnCode putRing(const Target<K, V>& i_target,
- const RingID i_ringID,
+ const RingId_t i_ringID,
const RingMode i_ringMode = RING_MODE_HEADER_CHECK)
{
ReturnCode l_rc = FAPI2_RC_SUCCESS;
diff --git a/src/hwpf/plat_ring_traverse.C b/src/hwpf/plat_ring_traverse.C
index 101c066b..b8ab38de 100644
--- a/src/hwpf/plat_ring_traverse.C
+++ b/src/hwpf/plat_ring_traverse.C
@@ -72,10 +72,10 @@ fapi2::ReturnCode findRS4InImageAndApply(
SBE_TRACE("No ring data in .RING section");
break;
}
-
+
uint8_t l_torHdrSz;
TorHeader_t* torHeader = (TorHeader_t*)(g_seepromAddr +
- l_section->iv_offset);
+ l_section->iv_offset);
if (torHeader->magic == TOR_MAGIC_SBE)
{
@@ -93,8 +93,8 @@ fapi2::ReturnCode findRS4InImageAndApply(
}
SectionTOR* l_sectionTOR = (SectionTOR*)(g_seepromAddr +
- l_section->iv_offset +
- l_torHdrSz);
+ l_section->iv_offset +
+ l_torHdrSz);
l_rc = getRS4ImageFromTor(i_target, i_ringID, l_sectionTOR,
l_applyOverride,
@@ -161,7 +161,7 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
}
- CHIPLET_DATA l_chipletData;
+ ChipletData_t l_chipletData;
l_chipletData.iv_base_chiplet_number = 0;
l_chipletData.iv_num_common_rings = 0;
l_chipletData.iv_num_instance_rings = 0;
@@ -175,10 +175,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
switch(l_chipLetType)
{
case PERV_TYPE: // PERV
- l_chipletData = PERV::g_pervData;
+ l_chipletData = PERV::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(PERV::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_PERV_COMMON_RING;
@@ -190,10 +189,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case N0_TYPE: // Nest - N0
- l_chipletData = N0::g_n0Data;
+ l_chipletData = N0::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(N0::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_N0_COMMON_RING;
@@ -205,10 +203,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case N1_TYPE: // Nest - N1
- l_chipletData = N1::g_n1Data;
+ l_chipletData = N1::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(N1::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_N1_COMMON_RING;
@@ -220,10 +217,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case N2_TYPE: // Nest - N2
- l_chipletData = N2::g_n2Data;
+ l_chipletData = N2::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(N2::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_N2_COMMON_RING;
@@ -235,10 +231,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case N3_TYPE: // Nest - N3
- l_chipletData = N3::g_n3Data;
+ l_chipletData = N3::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(N3::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_N3_COMMON_RING;
@@ -250,10 +245,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case XB_TYPE: // XB - XBus2
- l_chipletData = XB::g_xbData;
+ l_chipletData = XB::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(XB::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_XB_COMMON_RING;
@@ -265,10 +259,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case MC_TYPE: // MC - MC23
- l_chipletData = MC::g_mcData;
+ l_chipletData = MC::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(MC::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_MC_COMMON_RING;
@@ -280,10 +273,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case OB0_TYPE: // OB0
- l_chipletData = OB0::g_ob0Data;
+ l_chipletData = OB0::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(OB0::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_OB0_COMMON_RING;
@@ -295,10 +287,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case OB1_TYPE: // OB1
- l_chipletData = OB1::g_ob1Data;
+ l_chipletData = OB1::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(OB1::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_OB1_COMMON_RING;
@@ -310,10 +301,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case OB2_TYPE: // OB2
- l_chipletData = OB2::g_ob2Data;
+ l_chipletData = OB2::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(OB2::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_OB2_COMMON_RING;
@@ -325,10 +315,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case OB3_TYPE: // OB3
- l_chipletData = OB3::g_ob3Data;
+ l_chipletData = OB3::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(OB3::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_OB3_COMMON_RING;
@@ -341,10 +330,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
case PCI0_TYPE: // PCI - PCI0
- l_chipletData = PCI0::g_pci0Data;
+ l_chipletData = PCI0::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(PCI0::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_PCI0_COMMON_RING;
@@ -356,10 +344,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case PCI1_TYPE: // PCI - PCI1
- l_chipletData = PCI1::g_pci1Data;
+ l_chipletData = PCI1::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(PCI1::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_PCI1_COMMON_RING;
@@ -371,10 +358,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case PCI2_TYPE: // PCI - PCI2
- l_chipletData = PCI2::g_pci2Data;
+ l_chipletData = PCI2::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(PCI2::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_PCI2_COMMON_RING;
@@ -386,10 +372,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case EQ_TYPE: // EQ - Quad 0 - Quad 5
- l_chipletData = EQ::g_eqData;
+ l_chipletData = EQ::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- ( sizeof(EQ::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_EQ_COMMON_RING;
@@ -404,10 +389,9 @@ fapi2::ReturnCode getRS4ImageFromTor(
break;
case EC_TYPE: // EC - Core 0 - 23
- l_chipletData = EC::g_ecData;
+ l_chipletData = EC::g_chipletData;
l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- (sizeof(EC::RingVariants) /
- sizeof(l_cpltRingVariantSz));
+ l_chipletData.iv_num_ring_variants;
l_sectionOffset = i_sectionTOR->TOC_EC_COMMON_RING;
l_CC_offset = 1;
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
index cc953bea..e19aa46e 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
@@ -23,6 +23,9 @@
/* */
/* IBM_PROLOG_END_TAG */
+#include <string.h>
+#include <common_ringId.H>
+
namespace CEN_RID
{
@@ -140,4 +143,75 @@ const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
}; // namespace CEN
-}; // namespace CENTAUR
+}; // namespace CEN_RID
+
+
+using namespace CEN_RID;
+
+ChipletType_t CEN_RID::ringid_get_chiplet(RingId_t i_ringId)
+{
+ return RING_PROPERTIES[i_ringId].iv_type;
+}
+
+void CEN_RID::ringid_get_chiplet_properties(
+ ChipletType_t i_chiplet,
+ ChipletData_t** o_cpltData,
+ GenRingIdList** o_ringComm,
+ GenRingIdList** o_ringInst,
+ RingVariantOrder** o_varOrder,
+ uint8_t* o_varNumb)
+{
+ switch (i_chiplet)
+ {
+ case CEN_TYPE :
+ *o_cpltData = (ChipletData_t*) &CEN::g_chipletData;
+ *o_ringComm = (GenRingIdList*) CEN::RING_ID_LIST_COMMON;
+ *o_ringInst = NULL;
+ *o_varOrder = (RingVariantOrder*) CEN::RING_VARIANT_ORDER;
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
+ break;
+
+ default :
+ *o_cpltData = NULL;
+ *o_ringComm = NULL;
+ *o_ringInst = NULL;
+ *o_varOrder = NULL;
+ *o_varNumb = 0;
+ break;
+ }
+}
+
+GenRingIdList* CEN_RID::ringid_get_ring_properties(RingId_t i_ringId)
+{
+ ChipletData_t* l_cpltData;
+ GenRingIdList* l_ringList[2]; // 0: common, 1: instance
+ RingVariantOrder* l_varOrder;
+ uint8_t l_varNumb;
+ int i, j, n;
+
+ CEN_RID::ringid_get_chiplet_properties(
+ CEN_RID::ringid_get_chiplet(i_ringId),
+ &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_varNumb);
+
+ if (!l_ringList[0])
+ {
+ return NULL;
+ }
+
+ for (j = 0; j < 2; j++) // 0: common, 1: instance
+ {
+ n = (j ? l_cpltData->iv_num_instance_rings
+ : l_cpltData->iv_num_common_rings);
+
+ for (i = 0; i < n; i++)
+ {
+ if (!strcmp(l_ringList[j][i].ringName,
+ RING_PROPERTIES[i_ringId].iv_name))
+ {
+ return &(l_ringList[j][i]);
+ }
+ }
+ }
+
+ return NULL;
+}
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
index 617a184a..593fa6a6 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
@@ -42,12 +42,6 @@ namespace CEN
extern const GenRingIdList RING_ID_LIST_COMMON[];
extern const RingVariantOrder RING_VARIANT_ORDER[];
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -156,19 +150,19 @@ enum RingOffset
// ** none **
};
-static const CHIPLET_DATA g_cenData =
+static const ChipletData_t g_chipletData =
{
0x01, // Centaur chiplet ID
NUM_RING_IDS, // Num of common rings for Centaur chiplet
0, // Num of instance rings for Centaur chiplet
- 0
+ 0,
+ 2, // Num of ring variants: BASE, RL
};
-
}; // namespace CEN
#ifndef __PPE__
-static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
+static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{
{ CEN::tcm_perv_cmsk, "tcm_perv_cmsk", CEN_TYPE },
{ CEN::tcm_perv_lbst, "tcm_perv_lbst", CEN_TYPE },
@@ -275,7 +269,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
#else
-static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
+static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{
{ CEN::tcm_perv_cmsk, CEN_TYPE },
{ CEN::tcm_perv_lbst, CEN_TYPE },
@@ -382,4 +376,28 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
#endif // __PPE__
+
+
+// returns our own chiplet enum value for this ringId
+ChipletType_t
+ringid_get_chiplet(
+ RingId_t i_ringId);
+
+// returns data structures defined for chiplet type
+// as determined by ringId
+void
+ringid_get_chiplet_properties(
+ ChipletType_t i_chiplet,
+ ChipletData_t** o_cpltData,
+ GenRingIdList** o_ringComm,
+ GenRingIdList** o_ringInst,
+ RingVariantOrder** o_varOrder,
+ uint8_t* o_varNumb);
+
+// returns properties of a ring as determined by ringId
+GenRingIdList*
+ringid_get_ring_properties(
+ RingId_t i_ringId);
+
+
#endif // _CEN_RINGID_H_
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index 383aab69..7d7efdd2 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -126,7 +126,7 @@ enum RingType
ALLRING = 2
};
-struct CHIPLET_DATA
+typedef struct
{
// This is the chiplet-ID of the first instance of the Chiplet
uint8_t iv_base_chiplet_number;
@@ -140,7 +140,10 @@ struct CHIPLET_DATA
// The no.of instance rings for the Chiplet (w/different ringId values
// AND different scanAddress values)
uint8_t iv_num_instance_rings_scan_addrs;
-};
+
+ // The no.of ring variants
+ uint8_t iv_num_ring_variants;
+} ChipletData_t;
// This is used to Set (Mark) the left-most bit
#define INSTANCE_RING_MARK (uint8_t)0x80
@@ -154,14 +157,14 @@ struct CHIPLET_DATA
// This structure is needed for mapping a RingID to it's corresponding name.
// The names will be used by the build scripts when generating the TOR.
#ifndef __PPE__
-struct ringProperties_t
+struct RingProperties_t
{
uint8_t iv_torOffSet;
char iv_name[50];
ChipletType_t iv_type;
};
#else
-struct ringProperties_t
+struct RingProperties_t
{
uint8_t iv_torOffSet;
ChipletType_t iv_type;
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
index 52994757..8356f8ed 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
@@ -465,14 +465,14 @@ const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL };
using namespace P9_RID;
-ChipletType_t P9_RID::p9_ringid_get_chiplet(RingId_t i_ringId)
+ChipletType_t P9_RID::ringid_get_chiplet(RingId_t i_ringId)
{
return RING_PROPERTIES[i_ringId].iv_type;
}
-void P9_RID::p9_ringid_get_chiplet_properties(
+void P9_RID::ringid_get_chiplet_properties(
ChipletType_t i_chiplet,
- CHIPLET_DATA** o_cpltData,
+ ChipletData_t** o_cpltData,
GenRingIdList** o_ringComm,
GenRingIdList** o_ringInst,
RingVariantOrder** o_varOrder,
@@ -481,131 +481,131 @@ void P9_RID::p9_ringid_get_chiplet_properties(
switch (i_chiplet)
{
case PERV_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &PERV::g_pervData;
+ *o_cpltData = (ChipletData_t*) &PERV::g_chipletData;
*o_ringComm = (GenRingIdList*) PERV::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) PERV::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) PERV::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(PERV::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case N0_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &N0::g_n0Data;
+ *o_cpltData = (ChipletData_t*) &N0::g_chipletData;
*o_ringComm = (GenRingIdList*) N0::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) N0::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) N0::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(N0::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case N1_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &N1::g_n1Data;
+ *o_cpltData = (ChipletData_t*) &N1::g_chipletData;
*o_ringComm = (GenRingIdList*) N1::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) N1::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) N1::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(N1::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case N2_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &N2::g_n2Data;
+ *o_cpltData = (ChipletData_t*) &N2::g_chipletData;
*o_ringComm = (GenRingIdList*) N2::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) N2::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) N2::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(N2::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case N3_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &N3::g_n3Data;
+ *o_cpltData = (ChipletData_t*) &N3::g_chipletData;
*o_ringComm = (GenRingIdList*) N3::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) N3::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) N3::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(N3::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case XB_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &XB::g_xbData;
+ *o_cpltData = (ChipletData_t*) &XB::g_chipletData;
*o_ringComm = (GenRingIdList*) XB::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) XB::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) XB::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(XB::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case MC_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &MC::g_mcData;
+ *o_cpltData = (ChipletData_t*) &MC::g_chipletData;
*o_ringComm = (GenRingIdList*) MC::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) MC::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) MC::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(MC::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case OB0_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &OB0::g_ob0Data;
+ *o_cpltData = (ChipletData_t*) &OB0::g_chipletData;
*o_ringComm = (GenRingIdList*) OB0::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) OB0::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) OB0::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(OB0::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case OB1_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &OB1::g_ob1Data;
+ *o_cpltData = (ChipletData_t*) &OB1::g_chipletData;
*o_ringComm = (GenRingIdList*) OB1::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) OB1::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) OB1::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(OB1::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case OB2_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &OB2::g_ob2Data;
+ *o_cpltData = (ChipletData_t*) &OB2::g_chipletData;
*o_ringComm = (GenRingIdList*) OB2::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) OB2::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) OB2::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(OB2::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case OB3_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &OB3::g_ob3Data;
+ *o_cpltData = (ChipletData_t*) &OB3::g_chipletData;
*o_ringComm = (GenRingIdList*) OB3::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) OB3::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) OB3::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(OB3::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case PCI0_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &PCI0::g_pci0Data;
+ *o_cpltData = (ChipletData_t*) &PCI0::g_chipletData;
*o_ringComm = (GenRingIdList*) PCI0::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) PCI0::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) PCI0::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(PCI0::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case PCI1_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &PCI1::g_pci1Data;
+ *o_cpltData = (ChipletData_t*) &PCI1::g_chipletData;
*o_ringComm = (GenRingIdList*) PCI1::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) PCI1::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) PCI1::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(PCI1::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case PCI2_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &PCI2::g_pci2Data;
+ *o_cpltData = (ChipletData_t*) &PCI2::g_chipletData;
*o_ringComm = (GenRingIdList*) PCI2::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) PCI2::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) PCI2::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(PCI2::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case EQ_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &EQ::g_eqData;
+ *o_cpltData = (ChipletData_t*) &EQ::g_chipletData;
*o_ringComm = (GenRingIdList*) EQ::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) EQ::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) EQ::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(EQ::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
case EC_TYPE :
- *o_cpltData = (CHIPLET_DATA*) &EC::g_ecData;
+ *o_cpltData = (ChipletData_t*) &EC::g_chipletData;
*o_ringComm = (GenRingIdList*) EC::RING_ID_LIST_COMMON;
*o_ringInst = (GenRingIdList*) EC::RING_ID_LIST_INSTANCE;
*o_varOrder = (RingVariantOrder*) EC::RING_VARIANT_ORDER;
- *o_varNumb = sizeof(EC::RingVariants) / sizeof(uint16_t);
+ *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants;
break;
default :
@@ -613,21 +613,21 @@ void P9_RID::p9_ringid_get_chiplet_properties(
*o_ringComm = NULL;
*o_ringInst = NULL;
*o_varOrder = NULL;
- *o_varNumb = 0;
+ *o_varNumb = 0;
break;
}
}
-GenRingIdList* P9_RID::p9_ringid_get_ring_properties(RingId_t i_ringId)
+GenRingIdList* P9_RID::ringid_get_ring_properties(RingId_t i_ringId)
{
- CHIPLET_DATA* l_cpltData;
+ ChipletData_t* l_cpltData;
GenRingIdList* l_ringList[2]; // 0: common, 1: instance
RingVariantOrder* l_varOrder;
uint8_t l_varNumb;
int i, j, n;
- P9_RID::p9_ringid_get_chiplet_properties(
- P9_RID::p9_ringid_get_chiplet(i_ringId),
+ P9_RID::ringid_get_chiplet_properties(
+ P9_RID::ringid_get_chiplet(i_ringId),
&l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_varNumb);
if (!l_ringList[0])
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index f2f3639d..3b9cccb2 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -175,13 +175,6 @@ extern const RingVariantOrder RING_VARIANT_ORDER[];
namespace PERV
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -210,24 +203,18 @@ enum RingOffset
occ_repr = (1 | INSTANCE_RING_MARK),
};
-static const CHIPLET_DATA g_pervData =
+static const ChipletData_t g_chipletData =
{
1, // Pervasive Chiplet ID is 1
15, // 15 common rings for pervasive chiplet
2, // 2 instance specific rings for pervasive chiplet
- 2
+ 2,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace PERV
namespace N0
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -246,24 +233,18 @@ enum RingOffset
n0_cxa0_repr = (2 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_n0Data =
+static const ChipletData_t g_chipletData =
{
- 2, // N0 Chiplet ID is 2.
- 9, // 9 common rings for N0 Chiplet
- 3, // 3 instance specific rings for N0 chiplet
- 3
+ 2, // N0 Chiplet ID is 2.
+ 9, // 9 common rings for N0 Chiplet
+ 3, // 3 instance specific rings for N0 chiplet
+ 3,
+ 2, // 2 ring variants: BASE, RL
};
};
namespace N1
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -286,24 +267,18 @@ enum RingOffset
n1_mcs23_repr = (3 | INSTANCE_RING_MARK),
};
-static const CHIPLET_DATA g_n1Data =
+static const ChipletData_t g_chipletData =
{
3, // N1 Chiplet ID is 3.
12, // 12 common rings for N1 Chiplet
4, // 4 instance specific rings for N1 chiplet
- 4
+ 4,
+ 2, // 2 ring variants: BASE, RL
};
};
namespace N2
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -322,24 +297,18 @@ enum RingOffset
n2_psi_repr = (2 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_n2Data =
+static const ChipletData_t g_chipletData =
{
4, // N2 Chiplet ID is 4.
9, // 9 common rings for N2 Chiplet
3, // 3 instance specific rings for N2 chiplet
- 3
+ 3,
+ 2, // 2 ring variants: BASE, RL
};
};
namespace N3
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -359,24 +328,18 @@ enum RingOffset
n3_np_repr = (2 | INSTANCE_RING_MARK),
};
-static const CHIPLET_DATA g_n3Data =
+static const ChipletData_t g_chipletData =
{
5, // N3 Chiplet ID is 5
10,// 10 common rings for N3 Chiplet
3, // 3 instance specific rings for N3 chiplet
- 3
+ 3,
+ 2, // 2 ring variants: BASE, RL
};
};
namespace XB
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -402,24 +365,18 @@ enum RingOffset
xb_io2_repr = (3 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_xbData =
+static const ChipletData_t g_chipletData =
{
6, // X-Bus Chiplet ID is 6
15, // 15 common rings for X-Bus Chiplet
4, // 4 instance specific rings for XB chiplet
- 4
+ 4,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace XB
namespace MC
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -446,24 +403,18 @@ enum RingOffset
mc_iom23_repr = (2 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_mcData =
+static const ChipletData_t g_chipletData =
{
7, // MC Chiplet ID range is 7 - 8. The base ID is 7.
16, // 16 common rings for MC Chiplet
3, // 3 instance specific rings for each MC instance
- 3
+ 3,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace MC
namespace OB0
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -479,24 +430,18 @@ enum RingOffset
ob0_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_ob0Data =
+static const ChipletData_t g_chipletData =
{
9, // O-Bus Chiplet ID range is 9 - 12. The base ID is 9.
7, // 7 common rings for OB Chiplet
1, // 1 instance specific rings for each OB chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace OB0
namespace OB1
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -512,25 +457,19 @@ enum RingOffset
ob1_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_ob1Data =
+static const ChipletData_t g_chipletData =
{
10, // O-Bus Chiplet ID range is 9 - 12. The base ID is 9.
7, // 7 common rings for OB Chiplet
1, // 1 instance specific rings for each OB chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace OB1
namespace OB2
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -546,24 +485,18 @@ enum RingOffset
ob2_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_ob2Data =
+static const ChipletData_t g_chipletData =
{
11, // O-Bus Chiplet ID range is 9 - 12. The base ID is 9.
7, // 7 common rings for OB Chiplet
1, // 1 instance specific rings for each OB chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace OB2
namespace OB3
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -579,23 +512,18 @@ enum RingOffset
ob3_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_ob3Data =
+static const ChipletData_t g_chipletData =
{
12, // O-Bus Chiplet ID range is 9 - 12. The base ID is 9.
7, // 7 common rings for OB Chiplet
1, // 1 instance specific rings for each OB chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
}; // end of namespace OB2
+
namespace PCI0
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -608,24 +536,18 @@ enum RingOffset
pci0_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_pci0Data =
+static const ChipletData_t g_chipletData =
{
13, // PCI0 Chiplet Chiplet ID is 13
5, // 5 common rings for PCI0 chiplet
1, // 1 instance specific rings for PCI0 chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
};
namespace PCI1
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -638,24 +560,18 @@ enum RingOffset
pci1_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_pci1Data =
+static const ChipletData_t g_chipletData =
{
14, // PCI1 Chiplet Chiplet ID is 14
5, // 5 common rings for PCI1 chiplet
1, // 1 instance specific rings for PCI1 chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
};
namespace PCI2
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -668,26 +584,18 @@ enum RingOffset
pci2_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_pci2Data =
+static const ChipletData_t g_chipletData =
{
15, // PCI2 Chiplet Chiplet ID is 15
5, // 5 common rings for PCI2 chiplet
1, // 1 instance specific rings for PCI2 chiplet
- 1
+ 1,
+ 2, // 2 ring variants: BASE, RL
};
-
};
namespace EQ
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_cacheContained;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -767,25 +675,18 @@ enum RingOffset
ex_l3_refr_time = (4 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_eqData =
+static const ChipletData_t g_chipletData =
{
16, // Quad Chiplet ID range is 16 - 21. The base ID is 16.
66, // 66 common rings for Quad chiplet.
5, // 5 instance specific rings for each EQ chiplet
- 9 // 9 different rings since 2 per EX ring and 1 per EQ
+ 9, // 9 different rings since 2 per EX ring and 1 per EQ
+ 3, // 3 ring variants: BASE, CC, RL
};
}; // end of namespace EQ
namespace EC
{
-// FIXME: this struct is nonsense - no one uses these fields (we only need the variant number)
-struct RingVariants
-{
- uint16_t iv_base;
- uint16_t iv_cacheContained;
- uint16_t iv_riskLevel;
-};
-
enum RingOffset
{
// Common Rings
@@ -799,19 +700,20 @@ enum RingOffset
ec_repr = (0 | INSTANCE_RING_MARK)
};
-static const CHIPLET_DATA g_ecData =
+static const ChipletData_t g_chipletData =
{
32, // Core Chiplet ID range is 32-55. The base ID is 32.
6, // 6 common rings for Core chiplet
1, // 1 instance specific ring for each Core chiplet
- 1
+ 1,
+ 3, // 3 ring variants: BASE, CC, RL
};
}; // end of namespace EC
#ifndef __PPE__
-static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
+static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{
{ PERV::perv_fure , "perv_fure" , PERV_TYPE }, // 0
{ PERV::perv_gptr , "perv_gptr" , PERV_TYPE }, // 1
@@ -1070,7 +972,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
#endif
#ifdef __PPE__
-static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
+static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{
{ PERV::perv_fure , PERV_TYPE }, // 0
{ PERV::perv_gptr , PERV_TYPE }, // 1
@@ -1328,25 +1230,27 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
};
#endif
-// returns our own chiplet enum value for this ringId
+
+// Returns our own chiplet enum value for this ringId
ChipletType_t
-p9_ringid_get_chiplet(
+ringid_get_chiplet(
RingId_t i_ringId);
-// returns data structures defined for chiplet type
+// Returns data structures defined for chiplet type
// as determined by ringId
void
-p9_ringid_get_chiplet_properties(
+ringid_get_chiplet_properties(
ChipletType_t i_chiplet,
- CHIPLET_DATA** o_cpltData,
+ ChipletData_t** o_cpltData,
GenRingIdList** o_ringComm,
GenRingIdList** o_ringInst,
RingVariantOrder** o_varOrder,
uint8_t* o_varNumb);
-// returns properties of a ring as determined by ringId
+// Returns properties of a ring as determined by ringId
GenRingIdList*
-p9_ringid_get_ring_properties(
+ringid_get_ring_properties(
RingId_t i_ringId);
+
#endif
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index 6191af73..33007852 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -46,6 +46,10 @@ namespace P9_RID
{
#include "p9_ringId.H"
}
+namespace CEN_RID
+{
+#include "cen_ringId.H"
+}
#include "p9_scan_compression.H"
#include "p9_infrastruct_help.H"
@@ -83,23 +87,27 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section
char* o_ringName, // Name of ring
uint32_t i_dbgl ) // Debug option
{
- int rc = TOR_SUCCESS;
- uint32_t torMagic;
- uint32_t tor_slot_no = 0; // TOR slot number (within a TOR chiplet section)
- uint16_t dd_level_offset; // Local DD level offset, if any (wrt i_ringSection)
- uint32_t acc_offset = 0; // Accumulating offset to next TOR offset
- uint32_t ppe_offset = 0; // Local offset to where SBE PPE ring section starts
- uint32_t ppe_cplt_offset = 0; // Local offset to where the pool of chiplets starts
- uint32_t cplt_offset = 0; // Local offset to where a specific chiplet section starts
- uint16_t ring_offset = 0; // Local offset to where SBE ring container/block starts
- uint32_t ring_size = 0; // Size of whole ring container/block.
+ int rc = TOR_SUCCESS;
+ uint32_t torMagic = 0xffffffff;
+ ChipType_t chipType = INVALID_CHIP_TYPE;
+ uint32_t tor_slot_no = 0; // TOR slot number (within a TOR chiplet section)
+ uint16_t dd_level_offset; // Local DD level offset, if any (wrt i_ringSection)
+ uint32_t acc_offset = 0; // Accumulating offset to next TOR offset
+ uint32_t ppe_offset = 0; // Local offset to where SBE PPE ring section starts
+ uint32_t ppe_cplt_offset = 0; // Local offset to where the pool of chiplets starts
+ uint32_t cplt_offset = 0; // Local offset to where a specific chiplet section starts
+ uint16_t ring_offset = 0; // Local offset to where SBE ring container/block starts
+ uint32_t ring_size = 0; // Size of whole ring container/block.
RingVariantOrder* ring_variant_order;
- GenRingIdList* ring_id_list_common;
- GenRingIdList* ring_id_list_instance;
- CHIPLET_DATA* l_cpltData;
- uint8_t l_num_variant;
+ GenRingIdList* ring_id_list_common;
+ GenRingIdList* ring_id_list_instance;
+ ChipletData_t* l_cpltData;
+ uint8_t l_num_variant;
+ ChipletType_t numChiplets = 0;
+ const RingProperties_t* ringProperties;
torMagic = be32toh( ((TorHeader_t*)i_ringSection)->magic );
+ chipType = ((TorHeader_t*)i_ringSection)->chipType;
// Calculate the offset (wrt start of ringSection) to the SBE PPE
// ring section. This offset, ppe_offset, will point to the
@@ -109,13 +117,25 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section
dd_level_offset = i_ddLevelOffset;
ppe_offset = *(uint32_t*)((uint8_t*)i_ringSection + dd_level_offset);
ppe_offset = be32toh(ppe_offset);
+ numChiplets = P9_RID::SBE_NOOF_CHIPLETS;
+ ringProperties = &P9_RID::RING_PROPERTIES[0];
}
else if (torMagic == TOR_MAGIC_SBE ||
- torMagic == TOR_MAGIC_OVRD ||
+ (torMagic == TOR_MAGIC_OVRD && (chipType == CT_P9N || chipType == CT_P9C)) ||
torMagic == TOR_MAGIC_OVLY)
{
ppe_offset = 0;
dd_level_offset = 0;
+ numChiplets = P9_RID::SBE_NOOF_CHIPLETS;
+ ringProperties = &P9_RID::RING_PROPERTIES[0];
+ }
+ else if (torMagic == TOR_MAGIC_CEN ||
+ (torMagic == TOR_MAGIC_OVRD && chipType == CT_CEN))
+ {
+ ppe_offset = 0;
+ dd_level_offset = 0;
+ numChiplets = CEN_RID::CEN_NOOF_CHIPLETS;
+ ringProperties = &CEN_RID::RING_PROPERTIES[0];
}
else
{
@@ -129,17 +149,31 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section
ppe_cplt_offset = ppe_offset + sizeof(TorHeader_t);
// Looper for each SBE chiplet
- for (ChipletType_t iCplt = 0; iCplt < P9_RID::SBE_NOOF_CHIPLETS; iCplt++)
+ for (ChipletType_t iCplt = 0; iCplt < numChiplets; iCplt++)
{
- P9_RID::p9_ringid_get_chiplet_properties(
- iCplt,
- &l_cpltData,
- &ring_id_list_common,
- &ring_id_list_instance,
- &ring_variant_order,
- &l_num_variant);
-
- if (!ring_id_list_common)
+ if (torMagic == TOR_MAGIC_CEN ||
+ (torMagic == TOR_MAGIC_OVRD && chipType == CT_CEN))
+ {
+ CEN_RID::ringid_get_chiplet_properties(
+ iCplt,
+ &l_cpltData,
+ &ring_id_list_common,
+ &ring_id_list_instance,
+ &ring_variant_order,
+ &l_num_variant);
+ }
+ else
+ {
+ P9_RID::ringid_get_chiplet_properties(
+ iCplt,
+ &l_cpltData,
+ &ring_id_list_common,
+ &ring_id_list_instance,
+ &ring_variant_order,
+ &l_num_variant);
+ }
+
+ if (!ring_id_list_common && !ring_id_list_instance)
{
MY_ERR("Chiplet=%d is not valid for SBE. \n", iCplt);
return TOR_INVALID_CHIPLET;
@@ -171,12 +205,12 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section
}
if ( ( strcmp( (ring_id_list_common + i)->ringName,
- P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0 ) &&
+ ringProperties[i_ringId].iv_name) == 0 ) &&
( i_RingVariant == ring_variant_order->variant[iVariant] ||
torMagic == TOR_MAGIC_OVRD ||
torMagic == TOR_MAGIC_OVLY ) )
{
- strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name);
+ strcpy(o_ringName, ringProperties[i_ringId].iv_name);
acc_offset = dd_level_offset +
ppe_cplt_offset +
iCplt * sizeof(TorPpeBlock_t);
@@ -287,159 +321,163 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section
//
// Sequentially walk the TOR slots within the chiplet's INSTANCE section
//
- tor_slot_no = 0;
-
- for ( uint8_t i = (ring_id_list_instance + 0)->instanceIdMin;
- i < (ring_id_list_instance + 0)->instanceIdMax + 1 ; i++ )
+ if (ring_id_list_instance)
{
- for (uint8_t j = 0; j < l_cpltData->iv_num_instance_rings; j++)
+
+ tor_slot_no = 0;
+
+ for ( uint8_t i = (ring_id_list_instance + 0)->instanceIdMin;
+ i < (ring_id_list_instance + 0)->instanceIdMax + 1 ; i++ )
{
- for (uint8_t iVariant = 0; iVariant < l_num_variant ; iVariant++)
+ for (uint8_t j = 0; j < l_cpltData->iv_num_instance_rings; j++)
{
- if (i_dbgl > 2)
+ for (uint8_t iVariant = 0; iVariant < l_num_variant ; iVariant++)
{
- MY_INF(" Ring name %s Cplt instance ring id %d Variant id %d Instance id %d\n",
- (ring_id_list_instance + j)->ringName, j, iVariant, i);
- }
+ if (i_dbgl > 2)
+ {
+ MY_INF(" Ring name %s Cplt instance ring id %d Variant id %d Instance id %d\n",
+ (ring_id_list_instance + j)->ringName, j, iVariant, i);
+ }
- if (strcmp( (ring_id_list_instance + j)->ringName,
- P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0)
- {
- if ( io_instanceId >= (ring_id_list_instance + 0)->instanceIdMin
- && io_instanceId <= (ring_id_list_instance + 0)->instanceIdMax )
+ if (strcmp( (ring_id_list_instance + j)->ringName,
+ ringProperties[i_ringId].iv_name) == 0)
{
- if (i == io_instanceId && i_RingVariant == ring_variant_order->variant[iVariant])
+ if ( io_instanceId >= (ring_id_list_instance + 0)->instanceIdMin
+ && io_instanceId <= (ring_id_list_instance + 0)->instanceIdMax )
{
- strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name);
-
- acc_offset = dd_level_offset +
- ppe_cplt_offset +
- iCplt * sizeof(TorPpeBlock_t) +
- sizeof(cplt_offset); // Jump to instance offset
- cplt_offset = *(uint32_t*)( (uint8_t*)i_ringSection +
- acc_offset );
- cplt_offset = be32toh(cplt_offset);
-
- acc_offset = cplt_offset +
- dd_level_offset +
- ppe_cplt_offset;
- ring_offset = *(uint16_t*)( (uint8_t*)i_ringSection +
- acc_offset +
- tor_slot_no * sizeof(ring_offset) );
- ring_offset = be16toh(ring_offset);
-
- if (i_RingBlockType == GET_SINGLE_RING)
+ if (i == io_instanceId && i_RingVariant == ring_variant_order->variant[iVariant])
{
+ strcpy(o_ringName, ringProperties[i_ringId].iv_name);
+
acc_offset = dd_level_offset +
ppe_cplt_offset +
- cplt_offset +
- ring_offset;
- ring_size = be16toh( ((CompressedScanData*)
- ((uint8_t*)i_ringSection +
- acc_offset))->iv_size );
- io_RingType = INSTANCE_RING;
-
- if (ring_offset)
+ iCplt * sizeof(TorPpeBlock_t) +
+ sizeof(cplt_offset); // Jump to instance offset
+ cplt_offset = *(uint32_t*)( (uint8_t*)i_ringSection +
+ acc_offset );
+ cplt_offset = be32toh(cplt_offset);
+
+ acc_offset = cplt_offset +
+ dd_level_offset +
+ ppe_cplt_offset;
+ ring_offset = *(uint16_t*)( (uint8_t*)i_ringSection +
+ acc_offset +
+ tor_slot_no * sizeof(ring_offset) );
+ ring_offset = be16toh(ring_offset);
+
+ if (i_RingBlockType == GET_SINGLE_RING)
{
- if (io_ringBlockSize == 0)
+ acc_offset = dd_level_offset +
+ ppe_cplt_offset +
+ cplt_offset +
+ ring_offset;
+ ring_size = be16toh( ((CompressedScanData*)
+ ((uint8_t*)i_ringSection +
+ acc_offset))->iv_size );
+ io_RingType = INSTANCE_RING;
+
+ if (ring_offset)
{
+ if (io_ringBlockSize == 0)
+ {
+ if (i_dbgl > 0)
+ {
+ MY_INF("\tio_ringBlockSize is zero. Returning required size.\n");
+ }
+
+ io_ringBlockSize = ring_size;
+ return 0;
+ }
+
+ if (io_ringBlockSize < ring_size)
+ {
+ MY_ERR("\tio_ringBlockSize is less than required size.\n");
+ return TOR_BUFFER_TOO_SMALL;
+ }
+
if (i_dbgl > 0)
{
- MY_INF("\tio_ringBlockSize is zero. Returning required size.\n");
+ MY_INF(" ring container of %s is found in the SBE image container \n",
+ o_ringName);
}
- io_ringBlockSize = ring_size;
- return 0;
- }
+ memcpy( (uint8_t*)(*io_ringBlockPtr), (uint8_t*)i_ringSection + acc_offset,
+ (size_t)ring_size);
- if (io_ringBlockSize < ring_size)
- {
- MY_ERR("\tio_ringBlockSize is less than required size.\n");
- return TOR_BUFFER_TOO_SMALL;
- }
+ io_ringBlockSize = ring_size;
- if (i_dbgl > 0)
- {
- MY_INF(" ring container of %s is found in the SBE image container \n",
- o_ringName);
- }
+ if (i_dbgl > 0)
+ {
+ MY_INF(" After get_ring_from_sbe_image Size %d \n", io_ringBlockSize);
+ }
- memcpy( (uint8_t*)(*io_ringBlockPtr), (uint8_t*)i_ringSection + acc_offset,
- (size_t)ring_size);
+ rc = TOR_RING_FOUND;
+ }
+ else
+ {
+ if (i_dbgl > 0)
+ {
+ MY_INF(" Ring %s not found in SBE section \n", o_ringName);
+ }
- io_ringBlockSize = ring_size;
+ rc = TOR_RING_NOT_FOUND;
+ }
if (i_dbgl > 0)
{
- MY_INF(" After get_ring_from_sbe_image Size %d \n", io_ringBlockSize);
+ MY_INF(" Hex details (SBE) for Chiplet #%d: \n"
+ " DD number section's offset to DD level section = 0x%08x \n"
+ " DD level section's offset to PpeType = 0x%08x \n"
+ " PpeType section's offset to chiplet = 0x%08x \n"
+ " Chiplet section's offset to RS4 header = 0x%08x \n"
+ " Full offset to RS4 header = 0x%08x \n"
+ " Ring size = 0x%08x \n",
+ i, dd_level_offset, ppe_cplt_offset, cplt_offset, ring_offset, acc_offset, ring_size);
}
- rc = TOR_RING_FOUND;
+ return rc;
}
- else
+ else if (i_RingBlockType == PUT_SINGLE_RING)
{
- if (i_dbgl > 0)
+ if (ring_offset)
{
- MY_INF(" Ring %s not found in SBE section \n", o_ringName);
+ MY_ERR("Ring container is already present in the SBE section \n");
+ return TOR_RING_AVAILABLE_IN_RINGSECTION;
}
- rc = TOR_RING_NOT_FOUND;
- }
+ // Special [mis]use of io_ringBlockPtr and io_ringBlockSize:
+ // Put location of chiplet's instance section into ringBlockPtr
+ memcpy( (uint8_t*)(*io_ringBlockPtr), &acc_offset, sizeof(acc_offset));
+ // Put location of ring_offset slot into ringBlockSize
+ io_ringBlockSize = acc_offset + (tor_slot_no * sizeof(ring_offset));
- if (i_dbgl > 0)
- {
- MY_INF(" Hex details (SBE) for Chiplet #%d: \n"
- " DD number section's offset to DD level section = 0x%08x \n"
- " DD level section's offset to PpeType = 0x%08x \n"
- " PpeType section's offset to chiplet = 0x%08x \n"
- " Chiplet section's offset to RS4 header = 0x%08x \n"
- " Full offset to RS4 header = 0x%08x \n"
- " Ring size = 0x%08x \n",
- i, dd_level_offset, ppe_cplt_offset, cplt_offset, ring_offset, acc_offset, ring_size);
+ return TOR_RING_FOUND;
}
-
- return rc;
- }
- else if (i_RingBlockType == PUT_SINGLE_RING)
- {
- if (ring_offset)
+ else
{
- MY_ERR("Ring container is already present in the SBE section \n");
- return TOR_RING_AVAILABLE_IN_RINGSECTION;
+ MY_ERR("Ring block type (i_RingBlockType=%d) is not supported for SBE \n", i_RingBlockType);
+ return TOR_INVALID_RING_BLOCK_TYPE;
}
-
- // Special [mis]use of io_ringBlockPtr and io_ringBlockSize:
- // Put location of chiplet's instance section into ringBlockPtr
- memcpy( (uint8_t*)(*io_ringBlockPtr), &acc_offset, sizeof(acc_offset));
- // Put location of ring_offset slot into ringBlockSize
- io_ringBlockSize = acc_offset + (tor_slot_no * sizeof(ring_offset));
-
- return TOR_RING_FOUND;
}
- else
+ }
+ else
+ {
+ if (i_dbgl > 0)
{
- MY_ERR("Ring block type (i_RingBlockType=%d) is not supported for SBE \n", i_RingBlockType);
- return TOR_INVALID_RING_BLOCK_TYPE;
+ MY_INF(" SBE ring instance ID %d is invalid, Valid ID is from %d to %d \n",
+ io_instanceId, (ring_id_list_instance + 0)->instanceIdMin,
+ (ring_id_list_instance + 0)->instanceIdMax);
}
+
+ return TOR_INVALID_INSTANCE_ID;
}
}
- else
- {
- if (i_dbgl > 0)
- {
- MY_INF(" SBE ring instance ID %d is invalid, Valid ID is from %d to %d \n",
- io_instanceId, (ring_id_list_instance + 0)->instanceIdMin,
- (ring_id_list_instance + 0)->instanceIdMax);
- }
- return TOR_INVALID_INSTANCE_ID;
- }
+ tor_slot_no++;
}
-
- tor_slot_no++;
}
}
- }
+ } // if (ring_id_list_instance)
}
if (i_dbgl > 0)
@@ -510,13 +548,13 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio
GenRingIdList* ring_id_list_common = NULL;
GenRingIdList* ring_id_list_instance = NULL;
- uint8_t l_num_variant = (uint8_t)sizeof(P9_RID::EQ::RingVariants) / sizeof(uint16_t);
+ uint8_t l_num_variant = P9_RID::EQ::g_chipletData.iv_num_ring_variants;
ring_id_list_common = (GenRingIdList*) P9_RID::EQ::RING_ID_LIST_COMMON;
ring_id_list_instance = (GenRingIdList*) P9_RID::EQ::RING_ID_LIST_INSTANCE;
uint32_t local = 0;
- for (uint8_t i = 0; i < P9_RID::EQ::g_eqData.iv_num_common_rings ; i++)
+ for (uint8_t i = 0; i < P9_RID::EQ::g_chipletData.iv_num_common_rings ; i++)
{
for (uint8_t j = 0; j < l_num_variant ; j++)
{
@@ -628,7 +666,7 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio
for(uint8_t i = (ring_id_list_instance + 0)->instanceIdMin;
i < (ring_id_list_instance + 0)->instanceIdMax + 1 ; i++)
{
- for (uint8_t j = 0; j < P9_RID::EQ::g_eqData.iv_num_instance_rings; j++)
+ for (uint8_t j = 0; j < P9_RID::EQ::g_chipletData.iv_num_instance_rings; j++)
{
for(uint8_t k = 0; k < l_num_variant ; k++)
{
@@ -817,13 +855,13 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section
GenRingIdList* ring_id_list_common = NULL;
GenRingIdList* ring_id_list_instance = NULL;
- uint8_t l_num_variant = (uint8_t)sizeof(P9_RID::EC::RingVariants) / sizeof(uint16_t);
+ uint8_t l_num_variant = P9_RID::EC::g_chipletData.iv_num_ring_variants;
ring_id_list_common = (GenRingIdList*) P9_RID::EC::RING_ID_LIST_COMMON;
ring_id_list_instance = (GenRingIdList*) P9_RID::EC::RING_ID_LIST_INSTANCE;
uint32_t local = 0;
- for (uint8_t i = 0; i < P9_RID::EC::g_ecData.iv_num_common_rings ; i++)
+ for (uint8_t i = 0; i < P9_RID::EC::g_chipletData.iv_num_common_rings ; i++)
{
for (uint8_t j = 0; j < l_num_variant ; j++)
{
@@ -935,7 +973,7 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section
i <= (ring_id_list_instance + 0)->instanceIdMax;
i++ )
{
- for (uint8_t j = 0; j < P9_RID::EC::g_ecData.iv_num_instance_rings; j++)
+ for (uint8_t j = 0; j < P9_RID::EC::g_chipletData.iv_num_instance_rings; j++)
{
for (uint8_t k = 0; k < l_num_variant ; k++)
{
@@ -1162,7 +1200,8 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
}
else if ( torMagic == TOR_MAGIC_SBE ||
torMagic == TOR_MAGIC_OVRD ||
- torMagic == TOR_MAGIC_OVLY )
+ torMagic == TOR_MAGIC_OVLY ||
+ torMagic == TOR_MAGIC_CEN )
{
if ( i_PpeType == PT_CME || i_PpeType == PT_SGPE
|| i_RingBlockType == GET_DD_LEVEL_RINGS
@@ -1247,7 +1286,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
io_ringBlockSize = ddBlockSize;
- return TOR_RING_BLOCKS_FOUND;
+ return TOR_RING_FOUND;
}
else if (i_RingBlockType == GET_PPE_LEVEL_RINGS)
{
@@ -1320,7 +1359,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
(size_t)l_ppe_size);
io_ringBlockSize = l_ppe_size;
- return TOR_RING_BLOCKS_FOUND;
+ return TOR_RING_FOUND;
}
else if ( i_RingBlockType == GET_SINGLE_RING ||
i_RingBlockType == PUT_SINGLE_RING )
@@ -1329,7 +1368,8 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
( torMagic == TOR_MAGIC_HW ||
torMagic == TOR_MAGIC_SBE ||
torMagic == TOR_MAGIC_OVRD ||
- torMagic == TOR_MAGIC_OVLY ) )
+ torMagic == TOR_MAGIC_OVLY ||
+ torMagic == TOR_MAGIC_CEN ) )
{
rc = get_ring_from_sbe_image( i_ringSection,
i_ringId,
@@ -1360,7 +1400,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
io_ringBlockSize );
}
- return TOR_RING_BLOCKS_FOUND;
+ return TOR_RING_FOUND;
}
}
else if ( i_PpeType == PT_CME &&
@@ -1426,7 +1466,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
io_ringBlockSize );
}
- return TOR_RING_BLOCKS_FOUND;
+ return TOR_RING_FOUND;
}
}
else if ( i_PpeType == PT_SGPE &&
@@ -1492,7 +1532,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr
io_ringBlockSize );
}
- return TOR_RING_BLOCKS_FOUND;
+ return TOR_RING_FOUND;
}
}
else
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.H b/src/import/chips/p9/utils/imageProcs/p9_tor.H
index 2865cbfb..6aa73b46 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.H
@@ -98,7 +98,6 @@ typedef enum TorOffsetSize
#define TOR_SUCCESS 0
#define TOR_RING_FOUND 0
-#define TOR_RING_BLOCKS_FOUND 0
#define TOR_RING_NOT_FOUND 1
#define TOR_AMBIGUOUS_API_PARMS 2
#define TOR_SECTION_NOT_FOUND 3
diff --git a/src/import/chips/p9/xip/p9_xip_tool.C b/src/import/chips/p9/xip/p9_xip_tool.C
index 011f90e4..38f07612 100644
--- a/src/import/chips/p9/xip/p9_xip_tool.C
+++ b/src/import/chips/p9/xip/p9_xip_tool.C
@@ -1886,7 +1886,8 @@ int dissectRingSectionTor( void* i_ringSection,
if ((torMagic == TOR_MAGIC_SGPE && ppeType != PT_SGPE) ||
(torMagic == TOR_MAGIC_CME && ppeType != PT_CME) ||
(torMagic == TOR_MAGIC_SBE && ppeType != PT_SBE) ||
- (torMagic == TOR_MAGIC_OVRD && ppeType != PT_SBE))
+ (torMagic == TOR_MAGIC_OVRD && ppeType != PT_SBE) ||
+ (torMagic == TOR_MAGIC_CEN && ppeType != PT_SBE))
{
continue;
}
@@ -1897,7 +1898,8 @@ int dissectRingSectionTor( void* i_ringSection,
for (ringVariant = 0; ringVariant <= OVERRIDE; ringVariant++)
{
if ((torMagic != TOR_MAGIC_OVRD && ringVariant == OVERRIDE) ||
- (torMagic == TOR_MAGIC_OVRD && ringVariant != OVERRIDE))
+ (torMagic == TOR_MAGIC_OVRD && ringVariant != OVERRIDE) ||
+ (torMagic == TOR_MAGIC_CEN && ringVariant == CC))
{
continue;
}
@@ -1945,7 +1947,7 @@ int dissectRingSectionTor( void* i_ringSection,
rs4 = (CompressedScanData*)ringBlockPtr;
// Sanity check RS4 container's ringId matches the requested.
- uint16_t l_ringId = be16toh(rs4->iv_ringId);
+ RingId_t l_ringId = be16toh(rs4->iv_ringId);
if ( l_ringId != ringId )
{
@@ -2182,7 +2184,7 @@ int dissectRingSectionTor( void* i_ringSection,
/// to dissectRingSectionTor which does the actual dissection and
/// summarizing of the ring section.
///
-/// \param[in] i_image A pointer to a P9-XIP image in host memory.
+/// \param[in] i_image A pointer to a P9-XIP image or TOR ringSection in host memory.
///
/// \param[in] i_argc Additional number of arguments beyond "dissect" keyword.
///
@@ -2235,7 +2237,8 @@ int dissectRingSection(void* i_image,
{
sectionId = P9_XIP_SECTION_SBE_RINGS;
}
- else if (hostHeader.iv_magic == P9_XIP_MAGIC_HW)
+ else if (hostHeader.iv_magic == P9_XIP_MAGIC_HW ||
+ hostHeader.iv_magic == P9_XIP_MAGIC_CENTAUR)
{
sectionId = P9_XIP_SECTION_HW_RINGS;
}
@@ -2298,15 +2301,15 @@ int dissectRingSection(void* i_image,
exit(1);
}
- if (be32toh(((TorHeader_t*)i_image)->magic) >> 8 != TOR_MAGIC)
+ ringSectionPtr = (void*)(hostSection.iv_offset + (uintptr_t)i_image);
+
+ if (be32toh(((TorHeader_t*)ringSectionPtr)->magic) >> 8 != TOR_MAGIC)
{
fprintf( stderr,
"ERROR: The XIP section is not a TOR compatible ring section. Possibly, the image is outdated and has the old TOR-headerless layout which is no longer supported. Try dissecting with an older version of p9_xip_tool.\n");
exit(EXIT_FAILURE);
}
- ringSectionPtr = (void*)(hostSection.iv_offset + (uintptr_t)i_image);
-
}
else if (be32toh(((TorHeader_t*)i_image)->magic) >> 8 == TOR_MAGIC)
{
diff --git a/src/tools/iplbuild/Makefile b/src/tools/iplbuild/Makefile
index 9a43e2ba..ae9802b3 100644
--- a/src/tools/iplbuild/Makefile
+++ b/src/tools/iplbuild/Makefile
@@ -41,15 +41,17 @@ include img_defs.mk
CXX = g++
-export VPATH = $(P9_XIP_SRCDIR):$(IMAGEPROCS_COMMON_SRCDIR):$(IMAGEPROCS_SRCDIR):$(IMAGEPROCS_TOOL_DIR)
+export VPATH = $(P9_XIP_SRCDIR):$(IMAGEPROCS_COMMON_SRCDIR):$(IMAGEPROCS_P9_SRCDIR):$(IMAGEPROCS_CEN_SRCDIR):$(IMAGEPROCS_TOOL_DIR)
export INCLUDES = -I$(P9_XIP_SRCDIR) \
-I$(IMAGEPROCS_COMMON_SRCDIR) \
- -I$(IMAGEPROCS_SRCDIR) \
+ -I$(IMAGEPROCS_P9_SRCDIR) \
+ -I$(IMAGEPROCS_CEN_SRCDIR) \
-I$(IMAGEPROCS_TOOL_DIR)
.PHONY : all utilities clean
OBJS = $(P9_XIP_BINDIR)/p9_xip_image.o \
$(BASE_OBJDIR)/tools/iplbuild/p9_ringId.o \
+ $(BASE_OBJDIR)/tools/iplbuild/cen_ringId.o \
$(BASE_OBJDIR)/tools/iplbuild/p9_tor.o \
$(BASE_OBJDIR)/tools/iplbuild/p9_ipl_build.o \
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