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| author | Nick Bofferding <bofferdn@us.ibm.com> | 2017-04-22 11:44:07 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-05-29 11:13:50 -0400 |
| commit | 5a69ee27dc16621ee71b65a460b52bf9eeb65b38 (patch) | |
| tree | eb96353bcfcf533a31394d7c5d59886105e508bc /src | |
| parent | 3d1659b34c258027e03d00573b4042e380629622 (diff) | |
| download | talos-sbe-5a69ee27dc16621ee71b65a460b52bf9eeb65b38.tar.gz talos-sbe-5a69ee27dc16621ee71b65a460b52bf9eeb65b38.zip | |
Check scrach register 3 bit 6 before potentially disabling security
Change-Id: I3b0574a10ef0483581e357b506b5e4e69fc13936
RTC: 170650
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39570
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Dev-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39576
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C index a96f300f..6fb2e78a 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C @@ -115,7 +115,7 @@ fapi2::ReturnCode p9_sbe_attr_setup(const FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_read_scratch8)); //l_read_scratch8 = PIB.SCRATCH_REGISTER_8 - //set_security_acess + //set_security_access { fapi2::buffer<uint64_t> l_read_reg; @@ -125,13 +125,23 @@ fapi2::ReturnCode p9_sbe_attr_setup(const FAPI_TRY(fapi2::getScom(i_target_chip, PERV_CBS_CS_SCOM, l_read_reg)); - if ( l_read_1.getBit<7>() == 0 ) + if ( (!l_read_1) // Security override possible + && (l_read_scratch8.getBit<2>()) ) // scratch 3 is valid { - FAPI_DBG("Clear Security Access Bit"); - l_read_reg.clearBit<4>(); //PIB.CBS_CS.CBS_CS_SECURE_ACCESS_BIT = 0 - FAPI_TRY(fapi2::putScom(i_target_chip, PERV_CBS_CS_SCOM, l_read_reg)); - } + FAPI_DBG("Reading mailbox scratch register 3 bit 6 to check " + "for external security override request"); + + //Getting SCRATCH_REGISTER_3 register value + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SCRATCH_REGISTER_3_SCOM, + l_read_scratch_reg)); //l_read_scratch_reg = PIB.SCRATCH_REGISTER_3 + if(l_read_scratch_reg.getBit<6>()) + { + FAPI_DBG("Clear Security Access Bit"); + l_read_reg.clearBit<4>(); //PIB.CBS_CS.CBS_CS_SECURE_ACCESS_BIT = 0 + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_CBS_CS_SCOM, l_read_reg)); + } + } l_read_1 = 0; l_read_1.writeBit<7>(l_read_reg.getBit<4>()); |
