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| author | Yue Du <daviddu@us.ibm.com> | 2016-12-02 16:57:19 -0600 |
|---|---|---|
| committer | spashabk-in <shakeebbk@in.ibm.com> | 2016-12-20 05:18:58 -0600 |
| commit | 59003b71458738f95b86d5fb25f5f88533c5e918 (patch) | |
| tree | 96fb2085346a69ffabda8265f666150de754ea98 /src | |
| parent | 67383c00b712d0f8c19ccb16fd4ba94d31d7280e (diff) | |
| download | talos-sbe-59003b71458738f95b86d5fb25f5f88533c5e918.tar.gz talos-sbe-59003b71458738f95b86d5fb25f5f88533c5e918.zip | |
HW396520: DD1 workaround skip flushmode inhibit drop in cache hwp
Change-Id: I6575ec51a94024708611678bee7af0cf7819b206
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33362
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: ADAM S. HALE <ashale@us.ibm.com>
Dev-Ready: ADAM S. HALE <ashale@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33366
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
3 files changed, 34 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C index 28d836a5..ed6fc353 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C @@ -99,21 +99,24 @@ p9_hcd_cache_startclocks( uint8_t l_attr_chip_id = 0; uint8_t l_attr_chip_unit_pos = 0; uint8_t l_attr_system_ipl_phase; + uint8_t l_attr_dd1_skip_flushmode_inhibit_drop; fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_chip = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = i_target.getParent<fapi2::TARGET_TYPE_PERV>(); fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> l_sys; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, l_sys, + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, l_sys, l_attr_system_ipl_phase)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_GROUP_ID, l_chip, + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW388878, l_chip, + l_attr_dd1_skip_flushmode_inhibit_drop)); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_GROUP_ID, l_chip, l_attr_group_id)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_CHIP_ID, l_chip, + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_CHIP_ID, l_chip, l_attr_chip_id)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_SYSTEM_ID, l_chip, + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_SYSTEM_ID, l_chip, l_attr_system_id)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_perv, + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_perv, l_attr_chip_unit_pos)); l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_EQ_POS_OFFSET; @@ -325,8 +328,11 @@ p9_hcd_cache_startclocks( "Cache Chiplet Checkstop"); */ - FAPI_DBG("Drop flushmode_inhibit via CPLT_CTRL0[2]"); - FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL0_CLEAR, MASK_SET(2))); + if (!l_attr_dd1_skip_flushmode_inhibit_drop) + { + FAPI_DBG("Drop flushmode_inhibit via CPLT_CTRL0[2]"); + FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL0_CLEAR, MASK_SET(2))); + } FAPI_DBG("Drop partial good and assert partial bad L2/L3 pscom masks"); l_data64 = (l_l2pscom_mask | l_l3pscom_mask); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 60eaff65..a40986ae 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -201,6 +201,23 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW396520</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + DD1 only: enable workarounds for HW396520 (skip flushmode inhibit drop) + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW388878</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 1618b373..cfdae245 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -405,6 +405,10 @@ attribute tank <virtual/> </entry> <entry> + <name>ATTR_CHIP_EC_FEATURE_HW396520</name> + <virtual/> + </entry> + <entry> <name>ATTR_CHIP_EC_FEATURE_HW388878</name> <virtual/> </entry> |
