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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2016-10-06 15:05:09 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-10-11 10:36:03 -0400
commit3aa8392da5bba9c961dc74ed6e87655cf8be7d1c (patch)
treee71163fc8c9a7e4addedaf97f6bc6f935c83d558 /src
parentc5e8f81acb726ade1061d501880d882d4a59ba71 (diff)
downloadtalos-sbe-3aa8392da5bba9c961dc74ed6e87655cf8be7d1c.tar.gz
talos-sbe-3aa8392da5bba9c961dc74ed6e87655cf8be7d1c.zip
Fixing error with DMA writes because of scope being LN not group
Change-Id: I16ab2b13f9b77d35ab1450783c8c8f35baa24106 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30828 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30841 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
index d0ea4eb5..2fe9c74b 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
@@ -113,6 +113,9 @@ extern "C"
//I think that the secondary encoding should always be 0 for cl_dma_rd
const uint32_t ALTD_CMD_DMAR_TSIZE = 0;
+ //Value for scope for any DMA write operations
+ const uint32_t ALTD_CMD_SCOPE_GROUP = 0b00000011;
+
// Values for PB operations
const uint32_t ALTD_CMD_PB_OPERATION_TSIZE = 0b00001000;
const uint32_t ALTD_CMD_SCOPE_SYSTEM = 0b00000101;
@@ -424,6 +427,9 @@ extern "C"
altd_cmd_reg_data.insertFromRight<ALTD_CMD_TTYPE_START_BIT,
ALTD_CMD_TTYPE_NUM_BITS>(ALTD_CMD_TTYPE_DMA_PR_WR);
+ //Set scope to group scope
+ altd_cmd_reg_data.insertFromRight<ALTD_CMD_SCOPE_START_BIT, ALTD_CMD_SCOPE_NUM_BITS>(ALTD_CMD_SCOPE_GROUP);
+
// Set TSIZE
if ( l_transSize == p9_ADU_oper_flag::TSIZE_1 )
{
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