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authorAnusha Reddy Rangareddygari <anusrang@in.ibm.com>2017-10-17 08:25:15 -0400
committerSachin Gupta <sgupta2m@in.ibm.com>2017-10-26 13:01:04 -0400
commit291ef16dcb1e9692e69925341fcda7a4040ff914 (patch)
tree6c285cf0a6ebb39540b9631244fda4bea206add8 /src
parent76a7eb9956ba2f1c1f0f5c74bf4eef168b328fd7 (diff)
downloadtalos-sbe-291ef16dcb1e9692e69925341fcda7a4040ff914.tar.gz
talos-sbe-291ef16dcb1e9692e69925341fcda7a4040ff914.zip
osclite status check in clock_test2
checking bits based on pci osc scenarios Change-Id: Ida0b6d97cffc1bc43d32dda1f3bdb611e26d56bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48485 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48491 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C38
1 files changed, 28 insertions, 10 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
index df464672..c4c2ea6b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
@@ -43,6 +43,7 @@
//## auto_generated
#include "p9_sbe_tp_chiplet_init3.H"
+#include "p9_setup_clock_term.H"
//## auto_generated
#include "p9_const_common.H"
@@ -280,6 +281,7 @@ fapi_try_exit:
static fapi2::ReturnCode p9_sbe_tp_chiplet_init3_clock_test2(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, uint8_t cumulus_only_ec_attr)
{
+ fapi2::buffer<uint32_t> l_data32;
fapi2::buffer<uint64_t> l_read ;
fapi2::buffer<uint64_t> l_data64;
FAPI_INF("p9_sbe_tp_chiplet_init3_clock_test2: Entering ...");
@@ -345,6 +347,11 @@ static fapi2::ReturnCode p9_sbe_tp_chiplet_init3_clock_test2(
l_data64.clearBit<PERV_1_LOCAL_FIR_IN37>();
FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TP_LOCAL_FIR_AND, l_data64));
+ FAPI_DBG("To get info about scr0,src1,both_src0,both_src1 from Root_ctrl3");
+ FAPI_TRY(fapi2::getScom(i_target_chip, PERV_ROOT_CTRL3_SCOM, l_data64));
+ l_data64.extractToRight<0, 32>(l_data32);
+ l_data32 &= 0x0000F000;
+
#ifndef SIM_ONLY_OSC_SWC_CHK
if (cumulus_only_ec_attr) //Cumulus only
@@ -354,17 +361,28 @@ static fapi2::ReturnCode p9_sbe_tp_chiplet_init3_clock_test2(
FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SNS1LTH_SCOM,
l_read)); //l_read = PIB.SNS1LTH
- FAPI_ASSERT(l_read.getBit<21>() == 0 && l_read.getBit<26>() == 1,
- fapi2::MF_OSC_NOT_TOGGLE()
- .set_MASTER_CHIP(i_target_chip)
- .set_READ_SNS1LTH(l_read),
- "MF oscillator(OSC0) not toggling");
+ if (l_data32 == p9SetupClockTerm::P9C_OSCSWITCH_RC3_BOTHSRC0
+ || l_data32 == p9SetupClockTerm::P9C_OSCSWITCH_RC3_BOTHSRC1
+ || l_data32 == p9SetupClockTerm::P9C_OSCSWITCH_RC3_SRC0)
+ {
+ FAPI_ASSERT(l_read.getBit<21>() == 0 && l_read.getBit<28>() == 1,
+ fapi2::MF_OSC_NOT_TOGGLE()
+ .set_MASTER_CHIP(i_target_chip)
+ .set_READ_SNS1LTH(l_read),
+ "MF oscillator(OSC0) not toggling");
- FAPI_ASSERT(l_read.getBit<23>() == 0 && l_read.getBit<27>() == 1,
- fapi2::MF_OSC_NOT_TOGGLE()
- .set_MASTER_CHIP(i_target_chip)
- .set_READ_SNS1LTH(l_read),
- "MF oscillator(OSC1) not toggling");
+ }
+
+ if (l_data32 == p9SetupClockTerm::P9C_OSCSWITCH_RC3_BOTHSRC0
+ || l_data32 == p9SetupClockTerm::P9C_OSCSWITCH_RC3_BOTHSRC1
+ || l_data32 == p9SetupClockTerm::P9C_OSCSWITCH_RC3_SRC1 )
+ {
+ FAPI_ASSERT(l_read.getBit<23>() == 0 && l_read.getBit<29>() == 1,
+ fapi2::MF_OSC_NOT_TOGGLE()
+ .set_MASTER_CHIP(i_target_chip)
+ .set_READ_SNS1LTH(l_read),
+ "MF oscillator(OSC1) not toggling");
+ }
FAPI_DBG("Cumulus - check Osc error active");
//Getting OSCERR_HOLD register value
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