summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorShakeeb <shakeebbk@in.ibm.com>2016-10-06 01:27:36 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-11-11 01:22:52 -0500
commit046b54f611dacb3ddb45a9835ec490f8dee44bdd (patch)
tree79caf48d08087794c10dc8e69c148e40339df376 /src
parent87d632d8a957d0a2714b93a66650501e02e866a2 (diff)
downloadtalos-sbe-046b54f611dacb3ddb45a9835ec490f8dee44bdd.tar.gz
talos-sbe-046b54f611dacb3ddb45a9835ec490f8dee44bdd.zip
Continue MPIPL implemntation
Change-Id: I3e10b71c081a506b692c8da24c9190f4613daa7f RTC:157068 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30775 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/sbefw/sbecmdiplcontrol.C90
-rw-r--r--src/sbefw/sbecmdmpipl.C44
2 files changed, 124 insertions, 10 deletions
diff --git a/src/sbefw/sbecmdiplcontrol.C b/src/sbefw/sbecmdiplcontrol.C
index 763f86a9..fc5d2271 100644
--- a/src/sbefw/sbecmdiplcontrol.C
+++ b/src/sbefw/sbecmdiplcontrol.C
@@ -181,6 +181,8 @@ ReturnCode istepWithProcSequenceDrtm( sbeIstepHwp_t i_hwp );
ReturnCode istepMpiplSetFunctionalState( sbeIstepHwp_t i_hwp );
ReturnCode istepMpiplSetMPIPLMode( sbeIstepHwp_t i_hwp );
ReturnCode istepMpiplQuadPoweroff( sbeIstepHwp_t i_hwp );
+ReturnCode istepMpiplSetFunctionalState( sbeIstepHwp_t i_hwp );
+ReturnCode istepMpiplSetMPIPLMode( sbeIstepHwp_t i_hwp );
#ifdef SEEPROM_IMAGE
// Using function pointer to force long call.
@@ -242,11 +244,11 @@ static istepMap_t g_istepMpiplContinuePtrTbl[MPIPL_CONTINUE_MAX_SUBSTEPS] =
{
#ifdef SEEPROM_IMAGE
// Setup EC/EQ guard records
- { NULL, NULL},
- // place holder for p9_quad_power_off
+ { &istepMpiplSetFunctionalState, NULL},
+ // p9_quad_power_off
{ istepMpiplQuadPoweroff, { .eqHwp = &p9_quad_power_off} },
// Set MPIPL mode in Sratch Reg 3
- { NULL, NULL},
+ { &istepMpiplSetMPIPLMode, NULL},
#endif
};
@@ -1113,4 +1115,86 @@ ReturnCode istepWithProcQuiesceLQASet( sbeIstepHwp_t i_hwp )
#undef SBE_FUNC
}
+//----------------------------------------------------------------------------
+ReturnCode istepMpiplSetMPIPLMode( sbeIstepHwp_t i_hwp)
+{
+ #define SBE_FUNC "istepMpiplSetMPIPLMode"
+ // Set MPIPL mode bit in Scratch Reg 3
+ (void)SbeRegAccess::theSbeRegAccess().setMpIplMode(true);
+ return FAPI2_RC_SUCCESS;
+ #undef SBE_FUNC
+}
+//----------------------------------------------------------------------------
+ReturnCode istepMpiplSetFunctionalState( sbeIstepHwp_t i_hwp )
+{
+ #define SBE_FUNC "istepMpiplSetFunctionalState"
+ SBE_ENTER(SBE_FUNC);
+ Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
+ ReturnCode rc = FAPI2_RC_SUCCESS;
+ do
+ {
+ // Read the EQ and EC gard attributes from the chip target
+ fapi2::buffer<uint64_t> l_scratchReg1 = 0;
+ uint64_t l_scratchReg8 = 0;
+ static const uint64_t SCRATCH8_SCRATCH1REG_VALID_BIT =
+ 0x8000000000000000ULL;
+ fapi2::buffer<uint8_t> l_eqMask = 0;
+ fapi2::buffer<uint32_t> l_ecMask = 0;
+ plat_target_handle_t l_hndl;
+ rc = getscom_abs_wrap (&l_hndl,
+ PERV_SCRATCH_REGISTER_8_SCOM,
+ &l_scratchReg8);
+ if( rc != FAPI2_RC_SUCCESS )
+ {
+ SBE_ERROR(SBE_FUNC" Failed to read Scratch RegR8");
+ break;
+ }
+ if(l_scratchReg8 & SCRATCH8_SCRATCH1REG_VALID_BIT)
+ {
+ rc = getscom_abs_wrap (&l_hndl,
+ PERV_SCRATCH_REGISTER_1_SCOM,
+ &l_scratchReg1());
+ if( rc != FAPI2_RC_SUCCESS )
+ {
+ SBE_ERROR(SBE_FUNC" Failed to read Scratch Reg1");
+ break;
+ }
+
+ l_scratchReg1.extract<0, 6>(l_eqMask);
+ l_scratchReg1.extract<8, 24>(l_ecMask);
+ SBE_INFO(SBE_FUNC" Setting ATTR_EQ_GARD [0x%08X] "
+ "ATTR_EC_GARD [0x%08X]",
+ l_eqMask, l_ecMask);
+
+ FAPI_ATTR_SET(fapi2::ATTR_EQ_GARD, proc, l_eqMask);
+ FAPI_ATTR_SET(fapi2::ATTR_EC_GARD, proc, l_ecMask);
+
+ // Apply the gard records
+ rc = plat_ApplyGards();
+ if( rc != FAPI2_RC_SUCCESS )
+ {
+ SBE_ERROR(SBE_FUNC" Failed to to apply gard records");
+ break;
+ }
+
+ // TODO via RTC 135345
+ // Once multicast targets are supported, we may need to pass
+ // p9selectex::ALL as input.
+ SBE_EXEC_HWP(rc, p9_sbe_select_ex_hwp, proc, p9selectex::SINGLE)
+ if( rc != FAPI2_RC_SUCCESS )
+ {
+ SBE_ERROR(SBE_FUNC" Failed hwp p9_sbe_select_ex_hwp");
+ break;
+ }
+ }
+ else
+ {
+ SBE_ERROR(SBE_FUNC " Scratch Reg 1 is invalid,"
+ "not applying gard records");
+ }
+ }while(0);
+ SBE_EXIT(SBE_FUNC);
+ return rc;
+ #undef SBE_FUNC
+}
diff --git a/src/sbefw/sbecmdmpipl.C b/src/sbefw/sbecmdmpipl.C
index 7db0f199..f6faf10d 100644
--- a/src/sbefw/sbecmdmpipl.C
+++ b/src/sbefw/sbecmdmpipl.C
@@ -117,6 +117,8 @@ uint32_t sbeContinueMpipl(uint8_t *i_pArg)
SBE_ENTER(SBE_FUNC);
uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
uint32_t len = 0;
+ ReturnCode l_fapiRc = FAPI2_RC_SUCCESS;
+ sbeResponseFfdc_t l_ffdc;
sbeRespGenHdr_t l_respHdr;
l_respHdr.init();
@@ -126,14 +128,42 @@ uint32_t sbeContinueMpipl(uint8_t *i_pArg)
l_rc = sbeUpFifoDeq_mult (len, NULL);
CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc);
- l_rc = sbeDsSendRespHdr( l_respHdr);
-
- //TODO RTC-134278 Continue MPIPL Related procedure/steps
-
- // TODO - Once continue steps are over, it will trigger the
- // istep5.2 and transition to runtime will happen
-
+ // Run isteps
+ const uint8_t isteps[][3] = {
+ // Major Num, Minor Start, Minor End
+ {SBE_ISTEP_MPIPL_CONTINUE, ISTEP_MINOR_START, MPIPL_CONTINUE_MAX_SUBSTEPS},
+ {SBE_ISTEP4, ISTEP_MINOR_START, ISTEP4_MAX_SUBSTEPS},
+ {SBE_ISTEP5, ISTEP_MINOR_START, ISTEP5_MAX_SUBSTEPS}};
+ // Loop through isteps
+ for( auto istep : isteps)
+ {
+ for(uint8_t l_minor = istep[1]; l_minor <= istep[2]; l_minor++)
+ {
+ l_fapiRc = sbeExecuteIstep(istep[0], l_minor);
+ if(l_fapiRc != FAPI2_RC_SUCCESS)
+ {
+ SBE_ERROR(SBE_FUNC "Failed in Mpipl continue in ChipOp "
+ "Mode Major [%d] Minor [%d]", istep[0], l_minor);
+ l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
+ SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
+ l_ffdc.setRc(l_fapiRc);
+ break;
+ }
+ }
+ if(l_ffdc.getRc() != FAPI2_RC_SUCCESS)
+ {
+ break;
+ }
+ }
}while(0);
+
+ // Create the Response to caller
+ // If there was a FIFO error, will skip sending the response,
+ // instead give the control back to the command processor thread
+ if(SBE_SEC_OPERATION_SUCCESSFUL == l_rc)
+ {
+ l_rc = sbeDsSendRespHdr( l_respHdr, &l_ffdc);
+ }
SBE_EXIT(SBE_FUNC);
return l_rc;
#undef SBE_FUNC
OpenPOWER on IntegriCloud