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author | Pretty Mariam Jacob <prettymjacob@in.ibm.com> | 2019-01-21 06:04:54 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2019-02-05 01:01:36 -0600 |
commit | b2548e2548114cfa220e953b10304fcb9322d0c1 (patch) | |
tree | c94cda7f550b9f940e5dd1ef801b7427f84aaedf /src | |
parent | 953dc3134693bd272c460a7ae9dd4d40bfc40511 (diff) | |
download | talos-sbe-b2548e2548114cfa220e953b10304fcb9322d0c1.tar.gz talos-sbe-b2548e2548114cfa220e953b10304fcb9322d0c1.zip |
Added Alink changes in attributes and initfiles
Change-Id: I6572bfaa5834c585901ce9a5fc923f82a296b930
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70689
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70720
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 31 |
1 files changed, 6 insertions, 25 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 694e5cd2..4cb152df 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -116,17 +116,18 @@ </attribute> <!-- ********************************************************************* --> <attribute> - <id>ATTR_CHIP_EC_FEATURE_ALINK</id> + <id>ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> - Returns true if the chip has an A-Link - (Nimbus and Cumulus, not Axone) + DD1 FBC setting differs from DD2, ex. lo_limit adjustment. + Adding for Axone as it has A-link support + True if Nimbus dd2 or greater or cumulus </description> <chipEcFeature> <chip> <name>ENUM_ATTR_NAME_NIMBUS</name> <ec> - <value>0x10</value> + <value>0x20</value> <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> @@ -137,27 +138,8 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> - </chipEcFeature> - </attribute> - <!-- ******************************************************************** --> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> - <description> - DD1 FBC setting differs from DD2, ex. lo_limit adjustment. - Axone does not have A-link support - True if Nimbus dd2 or greater or cumulus - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> + <name>ENUM_ATTR_NAME_AXONE</name> <ec> <value>0x10</value> <test>GREATER_THAN_OR_EQUAL</test> @@ -165,7 +147,6 @@ </chip> </chipEcFeature> </attribute> - <!-- ********************************************************************* --> <attribute> <id>ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR</id> |