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| author | Ben Gass <bgass@us.ibm.com> | 2019-03-06 17:25:00 -0500 |
|---|---|---|
| committer | RAJA DAS <rajadas2@in.ibm.com> | 2019-03-22 21:28:09 -0500 |
| commit | 26c8a88a4f65422415d839efc558715d619b1a8b (patch) | |
| tree | b31fc8acaec0bddfe4d9e1f3513598b915b47d34 /src | |
| parent | 8cdd1fc4febfa9de75b039787ddbe9cbb4b80af2 (diff) | |
| download | talos-sbe-26c8a88a4f65422415d839efc558715d619b1a8b.tar.gz talos-sbe-26c8a88a4f65422415d839efc558715d619b1a8b.zip | |
Update ATRMISS registers for Axone
The address changed and there are now two.
Change-Id: Iad60f8ec843ed61d28ef11903d8258ecfe213aa3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72965
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72985
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index eb60a7f8..84de0d63 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -6503,6 +6503,23 @@ </chip> </chipEcFeature> </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_SETUP_BARS_NPU_AXONE_ADDR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Axone only: Use the Axone register addresses for the PHY0 BAR registers, PHY1 BAR registers, and MMIO BAR registers + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> <!-- ********************************************************************* --> <attribute> <id>ATTR_CHIP_EC_FEATURE_SKEWADJ_P9NDD1_INIT</id> |
