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| author | Raja Das <rajadas2@in.ibm.com> | 2016-09-07 01:00:13 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-10-06 07:47:18 -0400 |
| commit | edec9bde06d4a3e1c06fc15c9312318b9324d94c (patch) | |
| tree | 963a635bd1e3e456bd25a28e1d8ff86744ac043a /src/test | |
| parent | 6be042c2d9e9f64b3151fc95dbd98dd2723474c5 (diff) | |
| download | talos-sbe-edec9bde06d4a3e1c06fc15c9312318b9324d94c.tar.gz talos-sbe-edec9bde06d4a3e1c06fc15c9312318b9324d94c.zip | |
Stop Clocks for MPIPL (Core & Cache(EQ))
RTC: 156382
Change-Id: Ib3e8c29467aa7d3b6b85286e6f5ce154f0f28ad6
RTC: 156382
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29555
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/testcases/testStopClocks.py | 97 | ||||
| -rwxr-xr-x | src/test/testcases/testStopClocks.xml | 28 |
2 files changed, 125 insertions, 0 deletions
diff --git a/src/test/testcases/testStopClocks.py b/src/test/testcases/testStopClocks.py new file mode 100644 index 00000000..d81fdd37 --- /dev/null +++ b/src/test/testcases/testStopClocks.py @@ -0,0 +1,97 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/test/testcases/testStopClocks.py $ +# +# OpenPOWER sbe Project +# +# Contributors Listed Below - COPYRIGHT 2016 +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +import sys +sys.path.append("targets/p9_nimbus/sbeTest" ) +import testUtil +err = False +#from testWrite import * + +STOPCLOCK_CORE_TESTDATA = [0,0,0,0x5, + 0,0,0xA9,0x03, + 0x0,0x5,0x0,0x20] # target type/chiplet id + +STOPCLOCK_ALL_CORE_TESTDATA = [0,0,0,0x5, + 0,0,0xA9,0x03, + 0x0,0x5,0x0,0xFF] # target type/chiplet id + +STOPCLOCK_CORE_EXPDATA = [0xc0,0xde,0xa9,0x03, + 0x0,0x0,0x0,0x0, + 0x0,0x0,0x0,0x03]; + +STOPCLOCK_EQ_TESTDATA = [0,0,0,0x5, + 0,0,0xA9,0x03, + 0x0,0x4,0x0,0x10] # target type/chiplet id + +STOPCLOCK_ALL_EQ_TESTDATA = [0,0,0,0x5, + 0,0,0xA9,0x03, + 0x0,0x4,0x0,0xFF] # target type/chiplet id + +STOPCLOCK_EQ_EXPDATA = [0xc0,0xde,0xa9,0x03, + 0x0,0x0,0x0,0x0, + 0x0,0x0,0x0,0x03]; + + +# MAIN Test Run Starts Here... +#------------------------------------------------- +def main( ): + testUtil.runCycles( 10000000 ) + + testUtil.writeUsFifo( STOPCLOCK_CORE_TESTDATA ) + testUtil.writeEot( ) + testUtil.readDsFifo( STOPCLOCK_CORE_EXPDATA ) + testUtil.runCycles( 10000000 ) + testUtil.readEot( ) + + testUtil.writeUsFifo( STOPCLOCK_ALL_CORE_TESTDATA ) + testUtil.writeEot( ) + testUtil.readDsFifo( STOPCLOCK_CORE_EXPDATA ) + testUtil.runCycles( 10000000 ) + testUtil.readEot( ) + + testUtil.runCycles( 10000000 ) + testUtil.writeUsFifo( STOPCLOCK_EQ_TESTDATA ) + testUtil.writeEot( ) + testUtil.readDsFifo( STOPCLOCK_EQ_EXPDATA ) + testUtil.runCycles( 10000000 ) + testUtil.readEot( ) + + testUtil.runCycles( 10000000 ) + testUtil.writeUsFifo( STOPCLOCK_ALL_EQ_TESTDATA ) + testUtil.writeEot( ) + testUtil.readDsFifo( STOPCLOCK_EQ_EXPDATA ) + testUtil.runCycles( 10000000 ) + testUtil.readEot( ) + +#------------------------------------------------- +# Calling all test code +#------------------------------------------------- +main() + +if err: + print ("\nTest Suite completed with error(s)") + #sys.exit(1) +else: + print ("\nTest Suite completed with no errors") + #sys.exit(0); + diff --git a/src/test/testcases/testStopClocks.xml b/src/test/testcases/testStopClocks.xml new file mode 100755 index 00000000..53725fff --- /dev/null +++ b/src/test/testcases/testStopClocks.xml @@ -0,0 +1,28 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/test/testcases/testStopClocks.xml $ --> +<!-- --> +<!-- OpenPOWER sbe Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016 --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + <testcase> + <simcmd>run-python-file targets/p9_nimbus/sbeTest/testStopClocks.py</simcmd> + <exitonerror>yes</exitonerror> + </testcase> + |
