Set FFDC Chip-op

Change-Id: Ie0514aef2ea17bbc56096c7990d2b577f531c0ed
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35090
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>

3 files changed, 143 insertions, 0 deletions

diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml
index 37359528..ccd03050 100755
--- a/src/test/testcases/test.xml
+++ b/src/test/testcases/test.xml
@@ -39,6 +39,7 @@
           <include>../simics/targets/p9_nimbus/sbeTest/testRegAccess.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testFifoReset.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testAduMem.xml</include>
+          <include>../simics/targets/p9_nimbus/sbeTest/testPSUSetFFDCAddr.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testSystemFabricMap.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testExecutorCntrlTimer.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testArrayAccess.xml</include>
diff --git a/src/test/testcases/testPSUSetFFDCAddr.py b/src/test/testcases/testPSUSetFFDCAddr.py
new file mode 100644
index 00000000..5e0a3bc4
--- /dev/null
+++ b/src/test/testcases/testPSUSetFFDCAddr.py
@@ -0,0 +1,112 @@
+#!/usr/bin/python
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/test/testcases/testPSUSetFFDCAddr.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2016,2017
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import testPSUUtil
+import testRegistry as reg
+import testUtil
+
+#-------------------------------
+# This  is a Test Expected Data
+#-------------------------------
+'''
+This data are the values or strings that needs to be validated for the test.
+'''
+'''
+#------------------------------------------------------------------------------------------------------------------------------
+# SBE side test data -
+#------------------------------------------------------------------------------------------------------------------------------
+'''
+sbe_test_data = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        FFDC Size, Pass CMD Size
+    ["write", reg.REG_MBOX0, "0000010000F0D704", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        FFDC Size, Pass CMD Size
+    ["write", reg.REG_MBOX1, "0000000100000001", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                           FFDC Addr
+    ["write", reg.REG_MBOX2, "1234567898765432", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    #                           Pass Cmd Addr
+    ["write", reg.REG_MBOX3, "9876543212345678", 	 8, 	"None", 			"Writing to MBOX3 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+#---------------------
+# Host side test data - SUCCESS
+#---------------------
+'''
+host_test_data_success = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data        Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.REG_MBOX4, 		"0", 	 	 8, 	"0000000000F0D704", "Reading Host MBOX4 data to Validate"],
+    )
+
+'''
+#-----------------------------------------------------------------------
+# Do not modify - Used to simulate interrupt on Ringing Doorbell on Host
+#-----------------------------------------------------------------------
+'''
+host_polling_data = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data           Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR, 		"0", 		8, 	"8000000000000000", "Reading Host Doorbell for Interrupt"],
+    )
+
+#-------------------------
+# Main Function
+#-------------------------
+def main():
+    # Run Simics initially
+    testUtil.runCycles( 10000000 );
+
+    # Intialize the class obj instances
+    regObj = testPSUUtil.registry() # Registry obj def for operation
+
+    print "\n  Execute SBE Test - Set FFDC Address\n"
+
+    '''
+    Test Case 1
+    '''
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data )
+
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+
+if __name__ == "__main__":
+    main()
+    if err:
+    	print ( "\nTest Suite completed with error(s)" )
+    	#sys.exit(1)
+    else:
+    	print ( "\nTest Suite completed with no errors" )
+	#sys.exit(0);
+
+
diff --git a/src/test/testcases/testPSUSetFFDCAddr.xml b/src/test/testcases/testPSUSetFFDCAddr.xml
new file mode 100755
index 00000000..6a5abe49
--- /dev/null
+++ b/src/test/testcases/testPSUSetFFDCAddr.xml
@@ -0,0 +1,30 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/test/testcases/testPSUSetFFDCAddr.xml $                   -->
+<!--                                                                        -->
+<!-- OpenPOWER sbe Project                                                  -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<?xml version="1.0" encoding="UTF-8"?>
+
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPSUSetFFDCAddr.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
+