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| author | spashabk-in <shakeebbk@in.ibm.com> | 2017-01-18 00:37:53 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-02-07 09:07:54 -0500 |
| commit | 8ba9b982a8f4357dcc4c6ff2204dee00a344c013 (patch) | |
| tree | f860a61630d052012258eca090f13f1029a933f6 /src/test | |
| parent | 9454074a844f0fa70c19e4e5c4d0f3fd9085d646 (diff) | |
| download | talos-sbe-8ba9b982a8f4357dcc4c6ff2204dee00a344c013.tar.gz talos-sbe-8ba9b982a8f4357dcc4c6ff2204dee00a344c013.zip | |
Stopclock chip-op update
Change-Id: If382ef60fa3c4a7115fd417edf7c4f18999f226e
RTC:162349
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34164
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/testcases/testStopClocks.py | 41 |
1 files changed, 31 insertions, 10 deletions
diff --git a/src/test/testcases/testStopClocks.py b/src/test/testcases/testStopClocks.py index 98bf8d72..06723adf 100644 --- a/src/test/testcases/testStopClocks.py +++ b/src/test/testcases/testStopClocks.py @@ -5,7 +5,7 @@ # # OpenPOWER sbe Project # -# Contributors Listed Below - COPYRIGHT 2016 +# Contributors Listed Below - COPYRIGHT 2016,2017 # [+] International Business Machines Corp. # # @@ -28,29 +28,38 @@ import testUtil err = False #from testWrite import * -STOPCLOCK_CORE_TESTDATA = [0,0,0,0x5, +STOPCLOCK_CORE_TESTDATA = [0,0,0,0x3, 0,0,0xA9,0x03, - 0x0,0x5,0x0,0x20] # target type/chiplet id + 0x0,0x02,0x00,0x20] # target type/chiplet id +STOPCLOCK_PROC_TESTDATA = [0,0,0,0x3, + 0,0,0xA9,0x03, + 0x0,0x0,0x0,0x00] # target type/chiplet id -STOPCLOCK_ALL_CORE_TESTDATA = [0,0,0,0x5, +STOPCLOCK_ALL_CORE_TESTDATA = [0,0,0,0x3, 0,0,0xA9,0x03, 0x0,0x5,0x0,0xFF] # target type/chiplet id -STOPCLOCK_CORE_EXPDATA = [0xc0,0xde,0xa9,0x03, +STOPCLOCK_PASS_EXPDATA = [0xc0,0xde,0xa9,0x03, 0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x03]; -STOPCLOCK_EQ_TESTDATA = [0,0,0,0x5, +STOPCLOCK_EQ_TESTDATA = [0,0,0,0x3, 0,0,0xA9,0x03, - 0x0,0x4,0x0,0x10] # target type/chiplet id + 0x0,0x2,0x0,0x10] # target type/chiplet id -STOPCLOCK_ALL_EQ_TESTDATA = [0,0,0,0x5, +STOPCLOCK_ALL_EQ_TESTDATA = [0,0,0,0x3, 0,0,0xA9,0x03, 0x0,0x4,0x0,0xFF] # target type/chiplet id STOPCLOCK_EQ_EXPDATA = [0xc0,0xde,0xa9,0x03, 0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x03]; +STOPCLOCK_INVALIDTARGET_TESTDATA = [0,0,0,0x3, + 0,0,0xA9,0x03, + 0x0,0x09,0x00,0x20] # target type/chiplet id +STOPCLOCK_FAIL_EXPDATA = [0xc0,0xde,0xa9,0x03, + 0x0,0x02,0x0,0x04, + 0x0,0x0,0x0,0x03]; # MAIN Test Run Starts Here... @@ -60,13 +69,13 @@ def main( ): testUtil.writeUsFifo( STOPCLOCK_CORE_TESTDATA ) testUtil.writeEot( ) - testUtil.readDsFifo( STOPCLOCK_CORE_EXPDATA ) + testUtil.readDsFifo( STOPCLOCK_PASS_EXPDATA ) testUtil.runCycles( 10000000 ) testUtil.readEot( ) # testUtil.writeUsFifo( STOPCLOCK_ALL_CORE_TESTDATA ) # testUtil.writeEot( ) -# testUtil.readDsFifo( STOPCLOCK_CORE_EXPDATA ) +# testUtil.readDsFifo( STOPCLOCK_PASS_EXPDATA ) # testUtil.runCycles( 10000000 ) # testUtil.readEot( ) # @@ -84,6 +93,18 @@ def main( ): # testUtil.runCycles( 10000000 ) # testUtil.readEot( ) + testUtil.writeUsFifo( STOPCLOCK_PROC_TESTDATA ) + testUtil.writeEot( ) + testUtil.readDsFifo( STOPCLOCK_PASS_EXPDATA ) + testUtil.runCycles( 10000000 ) + testUtil.readEot( ) + + testUtil.writeUsFifo( STOPCLOCK_INVALIDTARGET_TESTDATA ) + testUtil.writeEot( ) + testUtil.readDsFifo( STOPCLOCK_FAIL_EXPDATA ) + testUtil.runCycles( 10000000 ) + testUtil.readEot( ) + #------------------------------------------------- # Calling all test code #------------------------------------------------- |
