SBE internal FFDC over HOST interface

Change-Id: I015486d58293f447ddc93635b72aa12c76689f30
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35212
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

3 files changed, 189 insertions, 6 deletions

diff --git a/src/test/testcases/testGeneric.xml b/src/test/testcases/testGeneric.xml
index 7609f707..dad7a81b 100755
--- a/src/test/testcases/testGeneric.xml
+++ b/src/test/testcases/testGeneric.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER sbe Project                                                  -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016                             -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -33,3 +33,7 @@
           <simcmd>run-python-file targets/p9_nimbus/sbeTest/testSbeDump.py</simcmd>
           <exitonerror>yes</exitonerror>
       </testcase>
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testHostFFDC.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
diff --git a/src/test/testcases/testHostFFDC.py b/src/test/testcases/testHostFFDC.py
new file mode 100644
index 00000000..60c61e24
--- /dev/null
+++ b/src/test/testcases/testHostFFDC.py
@@ -0,0 +1,162 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/test/testcases/testHostFFDC.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2017
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testPSUUtil
+import testRegistry as reg
+import testUtil
+import testMemUtil
+
+#-------------------------------
+# This  is a Test Expected Data
+#-------------------------------
+'''
+This data are the values or strings that needs to be validated for the test.
+'''
+'''
+#------------------------------------------------------------------------------------------------------------------------------
+# SBE side test data -
+#------------------------------------------------------------------------------------------------------------------------------
+'''
+sbe_test_data = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Set FFDC chip-op
+    ["write", reg.REG_MBOX0, "0000010000F0D704",     8,     "None",         "Writing to MBOX0 address"],
+    #                        FFDC Size, Pass CMD Size
+    ["write", reg.REG_MBOX1, "0000200000000100",     8,     "None",         "Writing to MBOX1 address"],
+    #                           FFDC Addr
+    ["write", reg.REG_MBOX2, "0000000008000000",     8,     "None",             "Writing to MBOX2 address"],
+    #                           Pass Cmd Addr
+    ["write", reg.REG_MBOX3, "0000000008000000",     8,     "None",             "Writing to MBOX3 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000",    8,     "None",         "Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+#---------------------
+# Host side test data - SUCCESS
+#---------------------
+'''
+host_test_data_success = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data        Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.REG_MBOX4,         "0",         8,     "0000000000F0D704", "Reading Host MBOX4 data to Validate"],
+    )
+
+'''
+#-----------------------------------------------------------------------
+# Do not modify - Used to simulate interrupt on Ringing Doorbell on Host
+#-----------------------------------------------------------------------
+'''
+host_polling_data = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data           Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR,       "0",        8, "8000000000000000", "Reading Host Doorbell for Interrupt Bit0"],
+    )
+
+host_pass_through_polling_data = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data           Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR,       "0",        8, "0800000000000000", "Reading Host Doorbell for Interrupt Bit4"],
+    )
+
+'''
+#------------------------------------------------------------------------------------------------------------------------------
+# SBE side test data - Target - Pervasive(Core), Chiplet Id - 32, Ring ID - ec_func(224), mode - 0x0020(RING_MODE_HEADER_CHECK)
+#------------------------------------------------------------------------------------------------------------------------------
+'''
+sbe_test_invalid_ring = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    ["write", reg.REG_MBOX0, "0000010000F0D301", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    ["write", reg.REG_MBOX1, "0002002000FF0020", 	 8, 	"None", 			"Writing to MBOX1 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+host_test_data_failure = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data        Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.REG_MBOX4, 		"0", 	 	 8, 	"00FE000A00F0D301", "Reading Host MBOX4 data to Validate"],
+    )
+
+#-------------------------
+# Main Function
+#-------------------------
+def main():
+    # Run Simics initially
+    testUtil.runCycles( 10000000 );
+
+    # Intialize the class obj instances
+    regObj = testPSUUtil.registry() # Registry obj def for operation
+
+    print "\n  Execute SBE Test - Set FFDC Address\n"
+
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data )
+
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+
+    testUtil.runCycles( 10000000 )
+
+    # Invalid ring - 248
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_invalid_ring )
+
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_failure )
+
+    #dump ffdc to a file
+    readData = testMemUtil.getmem(0x08000000, 0x2000, 0x02)
+    hostDumpFile = open("hostDumpFFDC.bin", 'wb')
+    hostDumpFile.write(bytearray(readData))
+    hostDumpFile.close()
+
+    # extract HWP ffdc
+    readData = testUtil.extractHWPFFDC(True, readData)
+
+if __name__ == "__main__":
+    main()
+    if err:
+        print ( "\nTest Suite completed with error(s)" )
+        #sys.exit(1)
+    else:
+        print ( "\nTest Suite completed with no errors" )
+    #sys.exit(0);
+
+
diff --git a/src/test/testcases/testUtil.py b/src/test/testcases/testUtil.py
index 5fd46307..3e78bd50 100644
--- a/src/test/testcases/testUtil.py
+++ b/src/test/testcases/testUtil.py
@@ -150,9 +150,13 @@ def readEntry(obj, address, size):
 
     return value
 
-def extractHWPFFDC(dumpToFile = False):
+def extractHWPFFDC(dumpToFile = False, readData = None):
     '''Header extraction'''
-    data = readDsEntryReturnVal()
+    if(readData != None):
+        data = readData[:4]
+        readData = readData[4:]
+    else:
+        data = readDsEntryReturnVal()
     magicBytes = ((data[0] << 8) | data[1])
     if (magicBytes == 0xFFDC) :
         print ("\nMagic Bytes Match")
@@ -161,13 +165,21 @@ def extractHWPFFDC(dumpToFile = False):
     packLen = ((data[2] << 8) | data[3])
     print ("\nFFDC package length = " + str(packLen))
     # extract Sequence ID, Command class and command
-    data = readDsEntryReturnVal()
+    if(readData != None):
+        data = readData[:4]
+        readData = readData[4:]
+    else:
+        data = readDsEntryReturnVal()
     seqId = ((data[0] << 24) | (data[1] << 16))
     cmdClass = data[2]
     cmd = data[3]
     print ("\n SeqId ["+str(seqId)+"] CmdClass ["+str(cmdClass)+"] Cmd ["+str(cmd)+"]")
 
-    data = readDsEntryReturnVal()
+    if(readData != None):
+        data = readData[:4]
+        readData = readData[4:]
+    else:
+        data = readDsEntryReturnVal()
     fapiRc = ((data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3])
     print ("\nFAPI rc = " + str(hex(fapiRc)))
 
@@ -175,12 +187,17 @@ def extractHWPFFDC(dumpToFile = False):
         myBin = open('hwp_ffdc.bin', 'wb')
         print ("\nwriting "+'hwp_ffdc.bin')
     for i in range(0, packLen-3):
-        data = readDsEntryReturnVal()
+        if(readData != None):
+            data = readData[:4]
+            readData = readData[4:]
+        else:
+            data = readDsEntryReturnVal()
         if(dumpToFile):
             myBin.write(bytearray(data))
     if(dumpToFile):
         print("write to a file Done")
         myBin.close()
+    return readData
 
 def read(obj, address, size):
     """ Read from memory space """