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authorspashabk-in <shakeebbk@in.ibm.com>2017-07-31 07:10:40 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-09-06 04:38:28 -0400
commit708be51a63b378eb92a85e30661f77cbaf0d8807 (patch)
tree028b9ebc9998cd0f8373c1515e6d6ba23f5c0f91 /src/test/testcases/testMemUtil.py
parent736117bd18a6cd612ce052ff79dee895e8415d02 (diff)
downloadtalos-sbe-708be51a63b378eb92a85e30661f77cbaf0d8807.tar.gz
talos-sbe-708be51a63b378eb92a85e30661f77cbaf0d8807.zip
Secure Memory Manager implementation
Support to update and manage the memory window list Opening of HB Dump window in istep 5.1 Enabled memory filtering in mem access chip-ops Change-Id: I72b68ac099371babe47a64689fa38927934625b7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43929 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/test/testcases/testMemUtil.py')
-rw-r--r--src/test/testcases/testMemUtil.py30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/test/testcases/testMemUtil.py b/src/test/testcases/testMemUtil.py
index 1014f46c..fce1eae2 100644
--- a/src/test/testcases/testMemUtil.py
+++ b/src/test/testcases/testMemUtil.py
@@ -89,7 +89,35 @@ def putmem(addr, data, flags, ecc=0):
testUtil.readDsFifo(expData)
testUtil.readEot( )
+def putmem_failure(addr, data, flags, responseWord, ecc=0):
+ lenInBytes = len(data)
+ if(len(data) < 8):
+ data = data+[0]*(4-len(data))
+ totalLen = 5 + len(data)/4
+ coreChipletId = 0x00
+ if (flags & 0x0040):
+ # LCO mode is set, so chiplet id - 0x20
+ coreChipletId = 0x20
+ req = (getsingleword(totalLen)
+ +[ 0,0,0xA4,0x02]
+ +[coreChipletId, ecc]
+ +gethalfword(flags)
+ #0,0,0x0,0xA5] #CoreChipletId/EccByte/Flags -> NoEccOverride/CacheInhibit/FastMode/NoTag/NoEcc/AutoIncr/Adu/Proc
+ + getdoubleword(addr)
+ + getsingleword(lenInBytes) # length of data
+ + data)
+ testUtil.writeUsFifo(req)
+ testUtil.writeEot( )
+ testUtil.runCycles( 10000000 )
+ expResp = ([0x0, 0x0, 0x0, 0x0]
+ + [0xc0,0xde,0xa4,0x02]
+ + getsingleword(responseWord)
+ + [0x0,0x0,0x0,0x03])
+ testUtil.readDsFifo(expResp)
+ testUtil.readEot( )
+
def getmem(addr, len, flags):
+ testUtil.runCycles( 10000000 )
req = (getsingleword(6)
+ [0, 0, 0xA4, 0x01]
+ getsingleword(flags)
@@ -122,6 +150,7 @@ def getmem(addr, len, flags):
return data[:lenExp]
def getmem_failure(addr, len, flags, responseWord):
+ testUtil.runCycles( 10000000 )
req = (getsingleword(6)
+ [0, 0, 0xA4, 0x01]
+ getsingleword(flags)
@@ -137,6 +166,7 @@ def getmem_failure(addr, len, flags, responseWord):
testUtil.readEot( )
def setUnsecureMemRegion(addr, size, controlFlag, responseWord):
+ testUtil.runCycles( 10000000 )
req = (["write", reg.REG_MBOX0,"0"*(8-len(hex(controlFlag).split('0x')[-1]))+hex(controlFlag).split('0x')[-1] +"00F0D601", 8, "None", "Writing to MBOX0 address"],
["write", reg.REG_MBOX1, "0"*(16-len(hex(size).split('0x')[-1]))+hex(size).split('0x')[-1], 8, "None", "Writing to MBOX1 address"],
["write", reg.REG_MBOX2, "0"*(16-len(hex(addr).split('0x')[-1]))+hex(addr).split('0x')[-1], 8, "None", "Writing to MBOX1 address"],
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