Target Table update as per SBE spec

Change-Id: I60e8fbd871148e1f9f9fc0c08a502031b01c2446
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35022
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>

4 files changed, 148 insertions, 30 deletions

diff --git a/src/sbefw/sbeSpMsg.H b/src/sbefw/sbeSpMsg.H
index 433f7132..b80592be 100644
--- a/src/sbefw/sbeSpMsg.H
+++ b/src/sbefw/sbeSpMsg.H
@@ -629,7 +629,7 @@ typedef struct
         o_threadCntMax = SMT4_THREAD_MAX;
 
         o_core = SMT4_CORE0_ID;
-        o_coreCntMax = SMT4_CORE_ID_MAX;
+        o_coreCntMax = SMT4_CORE_ID_LAST+1;
 
         if( SMT4_ALL_CORES != coreChipletId )
         {
@@ -703,7 +703,7 @@ typedef struct
                 &&( SBE_MAX_REG_ACCESS_REGS >= numRegs )
                 &&( SMT4_THREAD3 >= threadNr )
                 &&( SMT4_CORE0_ID <= coreChiplet )
-                &&( SMT4_CORE_ID_MAX >= coreChiplet )) ? true:false;
+                &&( SMT4_CORE_ID_LAST >= coreChiplet )) ? true:false;
     }
 }sbeRegAccessMsgHdr_t;
 
diff --git a/src/sbefw/sbe_sp_intf.H b/src/sbefw/sbe_sp_intf.H
index 08625277..a2d43994 100644
--- a/src/sbefw/sbe_sp_intf.H
+++ b/src/sbefw/sbe_sp_intf.H
@@ -325,7 +325,7 @@ enum sbeErrorMode
 enum sbeCoreChipletId
 {
     SMT4_CORE0_ID       = 0x20,
-    SMT4_CORE_ID_MAX    = 0x38,
+    SMT4_CORE_ID_LAST   = 0x37,
     SMT4_ALL_CORES      = 0xFF,
 };
 
@@ -384,12 +384,64 @@ typedef enum
 } sbeTargetTypes_t;
 
 /**
+ * @brief Pervasive Chiplet Id Enum
+ */
+enum sbePervChipletId
+{
+    PERV_CHIPLET = 0x01,
+};
+
+/**
+ * @brief Nest Chiplet Id Enum
+ */
+enum sbeNestChipletId
+{
+    NEST_ID_0       = 0x02,
+    NEST_ID_LAST    = 0x05,
+};
+
+/**
+ * @brief XBus Chiplet Id Enum
+ */
+enum sbeXBusChipletId
+{
+    XBUS_ID    = 0x06,
+};
+
+/**
+ * @brief MC Bist Chiplet Id Enum
+ */
+enum sbeMcbistChipletId
+{
+    MCBIST_ID_0     = 0x07,
+    MCBIST_ID_LAST  = 0x08,
+};
+
+/**
+ * @brief OBus Chiplet Id Enum
+ */
+enum sbeObusChipletId
+{
+    OBUS_ID_0       = 0x09,
+    OBUS_ID_LAST    = 0x0C,
+};
+
+/**
+ * @brief PCIe Chiplet Id Enum
+ */
+enum sbePcieChipletId
+{
+    PCIE_ID_0       = 0x0D,
+    PCIE_ID_LAST    = 0x0F,
+};
+
+/**
  * @brief Cache Chiplet Id Enum
  */
 enum sbeCacheChipletId
 {
     EQ_ID_0          = 0x10,
-    EQ_ID_MAX        = 0x06,
+    EQ_ID_LAST       = 0x15,
     EQ_ALL_CHIPLETS  = 0xFF,
 };
 
diff --git a/src/sbefw/sbefapiutil.C b/src/sbefw/sbefapiutil.C
index c2034595..6d976beb 100644
--- a/src/sbefw/sbefapiutil.C
+++ b/src/sbefw/sbefapiutil.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -33,36 +33,87 @@
 
 using namespace fapi2;
 
-bool sbeGetFapiTargetHandle(uint16_t i_targetType,
-                            uint16_t i_chipletId,
-                            fapi2::plat_target_handle_t &o_tgtHndl)
+fapi2::TargetType sbeGetFapiTargetType(const uint16_t i_sbeTargetType,
+        const uint16_t i_chipletId)
 {
-    bool l_rc = true;
-    switch(i_targetType)
+    TargetType l_fapiTargetType = TARGET_TYPE_NONE;
+    switch(i_sbeTargetType)
     {
         case TARGET_EX:
-            o_tgtHndl = plat_getTargetHandleByChipletNumber
-                            <fapi2::TARGET_TYPE_EX>(i_chipletId);
+            if((i_chipletId >= SMT4_CORE0_ID) &&
+                    (i_chipletId <= SMT4_CORE_ID_LAST))
+            {
+                l_fapiTargetType = fapi2::TARGET_TYPE_EX;
+            }
             break;
         case TARGET_PERV:
-            o_tgtHndl = plat_getTargetHandleByChipletNumber
-                            <fapi2::TARGET_TYPE_PERV>(i_chipletId);
-            break;
-        case TARGET_EQ:
-            o_tgtHndl = plat_getTargetHandleByChipletNumber
-                            <fapi2::TARGET_TYPE_EQ>(i_chipletId);
-            break;
-        case TARGET_CORE:
-            o_tgtHndl = plat_getTargetHandleByChipletNumber
-                            <fapi2::TARGET_TYPE_CORE>(i_chipletId);
+            if((i_chipletId >= EQ_ID_0) && (i_chipletId <= EQ_ID_LAST))
+            {
+                l_fapiTargetType = fapi2::TARGET_TYPE_EQ;
+            }
+            else if((i_chipletId >= SMT4_CORE0_ID) &&
+                    (i_chipletId <= SMT4_CORE_ID_LAST))
+            {
+                l_fapiTargetType = fapi2::TARGET_TYPE_CORE;
+            }
+            else
+            {
+                l_fapiTargetType = fapi2::TARGET_TYPE_PERV;
+            }
             break;
         case TARGET_PROC_CHIP:
-            o_tgtHndl = plat_getChipTarget().get();
-            break;
-        default:
-            l_rc = false;
+            l_fapiTargetType = fapi2::TARGET_TYPE_PROC_CHIP;
             break;
     }
+    return l_fapiTargetType;
+}
+
+bool sbeGetFapiTargetHandle(const uint16_t i_targetType,
+                            const uint16_t i_chipletId,
+                            fapi2::plat_target_handle_t &o_tgtHndl,
+                            const fapi2::TargetType i_fapiTargetMask)
+{
+    bool l_rc = true;
+
+    do
+    {
+        if(((i_targetType == TARGET_TYPE_CORE) &&
+            (i_chipletId == SMT4_ALL_CORES)) ||
+           ((i_targetType == TARGET_TYPE_EQ) &&
+            (i_chipletId == EQ_ALL_CHIPLETS)))
+        {
+            // It's a valid combination for all cores/all EQs
+            break;
+        }
+        fapi2::TargetType l_fapiTargetType = static_cast<TargetType>(
+                                 sbeGetFapiTargetType(i_targetType, i_chipletId)
+                                 & i_fapiTargetMask);
+        switch(l_fapiTargetType)
+        {
+            case fapi2::TARGET_TYPE_EX:
+                o_tgtHndl = plat_getTargetHandleByChipletNumber
+                                <fapi2::TARGET_TYPE_EX>(i_chipletId);
+                break;
+            case fapi2::TARGET_TYPE_PERV:
+                o_tgtHndl = plat_getTargetHandleByChipletNumber
+                                <fapi2::TARGET_TYPE_PERV>(i_chipletId);
+                break;
+            case fapi2::TARGET_TYPE_EQ:
+                o_tgtHndl = plat_getTargetHandleByChipletNumber
+                                <fapi2::TARGET_TYPE_EQ>(i_chipletId);
+                break;
+            case fapi2::TARGET_TYPE_CORE:
+                o_tgtHndl = plat_getTargetHandleByChipletNumber
+                                <fapi2::TARGET_TYPE_CORE>(i_chipletId);
+                break;
+            case fapi2::TARGET_TYPE_PROC_CHIP:
+                o_tgtHndl = plat_getChipTarget().get();
+                break;
+            default:
+                l_rc = false;
+                break;
+        }
+    } while(false);
     return l_rc;
 }
 
diff --git a/src/sbefw/sbefapiutil.H b/src/sbefw/sbefapiutil.H
index 4728807e..d8136107 100644
--- a/src/sbefw/sbefapiutil.H
+++ b/src/sbefw/sbefapiutil.H
@@ -5,7 +5,8 @@
 /*                                                                        */
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
@@ -37,18 +38,32 @@
 #include "fapi2.H"
 #include "plat_hw_access.H"
 
+/* @brief - Map SBE target Types to Fapi Target Types
+ *
+ * @param[in] - i_sbeTargetType     SBE target type
+ * @param[in] - i_chipletId         Chiplet Id
+ *
+ * @return    - fapi target type
+ */
+fapi2::TargetType sbeGetFapiTargetType(const uint16_t i_sbeTargetType,
+                const uint16_t i_chipletId);
+
 /*@brief - create fapi target handle for the target type
  *
  * @param[in] - i_taretType - sbe target type
  * @param[in] - i_chipletId - chiplet id
  * @param[out] - o_tgtHndl - fapi target handle
+ * @param[in] - i_fapiTargetMask - expected fapi targets, by default
+ *                            no masking
  *
  * @return - true - on success
  *           false - on failure
  */
-bool sbeGetFapiTargetHandle(uint16_t i_targetType,
-                            uint16_t i_chipletId,
-                            fapi2::plat_target_handle_t &o_tgtHndl);
+bool sbeGetFapiTargetHandle(const uint16_t i_targetType,
+                            const uint16_t i_chipletId,
+                            fapi2::plat_target_handle_t &o_tgtHndl,
+                            const fapi2::TargetType i_fapiTargetMask =
+                                                fapi2::TARGET_TYPE_ALL);
 
 /*@brief - Map sbe ring access modes to fapi ring access modes
  *