diff options
| author | spashabk-in <shakeebbk@in.ibm.com> | 2018-05-08 12:16:05 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-05-16 06:23:30 -0400 |
| commit | d73b8bc3e960795825e7ada1ec2700800fee1fba (patch) | |
| tree | 5488181f87e0b63c5c4015bfab1c020ba6b4cca7 /src/sbefw | |
| parent | e3dd8facc038086da5224f60d3bf3f57d82da8f6 (diff) | |
| download | talos-sbe-d73b8bc3e960795825e7ada1ec2700800fee1fba.tar.gz talos-sbe-d73b8bc3e960795825e7ada1ec2700800fee1fba.zip | |
Handle FSP failover
RTC: 184532
Change-Id: If55aa9f13c648178c1f054d7c9728fe888c0ed63
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58498
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/sbefw')
| -rw-r--r-- | src/sbefw/app/power/sbecmdmpipl.C | 12 | ||||
| -rw-r--r-- | src/sbefw/core/sberegaccess.C | 4 | ||||
| -rw-r--r-- | src/sbefw/core/sberegaccess.H | 6 |
3 files changed, 16 insertions, 6 deletions
diff --git a/src/sbefw/app/power/sbecmdmpipl.C b/src/sbefw/app/power/sbecmdmpipl.C index b12453eb..2951852f 100644 --- a/src/sbefw/app/power/sbecmdmpipl.C +++ b/src/sbefw/app/power/sbecmdmpipl.C @@ -230,15 +230,21 @@ uint32_t sbeContinueMpipl(uint8_t *i_pArg) rc = sbeUpFifoDeq_mult (len, NULL); CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(rc); - sbeRole sbeRole = SbeRegAccess::theSbeRegAccess().isSbeSlave() ? + // Refresh SBE role and proc chip mem attribute + // to handle failover of FSP and with it the switchover of + // master proc SBE + fapi2::plat_AttrInit(); + SbeRegAccess::theSbeRegAccess().init(true); + + g_sbeRole = SbeRegAccess::theSbeRegAccess().isSbeSlave() ? SBE_ROLE_SLAVE : SBE_ROLE_MASTER; - fapiRc = continueMpiplIstepsExecute(sbeRole); + fapiRc = continueMpiplIstepsExecute(g_sbeRole); bool checkstop = isSystemCheckstop(); if((fapiRc != FAPI2_RC_SUCCESS) || checkstop) { SBE_ERROR(SBE_FUNC "Failed in Continue Mpipl in ChipOp Mode, " - "SBE Role[%d]", sbeRole); + "SBE Role[%d]", g_sbeRole); if(checkstop) { respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE, diff --git a/src/sbefw/core/sberegaccess.C b/src/sbefw/core/sberegaccess.C index 1ac5deac..1fc415bc 100644 --- a/src/sbefw/core/sberegaccess.C +++ b/src/sbefw/core/sberegaccess.C @@ -131,7 +131,7 @@ void SbeRegAccess::stateTransition(const sbeEvent &i_event) #undef SBE_FUNC } -uint32_t SbeRegAccess::init() +uint32_t SbeRegAccess::init(bool forced) { #define SBE_FUNC "SbeRegAccess::SbeRegAccess " static bool l_initDone = false; @@ -139,7 +139,7 @@ uint32_t SbeRegAccess::init() do { - if(l_initDone) + if(l_initDone && !forced) { break; } diff --git a/src/sbefw/core/sberegaccess.H b/src/sbefw/core/sberegaccess.H index 62d07d41..b2d7e1d7 100644 --- a/src/sbefw/core/sberegaccess.H +++ b/src/sbefw/core/sberegaccess.H @@ -64,10 +64,14 @@ class SbeRegAccess /** * @brief Initializes the class for use * + * @param [in] forced Forcefully initialise reg access + * singleton. + * Default argument set to false. + * * @return An RC indicating success/failure * */ - uint32_t init(); + uint32_t init(bool forced=false); /** * @brief Update the SBE states into the SBE messaging register. The |
