summaryrefslogtreecommitdiffstats
path: root/src/sbefw
diff options
context:
space:
mode:
authorspashabk-in <shakeebbk@in.ibm.com>2018-03-15 05:08:08 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2018-03-19 09:15:33 -0400
commit9e30f641320742f97012a29456531cdd991eaba1 (patch)
tree0f8a96b7b9a53e35abe204215ac898a949d54306 /src/sbefw
parentda13fade1742d95eb1d4d8edc9cb03e9270e4947 (diff)
downloadtalos-sbe-9e30f641320742f97012a29456531cdd991eaba1.tar.gz
talos-sbe-9e30f641320742f97012a29456531cdd991eaba1.zip
Check for checkstop during mpipl
Implement check for system checkstop during MPIPL Change-Id: I220d5fc34406083002d3262acb140412739f3100 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55913 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/sbefw')
-rw-r--r--src/sbefw/app/power/sbecmdmpipl.C34
1 files changed, 26 insertions, 8 deletions
diff --git a/src/sbefw/app/power/sbecmdmpipl.C b/src/sbefw/app/power/sbecmdmpipl.C
index 23b6360f..47e76bcd 100644
--- a/src/sbefw/app/power/sbecmdmpipl.C
+++ b/src/sbefw/app/power/sbecmdmpipl.C
@@ -107,13 +107,22 @@ uint32_t sbeEnterMpipl(uint8_t *i_pArg)
do
{
l_fapiRc = sbeExecuteIstep(SBE_ISTEP_MPIPL_START, l_minor);
- if(l_fapiRc != FAPI2_RC_SUCCESS)
+ bool checkstop = isSystemCheckstop();
+ if((l_fapiRc != FAPI2_RC_SUCCESS) || checkstop)
{
SBE_ERROR(SBE_FUNC "Failed in Mpipl Start in ChipOp Mode "
"Minor: %d", l_minor);
- l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
- SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
- l_ffdc.setRc(l_fapiRc);
+ if(checkstop)
+ {
+ l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
+ SBE_SEC_SYSTEM_CHECKSTOP);
+ }
+ else
+ {
+ l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
+ SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
+ l_ffdc.setRc(l_fapiRc);
+ }
// reset attribute. We do not want to reset register, so do not
// use setMpIplMode
uint8_t isMpipl = 0;
@@ -186,13 +195,22 @@ uint32_t sbeContinueMpipl(uint8_t *i_pArg)
for(uint8_t l_minor = istep[1]; l_minor <= istep[2]; l_minor++)
{
l_fapiRc = sbeExecuteIstep(istep[0], l_minor);
- if(l_fapiRc != FAPI2_RC_SUCCESS)
+ bool checkstop = isSystemCheckstop();
+ if((l_fapiRc != FAPI2_RC_SUCCESS) || checkstop)
{
SBE_ERROR(SBE_FUNC "Failed in Mpipl continue in ChipOp "
"Mode Major [%d] Minor [%d]", istep[0], l_minor);
- l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
- SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
- l_ffdc.setRc(l_fapiRc);
+ if(checkstop)
+ {
+ l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
+ SBE_SEC_SYSTEM_CHECKSTOP);
+ }
+ else
+ {
+ l_respHdr.setStatus( SBE_PRI_GENERIC_EXECUTION_FAILURE,
+ SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
+ l_ffdc.setRc(l_fapiRc);
+ }
break;
}
}
OpenPOWER on IntegriCloud