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author | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-03-10 00:11:52 -0600 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-03-10 07:41:05 -0500 |
commit | 6ad2a6b38020c6ace59163c9fc3f13fe6bf9898a (patch) | |
tree | 0bf70ecf8a4893275a742996cc8a3344704325b7 /src/sbefw | |
parent | 26a0e30926af7002858e8f68a8d395b987db8cae (diff) | |
download | talos-sbe-6ad2a6b38020c6ace59163c9fc3f13fe6bf9898a.tar.gz talos-sbe-6ad2a6b38020c6ace59163c9fc3f13fe6bf9898a.zip |
Use new design for FFDC in SRAM operations
CQ: SW382991
Change-Id: I2c88f81a8beb2fb13231a0d8827d78f42386ece8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37780
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/sbefw')
-rw-r--r-- | src/sbefw/sbeSpMsg.H | 36 | ||||
-rw-r--r-- | src/sbefw/sbecmdsram.C | 90 |
2 files changed, 15 insertions, 111 deletions
diff --git a/src/sbefw/sbeSpMsg.H b/src/sbefw/sbeSpMsg.H index 0e695dd5..c711c223 100644 --- a/src/sbefw/sbeSpMsg.H +++ b/src/sbefw/sbeSpMsg.H @@ -105,42 +105,6 @@ typedef struct }sbeRespGenHdr_t; /** - * @brief structure for generic Resp header with Len for fifo response. - * - */ -typedef struct -{ - uint32_t respLen; - sbeRespGenHdr_t respHdr; - - /** - * @brief set response length - * - * @param[in] i_len Length - * - * @return - */ - void setLength( const uint32_t i_len ) - { - respLen = i_len; - } - - /** - * @brief set initial values for response header - * - * @note We did not set this in constructor as based on use case - * it is possible that g_sbeCmdHdr does not have proper - * values at time of object creation. - * - */ - void init() - { - respHdr.init(); - } -}sbeRespGenHdrWithLen_t; - - -/** * @brief structure for ffdc header for fifo response. * */ diff --git a/src/sbefw/sbecmdsram.C b/src/sbefw/sbecmdsram.C index 97d502a6..416dd1fc 100644 --- a/src/sbefw/sbecmdsram.C +++ b/src/sbefw/sbecmdsram.C @@ -68,7 +68,7 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) ReturnCode l_fapiRc = FAPI2_RC_SUCCESS; - sbeRespGenHdrWithLen_t l_respHdr; + sbeRespGenHdr_t l_respHdr; l_respHdr.init(); sbeResponseFfdc_t l_ffdc; @@ -90,13 +90,8 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) (uint32_t *)&l_req, i_isGetFlag); - // If FIFO failure - if (SBE_SEC_OPERATION_SUCCESSFUL != l_rc) - { - // Let command processor routine to handle the RC. - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); SBE_INFO("mode [0x%08X] addr[0x%08X] len[0x%08X]", (uint32_t)l_req.mode, (uint32_t)l_req.addr, @@ -135,13 +130,10 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) default: SBE_ERROR(SBE_FUNC "Invalid Mode Passed by User"); l_rc = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION; - l_respHdr.respHdr.setStatus( SBE_PRI_INVALID_DATA, l_rc); + l_respHdr.setStatus( SBE_PRI_INVALID_DATA, l_rc); break; } - if (SBE_SEC_OPERATION_SUCCESSFUL != l_rc) - { - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); // Setup Needs to be called in Normal and Debug Mode only if( (l_req.mode == NORMAL_MODE) || (l_req.mode == DEBUG_MODE) ) @@ -156,7 +148,7 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) l_chan, l_req.addr); // Respond with HWP FFDC - l_respHdr.respHdr.setStatus(SBE_PRI_GENERIC_EXECUTION_FAILURE, + l_respHdr.setStatus(SBE_PRI_GENERIC_EXECUTION_FAILURE, SBE_SEC_GENERIC_FAILURE_IN_EXECUTION); l_ffdc.setRc(l_fapiRc); break; @@ -189,12 +181,7 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) l_rc = sbeUpFifoDeq_mult ( l_len2dequeue, l_getBuf, false); - // If there was an underlying FIFO operation failure - if (SBE_SEC_OPERATION_SUCCESSFUL != l_rc) - { - // Let command processor routine to handle the RC. - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); } // Don't need to put any check for Linear/Circular - It's the same @@ -217,7 +204,7 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) l_chan, l_req.addr, (l_lenPassedToHwp/SBE_64BIT_ALIGN_FACTOR)); // Respond with HWP FFDC - l_respHdr.respHdr.setStatus(SBE_PRI_GENERIC_EXECUTION_FAILURE, + l_respHdr.setStatus(SBE_PRI_GENERIC_EXECUTION_FAILURE, SBE_SEC_GENERIC_FAILURE_IN_EXECUTION); l_ffdc.setRc(l_fapiRc); break; @@ -233,22 +220,14 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) l_len2dequeue = (l_lenPassedToHwp/SBE_32BIT_ALIGN_FACTOR); // Push this into the downstream FIFO l_rc = sbeDownFifoEnq_mult (l_len2dequeue, l_getBuf); + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); - // If FIFO failure - if (SBE_SEC_OPERATION_SUCCESSFUL != l_rc) - { - // Let command processor routine to handle the RC. - break; - } } } // End of while Put/Get from Hwp // If there was a FIFO error, will skip sending the response, // instead give the control back to the command processor thread - if ( SBE_SEC_OPERATION_SUCCESSFUL != l_rc ) - { - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); do { @@ -261,62 +240,23 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) { l_rc = sbeUpFifoDeq_mult(l_len2dequeue, NULL, true, true); - if ( SBE_SEC_OPERATION_SUCCESSFUL != l_rc ) - { - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); } // For other success paths, just attempt to offload // the next entry, which is supposed to be the EOT entry else { l_rc = sbeUpFifoDeq_mult(l_len2dequeue, NULL, true); - if ( SBE_SEC_OPERATION_SUCCESSFUL != l_rc ) - { - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); } } - // Distance to Header is minus the length field in the response - // buffer. So when we do sizeof(l_respHdr) It will add an extra byte - // for the length. So it compensates for the length, if we start the - // distance from hdr as zero. - uint32_t l_dist2Hdr = 0; - - // Now enqueue the minimum response header + uint32_t l_len = 1; // first enqueue the length of data actually written - l_respHdr.setLength(l_totalReturnLen); - uint32_t l_len = sizeof(l_respHdr) / sizeof(uint32_t); - l_rc = sbeDownFifoEnq_mult(l_len, (uint32_t *)(&l_respHdr)); - - if ( SBE_SEC_OPERATION_SUCCESSFUL != l_rc ) - { - break; - } - - l_dist2Hdr += l_len; - - // Enqueue FFDC data if there is one - if( l_ffdc.getRc() ) - { - l_len = sizeof(l_ffdc) / sizeof(uint32_t); - l_rc = sbeDownFifoEnq_mult (l_len, (uint32_t *)(&l_ffdc)); - if ( SBE_SEC_OPERATION_SUCCESSFUL != l_rc ) - { - break; - } + l_rc = sbeDownFifoEnq_mult(l_len, (uint32_t *)(&l_totalReturnLen)); - l_dist2Hdr += l_len; - } - - l_len = sizeof(l_dist2Hdr) / sizeof(uint32_t); - l_rc = sbeDownFifoEnq_mult ( l_len, &l_dist2Hdr); - - if ( SBE_SEC_OPERATION_SUCCESSFUL != l_rc ) - { - break; - } + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); + l_rc = sbeDsSendRespHdr( l_respHdr, &l_ffdc); }while(0); }while(0); |