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authorSachin Gupta <sgupta2m@in.ibm.com>2016-09-16 04:42:19 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-09-16 07:08:30 -0400
commitece97c0ee59eba8efa66aafe782b4a07c0de566a (patch)
tree9917e9ce99962fe7df35cef5ae1cd8e7d4c3bebc /src/import
parentc731ca00c7494aa48c8eed36179561c36d19220c (diff)
downloadtalos-sbe-ece97c0ee59eba8efa66aafe782b4a07c0de566a.tar.gz
talos-sbe-ece97c0ee59eba8efa66aafe782b4a07c0de566a.zip
Update file headers
Change-Id: Icdd7460d8e3213f9bbd3d52e7825242bc59fc9e9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29825 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/common/include/p9_const_common.H2
-rw-r--r--src/import/chips/p9/common/include/p9_mc_scom_addresses.H2
-rw-r--r--src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H2
-rw-r--r--src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_misc_scom_addresses.H2
-rw-r--r--src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_misc_scom_addresses_fld.H2
-rw-r--r--src/import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_obus_scom_addresses.H2
-rw-r--r--src/import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_obus_scom_addresses_fld.H2
-rw-r--r--src/import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_perv_scom_addresses.H2
-rw-r--r--src/import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_perv_scom_addresses_fld.H2
-rw-r--r--src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_quad_scom_addresses.H2
-rw-r--r--src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_quad_scom_addresses_fld.H2
-rw-r--r--src/import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_scom_template_consts.H2
-rw-r--r--src/import/chips/p9/common/include/p9_xbus_scom_addresses.H2
-rw-r--r--src/import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H2
-rw-r--r--src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H2
-rw-r--r--src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_thread_control.C2
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/core/p9_thread_control.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/nestfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H2
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C2
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C2
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-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/pervfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/pmfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/algorithm2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/iterator2
-rwxr-xr-xsrc/import/chips/p9/procedures/ppe/include/std/new2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/type_traits2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H2
-rw-r--r--src/import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/kernel/Makefile2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/Makefile2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/eabi.c2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/endian.h2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/math.c2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/std/Makefile2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/trace/Makefile2
-rw-r--r--src/import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/core_attributes.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml2
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml2
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml2
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml2
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml2
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml2
-rw-r--r--src/import/chips/p9/utils/Makefile2
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.H2
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ring_id.h2
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_scan_compression.H2
-rw-r--r--src/import/chips/p9/utils/p9_putRingUtils.H2
-rw-r--r--src/import/chips/p9/utils/p9_putRingUtils.mk2
-rw-r--r--src/import/chips/p9/utils/utils.mk2
-rw-r--r--src/import/chips/p9/xip/Makefile2
-rw-r--r--src/import/chips/p9/xip/p9_xip_image.c2
-rw-r--r--src/import/chips/p9/xip/p9_xip_image.h2
-rw-r--r--src/import/hwpf/fapi2/include/buffer.H2
-rw-r--r--src/import/hwpf/fapi2/include/buffer_parameters.H2
-rw-r--r--src/import/hwpf/fapi2/include/buffer_traits.H2
-rw-r--r--src/import/hwpf/fapi2/include/error_info.H2
-rw-r--r--src/import/hwpf/fapi2/include/error_scope.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_attribute_service.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_error_scope.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_hw_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_hwp_executor.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_multicast.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_multicast_defs.H2
-rw-r--r--src/import/hwpf/fapi2/include/fapi2_vpd_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/hw_access_def.H2
-rw-r--r--src/import/hwpf/fapi2/include/mvpd_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/mvpd_access_defs.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/hw_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/plat_error_scope.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/plat_hw_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/plat_target.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/plat_trace.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/plat_vpd_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/target.H2
-rw-r--r--src/import/hwpf/fapi2/include/plat/vpd_access.H2
-rw-r--r--src/import/hwpf/fapi2/include/return_code_defs.H2
-rw-r--r--src/import/hwpf/fapi2/include/target_states.H2
-rw-r--r--src/import/hwpf/fapi2/include/target_types.H2
-rw-r--r--src/import/hwpf/fapi2/include/variable_buffer.H2
-rw-r--r--src/import/hwpf/fapi2/include/variable_buffer_utils.H2
-rw-r--r--src/import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml2
-rw-r--r--src/import/tools/imageProcs/fapi_sbe_common.H2
325 files changed, 325 insertions, 325 deletions
diff --git a/src/import/chips/p9/common/include/p9_const_common.H b/src/import/chips/p9/common/include/p9_const_common.H
index e71d288b..a70bb089 100644
--- a/src/import/chips/p9/common/include/p9_const_common.H
+++ b/src/import/chips/p9/common/include/p9_const_common.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_const_common.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_const_common.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses.H
index e9c23ad4..c2d9020f 100644
--- a/src/import/chips/p9/common/include/p9_mc_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_mc_scom_addresses.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_mc_scom_addresses.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H
index e1a0b264..83009706 100644
--- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H
index 23a86b17..5a531ee0 100644
--- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H
+++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_mc_scom_addresses_fld.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H
index 0c27c47f..e2a91e3c 100644
--- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H
+++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses.H
index c387ea06..89806796 100644
--- a/src/import/chips/p9/common/include/p9_misc_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_misc_scom_addresses.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_misc_scom_addresses.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H
index 3cf40bed..5e5003f7 100644
--- a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld.H
index cf048f33..59907281 100644
--- a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld.H
+++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_misc_scom_addresses_fld.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_misc_scom_addresses_fld.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H
index b62d9d92..34273b2d 100644
--- a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H
+++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_misc_scom_addresses_fld_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_obus_scom_addresses.H b/src/import/chips/p9/common/include/p9_obus_scom_addresses.H
index 48ac3c2c..45e31c49 100644
--- a/src/import/chips/p9/common/include/p9_obus_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_obus_scom_addresses.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_obus_scom_addresses.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_obus_scom_addresses.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H
index dd9766f0..1cadbddf 100644
--- a/src/import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_obus_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld.H
index 722b1970..cc4f4940 100644
--- a/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld.H
+++ b/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_obus_scom_addresses_fld.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_obus_scom_addresses_fld.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H
index 41b4ad89..92252694 100644
--- a/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H
+++ b/src/import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_obus_scom_addresses_fld_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_perv_scom_addresses.H b/src/import/chips/p9/common/include/p9_perv_scom_addresses.H
index d418ad7c..b01344a2 100644
--- a/src/import/chips/p9/common/include/p9_perv_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_perv_scom_addresses.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_perv_scom_addresses.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_perv_scom_addresses.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H
index f835e4d8..4e7af7a1 100644
--- a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_perv_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld.H
index 78b6cf8d..7ecb0c94 100644
--- a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld.H
+++ b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_perv_scom_addresses_fld.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_perv_scom_addresses_fld.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H
index 5baf3510..01cc0b47 100644
--- a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H
+++ b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_quad_scom_addresses.H b/src/import/chips/p9/common/include/p9_quad_scom_addresses.H
index 878f0e6b..17215825 100644
--- a/src/import/chips/p9/common/include/p9_quad_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_quad_scom_addresses.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_quad_scom_addresses.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_quad_scom_addresses.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H
index 5e132947..51463a2f 100644
--- a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld.H
index 80fc95e8..d299f20f 100644
--- a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld.H
+++ b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_quad_scom_addresses_fld.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_quad_scom_addresses_fld.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H
index d6383558..8c8fc4a7 100644
--- a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H
+++ b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_quad_scom_addresses_fld_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_scom_template_consts.H b/src/import/chips/p9/common/include/p9_scom_template_consts.H
index e4e8e654..0c7d6a5c 100644
--- a/src/import/chips/p9/common/include/p9_scom_template_consts.H
+++ b/src/import/chips/p9/common/include/p9_scom_template_consts.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_scom_template_consts.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_scom_template_consts.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_xbus_scom_addresses.H b/src/import/chips/p9/common/include/p9_xbus_scom_addresses.H
index 14edd5be..ec9bf941 100644
--- a/src/import/chips/p9/common/include/p9_xbus_scom_addresses.H
+++ b/src/import/chips/p9/common/include/p9_xbus_scom_addresses.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_xbus_scom_addresses.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_xbus_scom_addresses.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H
index 8c7cc415..625214c5 100644
--- a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H
+++ b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_xbus_scom_addresses_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H
index df6fab4f..3b07d3c5 100644
--- a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H
+++ b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H
index 8d352fb9..2f97b13b 100644
--- a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H
+++ b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H $ */
+/* $Source: src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld_fixes.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/Makefile b/src/import/chips/p9/procedures/hwp/cache/Makefile
index a95923ab..475de65e 100644
--- a/src/import/chips/p9/procedures/hwp/cache/Makefile
+++ b/src/import/chips/p9/procedures/hwp/cache/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/cache/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/cache/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk b/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
index f8ae915e..135972bc 100644
--- a/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
index d73007e7..e6f4bdf8 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
index 3b2887c4..683d89ea 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
index 16b97e5b..42eeaa5d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
index 2978337b..f31deedf 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
index 7b55f9ee..82172678 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
index 0cf09244..0ce09b0d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
index 2033f38f..051db751 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
index 8f35b4ed..eeee6c65 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
index 1582c76d..da60602a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
index 64b30d93..7467ee53 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
index 3c48f52a..20a28f27 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
index 0da2ea3b..5674c532 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
index 4a2e620f..f109e02f 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
index 714395cf..d42f1927 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
index 1754c690..08a5b2b7 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
index d0e592a4..198a7034 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
index 24c329f8..233342f6 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
index c5193803..e6130a8a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
index 656616f4..4191244a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
index 5398597e..19116807 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
index 394fb6f6..ccdd3c50 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
index b34ae956..85690d8b 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
index 3712cafb..bc3b1153 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
index 96ce825d..6b8656ff 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
index cc3e8884..08380f50 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
index 38ee4977..8af66306 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
index ded02249..26029adc 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
index a7bc1510..fa20765a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
index d0ad61d6..c5ffc609 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/Makefile b/src/import/chips/p9/procedures/hwp/core/Makefile
index 15ace37d..0ef85918 100644
--- a/src/import/chips/p9/procedures/hwp/core/Makefile
+++ b/src/import/chips/p9/procedures/hwp/core/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/core/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/core/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk b/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk
index b7c2abcc..69b681fb 100644
--- a/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/core/corehcdfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H
index 1c766fb3..c3310789 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C
index 0706e244..6145ad1a 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H
index dde880ee..cc8daf0b 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C
index 9007a7f8..d954b97d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H
index c86b128c..00896101 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H
index 9db24521..e2f2d206 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C
index fa147a3d..38645d6b 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H
index 22c88c3f..e162d0e2 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C
index 86e72aac..8dac9915 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H
index accbf0ea..ca278ec2 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C
index 9211d7fc..cfe8fe40 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H
index 7dad1c6e..c6f77b9f 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C
index 729f98b7..7e83c95f 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H
index f3bfad93..aa6c6c1d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C
index 5e66f673..5dda8e1d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H
index 91b73cf9..8528c491 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C
index 6ad7100f..fe760e5c 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H
index 511b35c4..65657c1d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C
index b8f6be7e..ec8f73db 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H
index a998c4bd..bd510b03 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
index 54ed6dd5..8c199de8 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
index f69ce528..79a74c7f 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H
index 7065028e..9e6434b4 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
index 3cccb8b5..d7bf6491 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H
index 75e94909..514d52e4 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C
index fb6affa0..20cdcf05 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
index d143fd43..e82ba9b0 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
index 529fd829..742244d5 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_thread_control.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_thread_control.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H
index 14821a5c..6c39f07e 100755
--- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_thread_control.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_thread_control.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/Makefile b/src/import/chips/p9/procedures/hwp/initfiles/Makefile
index 123518a1..74b45b29 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/Makefile
+++ b/src/import/chips/p9/procedures/hwp/initfiles/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/initfiles/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/initfiles/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
index e85d8585..ded26be9 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H
index 69653c03..d2035ba6 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
index 1186e9d2..7932704d 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H
index 8f8edb08..aafa364a 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
index 950a088d..edb49b29 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H
index bc56a154..44097255 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/Makefile b/src/import/chips/p9/procedures/hwp/lib/Makefile
index 059fb2f3..6bff4cf0 100644
--- a/src/import/chips/p9/procedures/hwp/lib/Makefile
+++ b/src/import/chips/p9/procedures/hwp/lib/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/lib/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/lib/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk b/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk
index cbcd12ee..e20c8579 100644
--- a/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/lib/libcommonfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H b/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
index 9bb01bce..6d529928 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C
index 05cd69e7..6cff40fd 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H
index f119bfaf..cbfc130c 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
index d09b7014..bed34658 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_hcd_common.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H b/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H
index 38e94226..2b818254 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/Makefile b/src/import/chips/p9/procedures/hwp/nest/Makefile
index 8c4adc0b..24976437 100644
--- a/src/import/chips/p9/procedures/hwp/nest/Makefile
+++ b/src/import/chips/p9/procedures/hwp/nest/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/nest/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/nest/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk b/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk
index b3ddbdff..847d6015 100644
--- a/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/nest/nestfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/nest/nestfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
index 360c5837..f7d41003 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_access.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
index 0b8e1a15..b2ac9083 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_access.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
index 7782cae2..d0ea4eb5 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
index 667e3f6b..69b66c39 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H
index d0449e0d..aed13132 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_constants.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
index e270772a..9c58a9e9 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
index ffdd38b0..93be5415 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
index 4c9e3a12..ccb4ad17 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
index af73102e..ebf633ed 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C
index 5a3970b3..04b5d939 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_access.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
index 7e02c926..14cc914d 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_access.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
index c4f32d8c..6a91e66a 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H
index e4be1c65..049d19e2 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H
index f7914672..ee9b62e5 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_constants.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
index 96ce4025..f0c9e9ec 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C
index 840ad79b..c972d47d 100755
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H
index ee1acf4a..f0b2ecd7 100755
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
index 0fd5b531..5a6f430f 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
index 10380058..b1521ec3 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
index e5536789..fced2b1e 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
index 1fe5dc4f..33bd345d 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H
index d3017dcf..fad6629b 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
index a2510582..3bf2b451 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H
index 4129098e..a1a87168 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/Makefile b/src/import/chips/p9/procedures/hwp/perv/Makefile
index ac2ee6de..800ff640 100644
--- a/src/import/chips/p9/procedures/hwp/perv/Makefile
+++ b/src/import/chips/p9/procedures/hwp/perv/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/perv/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/perv/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C
index e850723f..e36da6b9 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H
index c6a0c6f2..fa51e213 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
index 364d4013..3c90b0b8 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
index b2472eb3..b323585d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
index d11fe6bf..f0ad26d0 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_ram_core.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H
index 46f0eaf7..2396fb31 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_ram_core.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C
index 79046f0e..04f9c0da 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H
index 9fc72c1b..cb3a1d88 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H
index 0a5e2a09..c2dd153c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C
index 1cd61c93..2a9a8a06 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H
index 88c3bf21..3bcd3b4d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
index 4d28bdbd..150c24cb 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
index 575536d9..fb26843c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C
index 521078bd..c832801c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H
index 72d20577..a324b0c8 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
index a36fa629..3db37dcd 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H
index a45218b9..f90f6a3f 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H
index c2b1caad..c40021e1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
index feeec54b..c3b1a66b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C
index 3a8a765c..d415f2d1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H
index 180d8c66..82e4cc6a 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
index c9586829..46e9a4b6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_common.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H
index f3876594..fbc93fe3 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_common.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C
index d9a3f2d5..d35e527b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H
index 00a5ebc6..5294e80c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C
index 25d61ad0..0d198208 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H
index 845b68e9..a6a96665 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
index ce8302a9..418110e1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H
index 5a048f1d..c748c5bc 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C
index ff4bde17..0e5f382e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H
index da24195e..3760525a 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
index 00e00d24..0e043e35 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H
index c1f186bd..0af47dbc 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
index 25336c49..0de94fff 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
index eabe73f1..97d12b48 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C
index 63bbe75e..80f3a927 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H
index 6c7b2dfb..0bd3fd00 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
index 434e0137..480aa82d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H
index 90a8321e..f64538c5 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
index d0737f78..a31883b1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
index efc40a97..39ca81a2 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
index 79e0c0e3..be1970de 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H
index 025d2377..c90ef370 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H
index b05c7db1..6a883373 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
index 9dc91da6..f8097428 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H
index b5dbbe99..a78d6cc4 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
index af7c2299..e31112e6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H
index 3c40e9aa..77bfa417 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C
index 420680f7..7eb2651d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H
index c41909ae..b2cc08ec 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C
index e7797e75..d6b3aa50 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H
index a1ab2263..3faf0e0c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
index f55ae68d..b1d932ac 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H
index a9e777f6..1de5a90e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C
index 151aa89d..c46ea5b4 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H
index 9ab5e359..86338ebc 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C
index c953c3cf..ef983fe5 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H
index 39383792..7fe37b03 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C
index 69c6f6c3..7d68238c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H
index 34d94425..2569181c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
index c7af39d3..aace2054 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H
index c5367d97..19370c96 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C
index f7960207..26c24bad 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H
index 441a7a6e..9a120e14 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C
index b8c22322..35965324 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H
index c18e9a7f..908bf804 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
index 42957145..7bc7575e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H
index 2b99ade3..898a76fd 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C
index 2c351d74..1950b315 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H
index 27ba211c..c682763b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C
index f1150966..9d438a23 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H
index abf1f54c..641ad767 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C
index 7c933122..94c16f0e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H
index e458d2be..50599fa5 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
index 53aed3bb..f5c2319b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H
index 134fc853..f525bbf7 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
index a53d025f..7a546a23 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk b/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk
index d4b77bb7..70d989d0 100644
--- a/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/perv/pervfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/perv/pervfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/pm/Makefile b/src/import/chips/p9/procedures/hwp/pm/Makefile
index 65f3170a..f8c3cdd8 100644
--- a/src/import/chips/p9/procedures/hwp/pm/Makefile
+++ b/src/import/chips/p9/procedures/hwp/pm/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/pm/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/pm/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
index fce9dea9..5a2a7daa 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
index f4aaaf44..ec18455e 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm.H
index d14c021a..536e9f34 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C
index c88407cd..1ef50413 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H
index e5b548fb..f1268381 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C
index ef7f0138..c6bd0ac2 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H
index a366bbd8..27a53ff2 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C
index 292659cb..36c814d6 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H
index 27adcc48..aa4299ff 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
index 1130fcaa..2075fcdb 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C
index 4809d65e..87b0b88c 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
index 3524991e..101c3d8e 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk b/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk
index e34a62c4..2c29c90b 100644
--- a/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/pm/pmfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/pm/pmfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/include/std/algorithm b/src/import/chips/p9/procedures/ppe/include/std/algorithm
index 6e96dd96..8e09dda3 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/algorithm
+++ b/src/import/chips/p9/procedures/ppe/include/std/algorithm
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/algorithm $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/algorithm $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/iterator b/src/import/chips/p9/procedures/ppe/include/std/iterator
index 45e0386e..8a5d47a4 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/iterator
+++ b/src/import/chips/p9/procedures/ppe/include/std/iterator
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/iterator $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/iterator $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/new b/src/import/chips/p9/procedures/ppe/include/std/new
index 4d323cf7..c01ed930 100755
--- a/src/import/chips/p9/procedures/ppe/include/std/new
+++ b/src/import/chips/p9/procedures/ppe/include/std/new
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/new $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/new $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/type_traits b/src/import/chips/p9/procedures/ppe/include/std/type_traits
index 1d2e3f0a..c493e400 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/type_traits
+++ b/src/import/chips/p9/procedures/ppe/include/std/type_traits
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/type_traits $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/type_traits $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h b/src/import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h
index 6b2794f5..37e75505 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/impl/iterator.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H b/src/import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H
index 1bb0e10e..64a78127 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/impl/qsort.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H b/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H
index f289ea5d..b63f806a 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/traits/has_lessthan.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H b/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H
index 5d8778c9..7d4b925a 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/traits/has_minus.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H b/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H
index a26d34ae..4001ca0b 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/traits/has_plusequals.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H b/src/import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H
index 07ea589a..17585972 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/traits/impl/has_comparison.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H b/src/import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H
index b447ff83..5f7f06f2 100644
--- a/src/import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H
+++ b/src/import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H $ */
+/* $Source: src/import/chips/p9/procedures/ppe/include/std/util/traits/remove_const.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/kernel/Makefile b/src/import/chips/p9/procedures/ppe/pk/kernel/Makefile
index 9494348f..5f912a65 100644
--- a/src/import/chips/p9/procedures/ppe/pk/kernel/Makefile
+++ b/src/import/chips/p9/procedures/ppe/pk/kernel/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/kernel/Makefile $
+# $Source: src/import/chips/p9/procedures/ppe/pk/kernel/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk b/src/import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk
index 58c758e0..e92d8ce2 100644
--- a/src/import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk
+++ b/src/import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk $
+# $Source: src/import/chips/p9/procedures/ppe/pk/kernel/pkkernelfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/Makefile b/src/import/chips/p9/procedures/ppe/pk/ppe42/Makefile
index 60f8d7f8..98c8b1e7 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/Makefile
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/ppe42/Makefile $
+# $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/eabi.c b/src/import/chips/p9/procedures/ppe/pk/ppe42/eabi.c
index 140cc2be..93838a32 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/eabi.c
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/eabi.c
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/eabi.c $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/eabi.c $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/endian.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/endian.h
index dade05cf..a945c677 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/endian.h
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/endian.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/endian.h $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/endian.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c b/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c
index 1cddc624..a860b92e 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/math.c $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/math.c $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h
index 0e079657..0ca6ad28 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c
index 4f0e954c..87ec52ca 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.c $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h
index dfa79c26..65fd3db7 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_string.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h
index e4f98cdd..c1277e4f 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h $ */
+/* $Source: src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/ppe/pk/std/Makefile b/src/import/chips/p9/procedures/ppe/pk/std/Makefile
index 7d4613ed..a15cbed5 100644
--- a/src/import/chips/p9/procedures/ppe/pk/std/Makefile
+++ b/src/import/chips/p9/procedures/ppe/pk/std/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/std/Makefile $
+# $Source: src/import/chips/p9/procedures/ppe/pk/std/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk b/src/import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk
index 71b8521f..074f8b96 100644
--- a/src/import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk
+++ b/src/import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk $
+# $Source: src/import/chips/p9/procedures/ppe/pk/std/pkstdfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/pk/trace/Makefile b/src/import/chips/p9/procedures/ppe/pk/trace/Makefile
index 846076a9..d1072d47 100644
--- a/src/import/chips/p9/procedures/ppe/pk/trace/Makefile
+++ b/src/import/chips/p9/procedures/ppe/pk/trace/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/trace/Makefile $
+# $Source: src/import/chips/p9/procedures/ppe/pk/trace/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk b/src/import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk
index 4e8ffa57..97920ef1 100644
--- a/src/import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk
+++ b/src/import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk $
+# $Source: src/import/chips/p9/procedures/ppe/pk/trace/pktracefiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 724a5c97..208742af 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/core_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/core_attributes.xml
index 11c98683..95cd6a0c 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/core_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/core_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/attribute_info/core_attributes.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/core_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index c3bd81b8..70df0df4 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml
index 9caa1a92..a4158c6d 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/p9_cache_contained_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml
index 7330b468..c593b80a 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index 164c5ce9..27661cf4 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk b/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk
index 790cdd44..f4476e40 100644
--- a/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk
+++ b/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/xml/error_info/hwpErrors.mk $
+# $Source: src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml
index 7915500c..33fbfc40 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml
index e3c1b5e1..ccc66af4 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml
index b87937af..4098fffa 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml
index aeaa5873..9c1c1af3 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml
index ff244a07..789757c4 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml
index fe5c5833..9790d7ce 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml
index d82615d6..337ab26b 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml
index dd8464d3..373ea617 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml
index c7007a72..f11df8b4 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml
index 36ed53f6..acb78105 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml
index 4d92902c..726a7092 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml
index 0e8763ca..2746fd83 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_arrayinit_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
index 228ddea7..f7938886 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml
index 4d7ca4ec..1e7242c9 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml
index 6521c6e5..75a9c3b9 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml
index de377e1c..04d7f05e 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml
index 6ccb7fff..1dfe8271 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml
index a4cf028d..cd68f2f4 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml
index a1260b90..f72b663d 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
index e3e46eeb..5b27a2e1 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml
index 3e011755..b12dc9e1 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml
index 7b5d51d1..4b2557c2 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml
index ee2b5059..83aeeda9 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml
index a45c8f56..6a35384f 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml
index 97226c2d..b2aad866 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml
index 8bff680f..95723958 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml
index 6a5e2cb5..b423008d 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml
index a8e23e1d..fc8e0949 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_arrayinit_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml
index 9249bda2..c4ad70fe 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml
index f1f33966..f70d2788 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml
index 715538a4..f45644b5 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/chips/p9/utils/Makefile b/src/import/chips/p9/utils/Makefile
index 07432cd1..a9410463 100644
--- a/src/import/chips/p9/utils/Makefile
+++ b/src/import/chips/p9/utils/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/utils/Makefile $
+# $Source: src/import/chips/p9/utils/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index f39b29d4..67bf9b02 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/utils/imageProcs/p9_ringId.H $ */
+/* $Source: src/import/chips/p9/utils/imageProcs/p9_ringId.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
index 55f9ad75..0717aaeb 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/utils/imageProcs/p9_ring_id.h $ */
+/* $Source: src/import/chips/p9/utils/imageProcs/p9_ring_id.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
index d20c2f04..3a4a7848 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/utils/imageProcs/p9_scan_compression.H $ */
+/* $Source: src/import/chips/p9/utils/imageProcs/p9_scan_compression.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/utils/p9_putRingUtils.H b/src/import/chips/p9/utils/p9_putRingUtils.H
index 2eee9c00..865a9962 100644
--- a/src/import/chips/p9/utils/p9_putRingUtils.H
+++ b/src/import/chips/p9/utils/p9_putRingUtils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/utils/p9_putRingUtils.H $ */
+/* $Source: src/import/chips/p9/utils/p9_putRingUtils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/utils/p9_putRingUtils.mk b/src/import/chips/p9/utils/p9_putRingUtils.mk
index d0490344..247976c2 100644
--- a/src/import/chips/p9/utils/p9_putRingUtils.mk
+++ b/src/import/chips/p9/utils/p9_putRingUtils.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/utils/p9_putRingUtils.mk $
+# $Source: src/import/chips/p9/utils/p9_putRingUtils.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/utils/utils.mk b/src/import/chips/p9/utils/utils.mk
index 03c22ba7..2b5e1259 100644
--- a/src/import/chips/p9/utils/utils.mk
+++ b/src/import/chips/p9/utils/utils.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/utils/utils.mk $
+# $Source: src/import/chips/p9/utils/utils.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/xip/Makefile b/src/import/chips/p9/xip/Makefile
index b97ffc15..a337e063 100644
--- a/src/import/chips/p9/xip/Makefile
+++ b/src/import/chips/p9/xip/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/xip/Makefile $
+# $Source: src/import/chips/p9/xip/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/xip/p9_xip_image.c b/src/import/chips/p9/xip/p9_xip_image.c
index 0f9ce1f7..18621811 100644
--- a/src/import/chips/p9/xip/p9_xip_image.c
+++ b/src/import/chips/p9/xip/p9_xip_image.c
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/xip/p9_xip_image.c $ */
+/* $Source: src/import/chips/p9/xip/p9_xip_image.c $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/xip/p9_xip_image.h b/src/import/chips/p9/xip/p9_xip_image.h
index 09bc1aa5..06240326 100644
--- a/src/import/chips/p9/xip/p9_xip_image.h
+++ b/src/import/chips/p9/xip/p9_xip_image.h
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/xip/p9_xip_image.h $ */
+/* $Source: src/import/chips/p9/xip/p9_xip_image.h $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/buffer.H b/src/import/hwpf/fapi2/include/buffer.H
index 7661a9cd..8ee35cbd 100644
--- a/src/import/hwpf/fapi2/include/buffer.H
+++ b/src/import/hwpf/fapi2/include/buffer.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/buffer.H $ */
+/* $Source: src/import/hwpf/fapi2/include/buffer.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/buffer_parameters.H b/src/import/hwpf/fapi2/include/buffer_parameters.H
index aea03c66..21e7da02 100644
--- a/src/import/hwpf/fapi2/include/buffer_parameters.H
+++ b/src/import/hwpf/fapi2/include/buffer_parameters.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/buffer_parameters.H $ */
+/* $Source: src/import/hwpf/fapi2/include/buffer_parameters.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/buffer_traits.H b/src/import/hwpf/fapi2/include/buffer_traits.H
index b14df7ea..9567a442 100644
--- a/src/import/hwpf/fapi2/include/buffer_traits.H
+++ b/src/import/hwpf/fapi2/include/buffer_traits.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/buffer_traits.H $ */
+/* $Source: src/import/hwpf/fapi2/include/buffer_traits.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/error_info.H b/src/import/hwpf/fapi2/include/error_info.H
index 387bf70e..9152bc6e 100644
--- a/src/import/hwpf/fapi2/include/error_info.H
+++ b/src/import/hwpf/fapi2/include/error_info.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/error_info.H $ */
+/* $Source: src/import/hwpf/fapi2/include/error_info.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/error_scope.H b/src/import/hwpf/fapi2/include/error_scope.H
index 1a00386c..1d4592a8 100644
--- a/src/import/hwpf/fapi2/include/error_scope.H
+++ b/src/import/hwpf/fapi2/include/error_scope.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/error_scope.H $ */
+/* $Source: src/import/hwpf/fapi2/include/error_scope.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2.H b/src/import/hwpf/fapi2/include/fapi2.H
index 9965e8e5..74f5450e 100644
--- a/src/import/hwpf/fapi2/include/fapi2.H
+++ b/src/import/hwpf/fapi2/include/fapi2.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_attribute_service.H b/src/import/hwpf/fapi2/include/fapi2_attribute_service.H
index 78655961..4db20b16 100644
--- a/src/import/hwpf/fapi2/include/fapi2_attribute_service.H
+++ b/src/import/hwpf/fapi2/include/fapi2_attribute_service.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_attribute_service.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_attribute_service.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_error_scope.H b/src/import/hwpf/fapi2/include/fapi2_error_scope.H
index 8a4833ac..60640b94 100644
--- a/src/import/hwpf/fapi2/include/fapi2_error_scope.H
+++ b/src/import/hwpf/fapi2/include/fapi2_error_scope.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_error_scope.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_error_scope.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_hw_access.H b/src/import/hwpf/fapi2/include/fapi2_hw_access.H
index 8dc871bb..07bcd5d0 100644
--- a/src/import/hwpf/fapi2/include/fapi2_hw_access.H
+++ b/src/import/hwpf/fapi2/include/fapi2_hw_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_hw_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_hw_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_hwp_executor.H b/src/import/hwpf/fapi2/include/fapi2_hwp_executor.H
index 78a18fba..a0a4f303 100644
--- a/src/import/hwpf/fapi2/include/fapi2_hwp_executor.H
+++ b/src/import/hwpf/fapi2/include/fapi2_hwp_executor.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_hwp_executor.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_hwp_executor.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_multicast.H b/src/import/hwpf/fapi2/include/fapi2_multicast.H
index c83be5bc..b33f7fa8 100644
--- a/src/import/hwpf/fapi2/include/fapi2_multicast.H
+++ b/src/import/hwpf/fapi2/include/fapi2_multicast.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_multicast.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_multicast.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_multicast_defs.H b/src/import/hwpf/fapi2/include/fapi2_multicast_defs.H
index 6199b4e0..04ed978a 100644
--- a/src/import/hwpf/fapi2/include/fapi2_multicast_defs.H
+++ b/src/import/hwpf/fapi2/include/fapi2_multicast_defs.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_multicast_defs.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_multicast_defs.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/fapi2_vpd_access.H b/src/import/hwpf/fapi2/include/fapi2_vpd_access.H
index d5b946b0..88a18bae 100644
--- a/src/import/hwpf/fapi2/include/fapi2_vpd_access.H
+++ b/src/import/hwpf/fapi2/include/fapi2_vpd_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/fapi2_vpd_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/fapi2_vpd_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/hw_access_def.H b/src/import/hwpf/fapi2/include/hw_access_def.H
index 9d67961c..15a3e8dc 100644
--- a/src/import/hwpf/fapi2/include/hw_access_def.H
+++ b/src/import/hwpf/fapi2/include/hw_access_def.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/hw_access_def.H $ */
+/* $Source: src/import/hwpf/fapi2/include/hw_access_def.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/mvpd_access.H b/src/import/hwpf/fapi2/include/mvpd_access.H
index 532b32ee..89416b63 100644
--- a/src/import/hwpf/fapi2/include/mvpd_access.H
+++ b/src/import/hwpf/fapi2/include/mvpd_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/mvpd_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/mvpd_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/mvpd_access_defs.H b/src/import/hwpf/fapi2/include/mvpd_access_defs.H
index a1a4aaff..6c1ee5ff 100644
--- a/src/import/hwpf/fapi2/include/mvpd_access_defs.H
+++ b/src/import/hwpf/fapi2/include/mvpd_access_defs.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/mvpd_access_defs.H $ */
+/* $Source: src/import/hwpf/fapi2/include/mvpd_access_defs.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/hw_access.H b/src/import/hwpf/fapi2/include/plat/hw_access.H
index fbe8ae6e..3a4b87b1 100644
--- a/src/import/hwpf/fapi2/include/plat/hw_access.H
+++ b/src/import/hwpf/fapi2/include/plat/hw_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/hw_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/hw_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/plat_error_scope.H b/src/import/hwpf/fapi2/include/plat/plat_error_scope.H
index 4b198a10..9266471e 100644
--- a/src/import/hwpf/fapi2/include/plat/plat_error_scope.H
+++ b/src/import/hwpf/fapi2/include/plat/plat_error_scope.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/plat_error_scope.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/plat_error_scope.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/plat_hw_access.H b/src/import/hwpf/fapi2/include/plat/plat_hw_access.H
index 10f162b4..440663dc 100644
--- a/src/import/hwpf/fapi2/include/plat/plat_hw_access.H
+++ b/src/import/hwpf/fapi2/include/plat/plat_hw_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/plat_hw_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/plat_hw_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/plat_target.H b/src/import/hwpf/fapi2/include/plat/plat_target.H
index 4712cda5..391108d2 100644
--- a/src/import/hwpf/fapi2/include/plat/plat_target.H
+++ b/src/import/hwpf/fapi2/include/plat/plat_target.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/plat_target.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/plat_target.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/plat_trace.H b/src/import/hwpf/fapi2/include/plat/plat_trace.H
index fbd3aef6..7338161a 100644
--- a/src/import/hwpf/fapi2/include/plat/plat_trace.H
+++ b/src/import/hwpf/fapi2/include/plat/plat_trace.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/plat_trace.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/plat_trace.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/plat_vpd_access.H b/src/import/hwpf/fapi2/include/plat/plat_vpd_access.H
index 5ca078a8..bc82a1d3 100644
--- a/src/import/hwpf/fapi2/include/plat/plat_vpd_access.H
+++ b/src/import/hwpf/fapi2/include/plat/plat_vpd_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/plat_vpd_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/plat_vpd_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/target.H b/src/import/hwpf/fapi2/include/plat/target.H
index 842d9d1f..b80aacc2 100644
--- a/src/import/hwpf/fapi2/include/plat/target.H
+++ b/src/import/hwpf/fapi2/include/plat/target.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/target.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/target.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/plat/vpd_access.H b/src/import/hwpf/fapi2/include/plat/vpd_access.H
index 554a3469..bf8ca7cc 100644
--- a/src/import/hwpf/fapi2/include/plat/vpd_access.H
+++ b/src/import/hwpf/fapi2/include/plat/vpd_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/plat/vpd_access.H $ */
+/* $Source: src/import/hwpf/fapi2/include/plat/vpd_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/return_code_defs.H b/src/import/hwpf/fapi2/include/return_code_defs.H
index c7c95f09..d7417ab1 100644
--- a/src/import/hwpf/fapi2/include/return_code_defs.H
+++ b/src/import/hwpf/fapi2/include/return_code_defs.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/return_code_defs.H $ */
+/* $Source: src/import/hwpf/fapi2/include/return_code_defs.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/target_states.H b/src/import/hwpf/fapi2/include/target_states.H
index be29cb28..c6ff1fad 100644
--- a/src/import/hwpf/fapi2/include/target_states.H
+++ b/src/import/hwpf/fapi2/include/target_states.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/target_states.H $ */
+/* $Source: src/import/hwpf/fapi2/include/target_states.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/target_types.H b/src/import/hwpf/fapi2/include/target_types.H
index 3e852a1e..b52ea9fa 100644
--- a/src/import/hwpf/fapi2/include/target_types.H
+++ b/src/import/hwpf/fapi2/include/target_types.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/target_types.H $ */
+/* $Source: src/import/hwpf/fapi2/include/target_types.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/variable_buffer.H b/src/import/hwpf/fapi2/include/variable_buffer.H
index e32c69e7..744ebc96 100644
--- a/src/import/hwpf/fapi2/include/variable_buffer.H
+++ b/src/import/hwpf/fapi2/include/variable_buffer.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/variable_buffer.H $ */
+/* $Source: src/import/hwpf/fapi2/include/variable_buffer.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/include/variable_buffer_utils.H b/src/import/hwpf/fapi2/include/variable_buffer_utils.H
index b1ae4664..1f649417 100644
--- a/src/import/hwpf/fapi2/include/variable_buffer_utils.H
+++ b/src/import/hwpf/fapi2/include/variable_buffer_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/hwpf/fapi2/include/variable_buffer_utils.H $ */
+/* $Source: src/import/hwpf/fapi2/include/variable_buffer_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml b/src/import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml
index 116c209a..dbdd3aea 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml
@@ -1,7 +1,7 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
-<!-- $Source: import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml $ -->
+<!-- $Source: src/import/hwpf/fapi2/xml/attribute_info/chip_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
diff --git a/src/import/tools/imageProcs/fapi_sbe_common.H b/src/import/tools/imageProcs/fapi_sbe_common.H
index 3c29b7f4..175aa6cd 100644
--- a/src/import/tools/imageProcs/fapi_sbe_common.H
+++ b/src/import/tools/imageProcs/fapi_sbe_common.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/tools/imageProcs/fapi_sbe_common.H $ */
+/* $Source: src/import/tools/imageProcs/fapi_sbe_common.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
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