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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-03-09 14:57:12 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-03-14 05:42:59 -0400 |
| commit | eb3edaac057e7c44a2e5649a89f2a6bf72fd4a37 (patch) | |
| tree | 0d845eaa33a87bdf046155ae8d9b52bbb036ae7f /src/import | |
| parent | 887db734a27eea0253afb7fbdd73df9a5c1896af (diff) | |
| download | talos-sbe-eb3edaac057e7c44a2e5649a89f2a6bf72fd4a37.tar.gz talos-sbe-eb3edaac057e7c44a2e5649a89f2a6bf72fd4a37.zip | |
stopclocks: Don't set ABSTCLK_MUXSEL on clock stop
In chiplets with dual-domain arrays, setting the mux to 1 will enable ABISTing
those arrays but break scanning some *_abst chains in neighboring chiplets.
Keep the select at 0 to keep scanning intact after a clock stop; ABIST
related tools flip that mux anyway.
Change-Id: Ic49a6357dd8766fc554125b4bf3e30cb53a2585f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37754
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37760
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C index feb19796..a62278e9 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C @@ -83,11 +83,9 @@ fapi2::ReturnCode p9_common_stopclocks_cplt_ctrl_action_function( l_data64.insertFromRight<4, 11>(l_cplt_ctrl_init); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_OR, l_data64)); - FAPI_DBG("set abistclk_muxsel and syncclk_muxsel"); + FAPI_DBG("set syncclk_muxsel"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); - //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 1 - l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>(); //CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 1 l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_SYNCCLK_MUXSEL_DC>(); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_OR, l_data64)); |
