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authorYue Du <daviddu@us.ibm.com>2016-10-04 14:02:16 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-10-06 03:23:37 -0400
commit767e6a27662116d48bdd6a69c79206a3177bf94b (patch)
treeaeedf3bef085444c1ba9415af3a32242b9fae632 /src/import
parente075ae3cd1184b9008be2daeafb62785bcab0617 (diff)
downloadtalos-sbe-767e6a27662116d48bdd6a69c79206a3177bf94b.tar.gz
talos-sbe-767e6a27662116d48bdd6a69c79206a3177bf94b.zip
Core/Initfile: remove cache contained condtions on core-cc/l2 quiesces
Change-Id: I4de12980ca78d3d48a9c3381e240a9355f2667e7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30696 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30698 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
index d24c0837..3d7f9503 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
@@ -257,8 +257,7 @@ p9_hcd_core_startclocks(
FAPI_DBG("Drop flushmode_inhibit via CPLT_CTRL0[2]");
FAPI_TRY(putScom(i_target, C_CPLT_CTRL0_CLEAR, MASK_SET(2)));
- if (!l_attr_runn_mode && l_attr_system_ipl_phase !=
- fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED)
+ if (!l_attr_runn_mode)
{
FAPI_DBG("Drop Core-L2/CC Quiesces via CME_SCOM_SICR[6,8]/[7,9]");
FAPI_TRY(putScom(l_quad,
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