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authorBen Gass <bgass@us.ibm.com>2018-09-26 16:22:51 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2018-09-27 20:52:33 -0500
commit656d77e999c1edf3b5addafc78119d8cc8b3af4a (patch)
treefc57bc98434cda4928083994abb8762cc1287d3a /src/import
parent9f0712eccd007355c0101be54c6e7b0c21191e13 (diff)
downloadtalos-sbe-656d77e999c1edf3b5addafc78119d8cc8b3af4a.tar.gz
talos-sbe-656d77e999c1edf3b5addafc78119d8cc8b3af4a.zip
Back out p9a_10 engd that breaks the initcompiler.
Change-Id: I39244631193843cd418061e979df4c72973148f5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66701 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 808168c7..06b16313 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -50,6 +50,24 @@
</attribute>
<!-- ********************************************************************* -->
<attribute>
+ <id>ATTR_CHIP_EC_FEATURE_SEPARATE_CORE_DBG_CNTL</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Support for the CDIAL LS_DBG_CTRL was dropped, so individual
+ debug dials need to be used. See George Rohrbaugh.
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_AXONE</name>
+ <ec>
+ <value>0x10</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ********************************************************************* -->
+ <attribute>
<id>ATTR_CHIP_EC_FEATURE_ONE_NPU_TOP</id>
<targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
<description>
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