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| author | Luke C. Murray <murrayl@us.ibm.com> | 2017-12-05 15:18:23 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-12-09 22:59:26 -0500 |
| commit | 60fa6f5edfbdbba77c3e72fc1964cb2e22d394c0 (patch) | |
| tree | 449090086de0f28996493b8ad2e5127ad6a12aab /src/import | |
| parent | a5f986ed76b330b5218ff389fe6820cd7c05af8e (diff) | |
| download | talos-sbe-60fa6f5edfbdbba77c3e72fc1964cb2e22d394c0.tar.gz talos-sbe-60fa6f5edfbdbba77c3e72fc1964cb2e22d394c0.zip | |
Enabling L2 64B store prediction
Turning on the 64B store prediction inside the L2. This is a
performance fix.
Change-Id: I2e91747e2cf420ffa50efeb73b8876e54c89b8d6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50531
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50542
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 17eac69a..ccca23da 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -2466,6 +2466,23 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_DISABLE_64B_STORE</id>> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1 only: don't set 64B store, dials didn't exist + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_DISABLE_TLBIE_PACING</id>> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |
