summaryrefslogtreecommitdiffstats
path: root/src/import
diff options
context:
space:
mode:
authorJoe McGill <jmcgill@us.ibm.com>2016-10-27 09:02:59 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-10-28 11:27:40 -0400
commit44d9ba05893caf59fb49a0f1f4244675332819f9 (patch)
tree434049b7269357d9e52e494c52fd7dc7a18a9591 /src/import
parentdd0395e4b8ae2fabcf3ca899f851c22d13bbd922 (diff)
downloadtalos-sbe-44d9ba05893caf59fb49a0f1f4244675332819f9.tar.gz
talos-sbe-44d9ba05893caf59fb49a0f1f4244675332819f9.zip
p9_sbe_scominit -- configure FBC personalization for MC chiplets
Change-Id: I3cc772c6a9edc1f060a47ed6160423a3e9f60559 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31911 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31913 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
index 20b76982..a545d28d 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
@@ -95,8 +95,6 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
uint64_t l_base_addr_nm1;
uint64_t l_base_addr_m;
uint64_t l_base_addr_mmio;
- uint8_t l_mc_sync_mode;
- fapi2::TargetFilter l_target_filter = fapi2::TARGET_FILTER_NONE ;
// set fabric topology information in each pervasive chiplet (outside of EC/EP)
{
@@ -116,6 +114,7 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
fapi2::TARGET_FILTER_ALL_NEST |
fapi2::TARGET_FILTER_XBUS |
fapi2::TARGET_FILTER_ALL_OBUS |
+ fapi2::TARGET_FILTER_ALL_MC |
fapi2::TARGET_FILTER_ALL_PCI),
fapi2::TARGET_STATE_FUNCTIONAL))
{
@@ -302,11 +301,12 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
// configure chiplet pervasive FIRs / XFIRs
{
- l_target_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_TP |
- fapi2::TARGET_FILTER_ALL_NEST |
- fapi2::TARGET_FILTER_XBUS |
- fapi2::TARGET_FILTER_ALL_OBUS |
- fapi2::TARGET_FILTER_ALL_PCI);
+ uint8_t l_mc_sync_mode = 0;
+ fapi2::TargetFilter l_target_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_TP |
+ fapi2::TARGET_FILTER_ALL_NEST |
+ fapi2::TARGET_FILTER_XBUS |
+ fapi2::TARGET_FILTER_ALL_OBUS |
+ fapi2::TARGET_FILTER_ALL_PCI);
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target, l_mc_sync_mode),
"Error from FAPI_ATTR_GET (ATTR_MC_SYNC_MODE)");
OpenPOWER on IntegriCloud