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author | Dean Sanner <dsanner@us.ibm.com> | 2017-05-24 11:03:55 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-03-15 00:43:49 -0400 |
commit | e962f1e8c736819d677265cdda52d3155a6f8de4 (patch) | |
tree | 45f11a31f37d9681c8d566fca2bfa1db4c173475 /src/import | |
parent | da9b63d6c024ffb00046f7d37dfa3ae1d5d8f440 (diff) | |
download | talos-sbe-e962f1e8c736819d677265cdda52d3155a6f8de4.tar.gz talos-sbe-e962f1e8c736819d677265cdda52d3155a6f8de4.zip |
Honor STOP Gated bit when checking access states
Change-Id: I08d2b377414f0f0491a731efee02359f6cefc27b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40920
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55823
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.C | 89 |
1 files changed, 47 insertions, 42 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.C b/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.C index e28ff52f..92144d04 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.C @@ -60,6 +60,7 @@ const uint32_t eq_clk_l2_pos[] = {8, 9}; const uint32_t eq_clk_l3_pos[] = {6, 7}; const uint32_t SSH_REG_STOP_LEVEL = 8; const uint32_t SSH_REG_STOP_LEVEL_LEN = 4; +const uint32_t SSH_REG_STOP_GATED = 0; // ---------------------------------------------------------------------- // Procedure Function @@ -115,57 +116,61 @@ p9_query_cache_access_state( o_l3_is_scomable = 1; o_l3_is_scannable = 1; - // STOP8 - Half Quad Deep Sleep - // VSU, ISU are powered off - // IFU, LSU are powered off - // PC, Core EPS are powered off - // L20-EX0 is clocked off if both cores are >= 8 - // L20-EX1 is clocked off if both cores are >= 8 - if (l_quadStopLevel >= 8) + //Looking at the stop states is only valid if quad is stop gated -- else it is fully running + if (l_qsshsrc.getBit(SSH_REG_STOP_GATED)) { - o_l2_is_scomable = 0; - } + // STOP8 - Half Quad Deep Sleep + // VSU, ISU are powered off + // IFU, LSU are powered off + // PC, Core EPS are powered off + // L20-EX0 is clocked off if both cores are >= 8 + // L20-EX1 is clocked off if both cores are >= 8 + if (l_quadStopLevel >= 8) + { + o_l2_is_scomable = 0; + } - // STOP9 - Fast Winkle (lab use only) - // Both cores and cache are clocked off - if (l_quadStopLevel >= 9) - { - o_l3_is_scomable = 0; - } + // STOP9 - Fast Winkle (lab use only) + // Both cores and cache are clocked off + if (l_quadStopLevel >= 9) + { + o_l3_is_scomable = 0; + } - // STOP11 - Deep Winkle - // Both cores and cache are powered off - if (l_quadStopLevel >= 11) - { - o_l2_is_scannable = 0; - o_l3_is_scannable = 0; - } - else - { - //Read clock status to confirm stop state history is accurate - //If we trust the stop state history, this could be removed to save on code size - //Compare Hardware status vs stop state status. If there is a mismatch the HW value overrides the stop state + // STOP11 - Deep Winkle + // Both cores and cache are powered off + if (l_quadStopLevel >= 11) + { + o_l2_is_scannable = 0; + o_l3_is_scannable = 0; + } + else + { + //Read clock status to confirm stop state history is accurate + //If we trust the stop state history, this could be removed to save on code size + //Compare Hardware status vs stop state status. If there is a mismatch the HW value overrides the stop state - FAPI_TRY(fapi2::getScom(i_target, EQ_CLOCK_STAT_SL, l_data64), "Error reading data from EQ_CLOCK_STAT_SL"); + FAPI_TRY(fapi2::getScom(i_target, EQ_CLOCK_STAT_SL, l_data64), "Error reading data from EQ_CLOCK_STAT_SL"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target, l_chpltNumber), - "Error: Failed to get the position of the EX:0x%08X", i_target); - l_exPos = l_chpltNumber % 2; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target, l_chpltNumber), + "Error: Failed to get the position of the EX:0x%08X", i_target); + l_exPos = l_chpltNumber % 2; - l_is_scomable = !l_data64.getBit(eq_clk_l2_pos[l_exPos]); + l_is_scomable = !l_data64.getBit(eq_clk_l2_pos[l_exPos]); - if (o_l2_is_scomable != l_is_scomable) - { - FAPI_INF("Clock status didn't match stop state, overriding is_scomable status"); - o_l2_is_scomable = l_is_scomable; - } + if (o_l2_is_scomable != l_is_scomable) + { + FAPI_INF("Clock status didn't match stop state, overriding is_scomable status"); + o_l2_is_scomable = l_is_scomable; + } - l_is_scomable = !l_data64.getBit(eq_clk_l3_pos[l_exPos]); + l_is_scomable = !l_data64.getBit(eq_clk_l3_pos[l_exPos]); - if (o_l3_is_scomable != l_is_scomable) - { - FAPI_INF("Clock status didn't match stop state, overriding is_scomable status"); - o_l3_is_scomable = l_is_scomable; + if (o_l3_is_scomable != l_is_scomable) + { + FAPI_INF("Clock status didn't match stop state, overriding is_scomable status"); + o_l3_is_scomable = l_is_scomable; + } } } |