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| author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2017-11-09 05:50:18 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-11-16 20:11:51 -0500 |
| commit | 722d8a4cdb59ba19c1828cfde061335cad6e13a4 (patch) | |
| tree | 2d325f5caebc668e5cf8a2fabbcefa66e246ad15 /src/import/chips | |
| parent | fc526ece8110760c59be99cdce6ec4eedb512071 (diff) | |
| download | talos-sbe-722d8a4cdb59ba19c1828cfde061335cad6e13a4.tar.gz talos-sbe-722d8a4cdb59ba19c1828cfde061335cad6e13a4.zip | |
Fix bug in cache query state procedure
Change-Id: Ic4869b2d73e90bd213c229fc83b189cb10ad57b6
CQ:SW407497
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49476
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49584
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.H | 41 |
1 files changed, 30 insertions, 11 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.H b/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.H index 84696841..b2d3daf4 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_query_cache_access_state.H @@ -48,14 +48,15 @@ //------------------------------------------------------------------------------ // Constant definitions //------------------------------------------------------------------------------ - +#define MAX_L2_PER_QUAD 2 //shared by the core/ex +#define MAX_L3_PER_QUAD 2 //shared by the core/ex // function pointer typedef definition for HWP call support typedef fapi2::ReturnCode (*p9_query_cache_access_state_FP_t) ( const fapi2::Target<fapi2::TARGET_TYPE_EQ>&, - bool&, - bool&, - bool&, - bool&); + bool*, + bool*, + bool*, + bool*); extern "C" { @@ -68,8 +69,10 @@ extern "C" /// /// @param[in] i_target EX target /// -/// @param[out] o_l2_is_scomable L2 cache has clocks running and is scomable -/// @param[out[ o_l2_is_scannable L2 cache is powered up and has valid latch state +/// @param[out] o_l2_is_scomable[MAX_L2_PER_QUAD] +// L2 cache has clocks running and is scomable +/// @param[out[ o_l2_is_scannable[MAX_L2_PER_QUAD] +// L2 cache is powered up and has valid latch state /// @param[out] o_l3_is_scomable L3 cache has clocks running and is scomable /// @param[out[ o_l2_is_scannable L3 cache is powered up and has valid latch state /// @@ -78,10 +81,26 @@ extern "C" fapi2::ReturnCode p9_query_cache_access_state( const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target, - bool& o_l2_is_scomable, - bool& o_l2_is_scannable, - bool& o_l3_is_scomable, - bool& o_l3_is_scannable); + bool o_l2_is_scomable[MAX_L2_PER_QUAD], + bool o_l2_is_scannable[MAX_L2_PER_QUAD], + bool o_l3_is_scomable[MAX_L3_PER_QUAD], + bool o_l3_is_scannable[MAX_L3_PER_QUAD]); + +/// @brief Check the stop level for the EX caches and sets boolean scomable parameters +/// +/// @param[in] i_target EX target +/// +/// @param[out] o_l2_is_scomable[MAX_L2_PER_QUAD] +// L2 cache has clocks running and is scomable +/// @param[out] o_l3_is_scomable L3 cache has clocks running and is scomable +/// +/// @return FAPI2_RC_SUCCESS if success, else error code. + + fapi2::ReturnCode + p9_query_cache_clock_state( + const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target, + bool o_l2_is_scomable[MAX_L2_PER_QUAD], + bool o_l3_is_scomable[MAX_L3_PER_QUAD]); } // extern "C" |
