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| author | Raja Das <rajadas2@in.ibm.com> | 2017-10-29 23:57:11 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-11-20 13:07:00 -0500 |
| commit | 20b1e798a82b422eba057e28d16672868f912df3 (patch) | |
| tree | b9f545e43f68f19d2a01300bc357b9d0014a73c9 /src/import/chips | |
| parent | 666c72a55f096db0c0865ddfd84a8456a3f9f2d9 (diff) | |
| download | talos-sbe-20b1e798a82b422eba057e28d16672868f912df3.tar.gz talos-sbe-20b1e798a82b422eba057e28d16672868f912df3.zip | |
PPE empty PK FFDC handler to save-off required registers
- Defined PPE_CAPTURE_INTERRUPT_FFDC, by default NULL
- Dependent Platform need to plug in a branch for FFDC
Change-Id: Iea222662abe19c0b5f9da6eac3e161963b1c047c
RTC:179374
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48977
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48979
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S | 13 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_irq.h | 9 |
2 files changed, 20 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S index 5efb2073..ce463ebb 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S @@ -58,6 +58,8 @@ __vectors: ### will be forwarded to the program exception handler. __machine_check: + PPE_CAPTURE_INTERRUPT_FFDC + PPE42_MACHINE_CHECK_HANDLER ############################################################ @@ -89,6 +91,8 @@ __system_reset: .org __vectors + 0x0060 __data_storage: + PPE_CAPTURE_INTERRUPT_FFDC + PPE42_DATA_STORAGE_HANDLER ############################################################ @@ -98,6 +102,8 @@ __data_storage: .org __vectors + 0x0080 __instruction_storage: + PPE_CAPTURE_INTERRUPT_FFDC + PPE42_INSTRUCTION_STORAGE_HANDLER @@ -116,8 +122,9 @@ __external_interrupt_vector: .org __vectors + 0x00C0 __alignment_exception: - PPE42_ALIGNMENT_HANDLER + PPE_CAPTURE_INTERRUPT_FFDC + PPE42_ALIGNMENT_HANDLER ############################################################ # 0x00E0 : Program Interrupt @@ -126,8 +133,10 @@ __alignment_exception: .org __vectors + 0x00E0 __program_exception: - _pk_panic PPE42_ILLEGAL_INSTRUCTION + PPE_CAPTURE_INTERRUPT_FFDC + + _pk_panic PPE42_ILLEGAL_INSTRUCTION ############################################################ # 0x0100 : DEC Interrupts diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_irq.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_irq.h index ae899359..7bda9846 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_irq.h +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_irq.h @@ -53,6 +53,15 @@ // bytes (8 instructions) to an unhandled exception, so any redefinition // would most likely be a branch to an application-defined handler. +// Empty PPE FFDC Handler plugged here, dependent platform needs to plug it in, +// if specific registers are required to be saved-off during the interupt +// execution +// by Default it will not generate any branch instruction in the pk interrupt +// vector table +#ifndef PPE_CAPTURE_INTERRUPT_FFDC + #define PPE_CAPTURE_INTERRUPT_FFDC +#endif + #ifndef PPE42_MACHINE_CHECK_HANDLER #define PPE42_MACHINE_CHECK_HANDLER PK_PANIC( PPE42_MACHINE_CHECK_PANIC) #endif |
