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| author | Joe McGill <jmcgill@us.ibm.com> | 2018-07-17 14:34:58 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-07-19 22:59:47 -0500 |
| commit | 0eff4a7aa441c5197a5d788b1aa341077d7cdc45 (patch) | |
| tree | 513a7e748f6a42355d38c5669d3dcf995d51f1ee /src/import/chips | |
| parent | a46943dd86778619844c9f10c21ddc749aa4e630 (diff) | |
| download | talos-sbe-0eff4a7aa441c5197a5d788b1aa341077d7cdc45.tar.gz talos-sbe-0eff4a7aa441c5197a5d788b1aa341077d7cdc45.zip | |
p9.pci.scan.initfile -- replace 62028 implementation with initfile entry
62028 added a workaround for SW 430383, using a manual re-scan of the ring
hardcoded to flip the desired bits because engineering data was not yet
available for the necessary spies
This commit removes the SBE manual scan sequence and sets the necessary
chicken switches by the newly added spy entries
Change-Id: I912f190ab44c320f9bd142ce626570d34ec0b00f
CQ: SW438480
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62675
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62710
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C | 104 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 7 |
2 files changed, 0 insertions, 111 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C index 75be02a8..ed2d87df 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C @@ -43,107 +43,6 @@ #include "p9_const_common.H" #include <p9_ring_id.h> -fapi2::ReturnCode -p9_sbe_nest_initf_sw430383_wa(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) -{ - FAPI_DBG("Start"); - - fapi2::ATTR_CHIP_EC_FEATURE_SW430383_Type l_sw430383; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SW430383, - i_target, - l_sw430383), - "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_SW430383"); - - if (l_sw430383) - { - fapi2::buffer<uint64_t> l_scan_region; - fapi2::buffer<uint64_t> l_scan_data; - - // ring: - // n2_fure 0x04035C0F 96269 N Y Y Y NESTN2 OFF - // - // bits to set: - // 1 4083 92185 0 PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0) - // 1 45823 50445 0 PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0) - // 1 70000 26268 0 PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0) - - // inject header - l_scan_region.setBit<PERV_1_SCAN_REGION_TYPE_PERV>(). // PERV - setBit<PERV_1_SCAN_REGION_TYPE_UNIT2>(). // PCIS0 - setBit<PERV_1_SCAN_REGION_TYPE_UNIT3>(). // PCIS1 - setBit<PERV_1_SCAN_REGION_TYPE_UNIT4>(). // PCIS2 - setBit<PERV_1_SCAN_REGION_TYPE_FUNC>(). // FUNC - setBit<PERV_1_SCAN_REGION_TYPE_REGF>(); // REGF - FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN_REGION_TYPE, l_scan_region)); - l_scan_data = 0xA5A5A5A5A5A5A5A5; - FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data)); - - // scan 0..4083 (37*110 + 13) - for (auto ii = 0; ii < 37; ii++) - { - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data)); - } - - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x0D, l_scan_data)); - - // flip PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2 - FAPI_DBG("Flip PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2"); - l_scan_data.setBit<0>(); - FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data)); - - // scan 4083..45823 (379*110 + 50) - for (auto ii = 0; ii < 379; ii++) - { - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data)); - } - - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x32, l_scan_data)); - - // flip PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0) - FAPI_DBG("Flip PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)"); - l_scan_data.setBit<0>(); - FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data)); - - // scan 45823..70000 (219*110 + 87) - for (auto ii = 0; ii < 219; ii++) - { - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data)); - } - - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x57, l_scan_data)); - - // flip PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0) - FAPI_DBG("Flip PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)"); - l_scan_data.setBit<0>(); - FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data)); - - // scan 70000..96269 (238*110 + 89) - for (auto ii = 0; ii < 238; ii++) - { - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data)); - } - - FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x59, l_scan_data)); - - // check header - FAPI_ASSERT((l_scan_data == 0xA5A5A5A5A5A5A5A5), - fapi2::P9_PUTRING_CHECKWORD_DATA_MISMATCH(). - set_TARGET(i_target). - set_CHIPLET_ID(0x02). - set_SCOM_ADDRESS(PERV_N2_SCAN32). - set_SCOM_DATA(l_scan_data()). - set_BITS_DECODED(0). - set_RINGID(n2_fure). - set_RINGMODE(fapi2::RING_MODE_HEADER_CHECK). - set_RETURN_CODE(0), - "Error rotating n2_fure for sw430383"); - } - -fapi_try_exit: - FAPI_DBG("End"); - return fapi2::current_err; -} - fapi2::ReturnCode p9_sbe_nest_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) @@ -252,9 +151,6 @@ fapi2::ReturnCode p9_sbe_nest_initf(const FAPI_TRY(fapi2::putRing(i_target_chip, n2_fure), "Error from putRing (n2_fure)"); - FAPI_TRY(p9_sbe_nest_initf_sw430383_wa(i_target_chip), - "Error from p9_sbe_nest_initf_sw430383_wa"); - if (!l_read_attr.getBit<9>()) //Check iopsi is enable { FAPI_DBG("Scan n2_psi_fure ring"); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 11f520f0..87928eb1 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -7646,13 +7646,6 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> - <chip> - <name>ENUM_ATTR_NAME_AXONE</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> |
