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author | Joe McGill <jmcgill@us.ibm.com> | 2017-10-02 15:21:34 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-10-04 20:41:18 -0400 |
commit | e98d926ff7cf4a0d1a4a1a722bb8802f8f075df5 (patch) | |
tree | 5acd3e59392450d8150b20425e6079a47cfeadbf /src/import/chips | |
parent | ee1b8b912fe2cf8598d58b93097323f917aba440 (diff) | |
download | talos-sbe-e98d926ff7cf4a0d1a4a1a722bb8802f8f075df5.tar.gz talos-sbe-e98d926ff7cf4a0d1a4a1a722bb8802f8f075df5.zip |
p9_thread_control -- remove threads_running check from sreset, start code paths
After a write to DIRECT_CONTROLS, the targeted thread will start executing
instructions, which may include STOP. Future polling of the RAS_STATUS
register is not guaranteed to satisfy the threads_running check (by the time
RAS_STATUS is polled the thread may be idle again)
Change-Id: Ie3628149cef5089fb635256df5a25f08dbd828dc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47069
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47076
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_thread_control.C | 66 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml | 47 |
2 files changed, 0 insertions, 113 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C index 0069f1b0..35c83bf1 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C @@ -107,35 +107,6 @@ fapi2::ReturnCode p9_thread_control_query( uint64_t& o_state); //-------------------------------------------------------------------------- -/// @brief threads_running : static funtion to encapsulate the running state -/// @param[in] i_target core target -/// @param[in] i_threads normal core thread bitset (0b0000..0b1111) -/// @param[out] o_rasStatusReg Complete RAS status reg 64-bit buffer. -/// @param[out] o_ok true if the threads are running -/// @return FAPI2_RC_SUCCESS if the underlying hw operations succeeded -//-------------------------------------------------------------------------- -static inline fapi2::ReturnCode threads_running( - const fapi2::Target<TARGET_TYPE_CORE>& i_target, - const uint8_t i_threads, - fapi2::buffer<uint64_t>& o_rasStatusReg, - bool& o_ok) -{ - // Running is defined as not in maint mode and not quiesced. - uint64_t l_trys = g_poll_for_running; - uint64_t l_state = 0; - - for (o_ok = false; !o_ok && l_trys > 0; l_trys--) - { - FAPI_TRY(p9_thread_control_query(i_target, i_threads, o_rasStatusReg, l_state), - "threads_running(): p9_thread_control_query() returns an error."); - o_ok = (l_state & THREAD_STATE_RUNNING); - } - -fapi_try_exit: - return fapi2::current_err; -} - -//-------------------------------------------------------------------------- /// @brief threads_in_maint : static funtion to encapsulate the maint state /// @param[in] i_target core target /// @param[in] i_threads normal core thread bitset (0b0000..0b1111) @@ -440,24 +411,6 @@ fapi2::ReturnCode p9_thread_control_sreset( "sp_sreset for threads 0x%x", i_threads); } - // Post-conditions check - { - bool l_running = false; - FAPI_TRY(threads_running(i_target, i_threads, o_rasStatusReg, l_running), - "p9_thread_control_sreset: unable to determine if threads " - "are running. threads: 0x%x", i_threads); - PTC_ASSERT_WARN(l_running == true, - i_warncheck, - fapi2::P9_THREAD_CONTROL_SRESET_FAIL() - .set_CORE_TARGET(i_target) - .set_THREAD(i_threads) - .set_C_RAS_STATUS_REG(o_rasStatusReg), - "p9_thread_control_sreset: ERROR: Thread SRESET issued, " - "but the threads aren't running. SReset might have " - "failed for threads 0x%x, C_RAS_STATUS reg 0x%.16llX", - i_threads, o_rasStatusReg); - } - FAPI_INF("p9_thread_control_sreset : sreset command issued for threads 0x%x", i_threads); @@ -526,25 +479,6 @@ fapi2::ReturnCode p9_thread_control_start( "for threads 0x%x", i_threads); } - // Post-conditions check - { - bool l_running = false; - FAPI_TRY(threads_running(i_target, i_threads, o_rasStatusReg, l_running), - "p9_thread_control_start: unable to determine if threads are " - "running. threads: 0x%x", i_threads); - - PTC_ASSERT_WARN(l_running == true, - i_warncheck, - fapi2::P9_THREAD_CONTROL_START_FAIL() - .set_CORE_TARGET(i_target) - .set_THREAD(i_threads) - .set_C_RAS_STATUS_REG(o_rasStatusReg), - "p9_thread_control_start: ERROR: Thread Start issued, " - "but the threads aren't running. Start might have " - "failed for threads 0x%x, C_RAS_STATUS reg 0x%.16llX", - i_threads, o_rasStatusReg); - } - FAPI_INF("p9_thread_control_start : start command issued for threads 0x%x", i_threads); diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml index 4352c84b..42f54049 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml @@ -24,30 +24,6 @@ <!-- IBM_PROLOG_END_TAG --> <!-- @brief Error definitions for p9_thread_control procedure --> <hwpErrors> - - <!-- ********************************************************************* --> - <hwpError> - <sbeError/> - <rc>RC_P9_THREAD_CONTROL_SRESET_FAIL</rc> - <description>SReset command failed: Not all threads are running after sreset command.</description> - <ffdc>CORE_TARGET</ffdc> - <ffdc>THREAD</ffdc> - <ffdc>C_RAS_STATUS_REG</ffdc> - <callout> - <target>CORE_TARGET</target> - <priority>HIGH</priority> - </callout> - <callout> - <procedure>CODE</procedure> - <priority>LOW</priority> - </callout> - <deconfigure> - <target>CORE_TARGET</target> - </deconfigure> - <gard> - <target>CORE_TARGET</target> - </gard> - </hwpError> <!-- ********************************************************************* --> <hwpError> <sbeError/> @@ -64,29 +40,6 @@ <!-- ********************************************************************* --> <hwpError> <sbeError/> - <rc>RC_P9_THREAD_CONTROL_START_FAIL</rc> - <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description> - <ffdc>CORE_TARGET</ffdc> - <ffdc>THREAD</ffdc> - <ffdc>C_RAS_STATUS_REG</ffdc> - <callout> - <target>CORE_TARGET</target> - <priority>HIGH</priority> - </callout> - <callout> - <procedure>CODE</procedure> - <priority>LOW</priority> - </callout> - <deconfigure> - <target>CORE_TARGET</target> - </deconfigure> - <gard> - <target>CORE_TARGET</target> - </gard> - </hwpError> - <!-- ********************************************************************* --> - <hwpError> - <sbeError/> <rc>RC_P9_THREAD_CONTROL_STOP_FAIL</rc> <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description> <ffdc>CORE_TARGET</ffdc> |