diff options
author | Sumit Kumar <sumit_kumar@in.ibm.com> | 2017-01-31 04:50:15 -0600 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-11-02 02:50:48 -0400 |
commit | 0d8c248cc29e659ab67fffcd26f54a660569ab8a (patch) | |
tree | 855fc8c36bdc6db447061de8c971b03bc069a751 /src/import/chips/p9 | |
parent | 67a37783b04bb5b8de3648def3329b0b5000b852 (diff) | |
download | talos-sbe-0d8c248cc29e659ab67fffcd26f54a660569ab8a.tar.gz talos-sbe-0d8c248cc29e659ab67fffcd26f54a660569ab8a.zip |
Centaur ring support - ring_apply and ring data
- Introduces Centaur ring ID header files and ring_apply support to generate
a separate Centaur ring image file.
- Introduces common ring ID header file consumed by both P9 and Centaur and
all user codes, e.g. putRing, ipl_build, xip_tool, etc.
- Introduces a namespace approach for complete separation of P9 and Centaur
ring data and to facilitate execution time selection of either P9 and
Centaur ring data.
- Added Centaur image .rings generation function to p9_ring_apply.
- This commit does NOT support Centaur in the TOR API nor in xip_tool. See
commit 38018 for that support.
- Modified hw_image.mk file to support Centaur XIP image generation.
- Updated ring_apply to also support .overrides ring gen for Centaur.
Change-Id: I12a27b194dc14d906fea7bc273eb9f766f0fc5bf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35639
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36010
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_ringId.C | 24 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_ringId.H | 183 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_ring_id.h | 497 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_ring_identification.H | 7 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_scan_compression.H | 15 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_tor.C | 123 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_tor.H | 60 | ||||
-rw-r--r-- | src/import/chips/p9/utils/p9_putRingUtils.C | 16 | ||||
-rw-r--r-- | src/import/chips/p9/utils/p9_putRingUtils.H | 12 | ||||
-rw-r--r-- | src/import/chips/p9/utils/p9_putRingUtils.mk | 3 | ||||
-rw-r--r-- | src/import/chips/p9/xip/p9_xip_tool.C | 73 |
11 files changed, 463 insertions, 550 deletions
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C index 3e806059..52994757 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C +++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C @@ -24,8 +24,14 @@ /* IBM_PROLOG_END_TAG */ #include <string.h> +#include <common_ringId.H> + +namespace P9_RID +{ + #include "p9_ringId.H" + namespace PERV { const GenRingIdList RING_ID_LIST_COMMON[] = @@ -453,13 +459,19 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL }; }; -CHIPLET_TYPE p9_ringid_get_chiplet(RingID i_ringId) + +}; // namespace P9_RID + + +using namespace P9_RID; + +ChipletType_t P9_RID::p9_ringid_get_chiplet(RingId_t i_ringId) { return RING_PROPERTIES[i_ringId].iv_type; } -void p9_ringid_get_chiplet_properties( - CHIPLET_TYPE i_chiplet, +void P9_RID::p9_ringid_get_chiplet_properties( + ChipletType_t i_chiplet, CHIPLET_DATA** o_cpltData, GenRingIdList** o_ringComm, GenRingIdList** o_ringInst, @@ -606,7 +618,7 @@ void p9_ringid_get_chiplet_properties( } } -GenRingIdList* p9_ringid_get_ring_properties(RingID i_ringId) +GenRingIdList* P9_RID::p9_ringid_get_ring_properties(RingId_t i_ringId) { CHIPLET_DATA* l_cpltData; GenRingIdList* l_ringList[2]; // 0: common, 1: instance @@ -614,8 +626,8 @@ GenRingIdList* p9_ringid_get_ring_properties(RingID i_ringId) uint8_t l_varNumb; int i, j, n; - p9_ringid_get_chiplet_properties( - p9_ringid_get_chiplet(i_ringId), + P9_RID::p9_ringid_get_chiplet_properties( + P9_RID::p9_ringid_get_chiplet(i_ringId), &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_varNumb); if (!l_ringList[0]) diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H index 8c8fbdcf..f2f3639d 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H +++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H @@ -26,54 +26,40 @@ #ifndef _P9_RINGID_H_ #define _P9_RINGID_H_ - #ifdef WIN32 #include "win32_stdint.h" #include "p9_ring_id.h" + #include <common_ringId.H> #else #include <stdint.h> #include <stddef.h> + #include <common_ringId.H> #include <p9_ring_id.h> #endif -enum RingClass +enum CHIPLET_TYPE { - EKB_RING, - EKB_FSM_RING, - EKB_STUMPED_RING, - EKB_CMSK_RING, - VPD_RING, - NUM_RING_CLASSES + PERV_TYPE, + N0_TYPE, + N1_TYPE, + N2_TYPE, + N3_TYPE, + XB_TYPE, + MC_TYPE, + OB0_TYPE, + OB1_TYPE, + OB2_TYPE, + OB3_TYPE, + PCI0_TYPE, + PCI1_TYPE, + PCI2_TYPE, + EQ_TYPE, + EC_TYPE, + SBE_NOOF_CHIPLETS }; -// General Ring ID list structure -typedef struct -{ - const char* ringName; - uint8_t ringId; - uint8_t instanceIdMin; - uint8_t instanceIdMax; - RingClass ringClass; - uint32_t scanScomAddress; -} GenRingIdList; - -typedef enum RingVariant // Base variables -{ - BASE = 0x00, - CC = 0x01, - RL = 0x02, - OVERRIDE = 0x03, - OVERLAY = 0x04, - NUM_RING_VARIANTS = 0x05, - NOT_VALID = 0xff -} RingVariant_t; - -#define P9_RINGID_VARIANT_ORDER_SIZE 3 -typedef struct -{ - uint8_t variant[P9_RINGID_VARIANT_ORDER_SIZE]; -} RingVariantOrder; - +#define SGPE_NOOF_CHIPLETS 1 +#define CME_NOOF_CHIPLETS 1 namespace PERV { @@ -187,62 +173,6 @@ extern const GenRingIdList RING_ID_LIST_INSTANCE[]; extern const RingVariantOrder RING_VARIANT_ORDER[]; } -namespace RING_TYPES -{ -enum RINGTYPE -{ - COMMON_RING = 0, - INSTANCE_RING = 1 -}; - -}; //end of RS4 namespace - -enum CHIPLET_TYPE : uint8_t -{ - PERV_TYPE, - N0_TYPE, - N1_TYPE, - N2_TYPE, - N3_TYPE, - XB_TYPE, - MC_TYPE, - OB0_TYPE, - OB1_TYPE, - OB2_TYPE, - OB3_TYPE, - PCI0_TYPE, - PCI1_TYPE, - PCI2_TYPE, - EQ_TYPE, - EC_TYPE, - SBE_NOOF_CHIPLETS -}; - -#define SGPE_NOOF_CHIPLETS 1 -#define CME_NOOF_CHIPLETS 1 - -struct CHIPLET_DATA -{ - // This is the chiplet-ID of the first instance of the Chiplet - uint8_t iv_base_chiplet_number; - - // The no.of common rings for the Chiplet - uint8_t iv_num_common_rings; - - // The no.of instance rings for the Chiplet (w/different ringId values) - uint8_t iv_num_instance_rings; - - // The no.of instance rings for the Chiplet (w/different ringId values - // AND different scanAddress values) - uint8_t iv_num_instance_rings_scan_addrs; -}; - -// This is used to Set (Mark) the left-most bit -const uint8_t INSTANCE_RING_MARK = 0x80; -// -// This is used to Set (Mark) the left-most bit -const uint8_t INSTANCE_RING_MASK = 0x7F; - namespace PERV { // FIXME: this struct is nonsense - no one uses these fields (we only need the variant number) @@ -321,7 +251,7 @@ static const CHIPLET_DATA g_n0Data = 2, // N0 Chiplet ID is 2. 9, // 9 common rings for N0 Chiplet 3, // 3 instance specific rings for N0 chiplet - 3 // FIXME: number of variants? doesn't match RingVariants below! + 3 }; }; @@ -878,27 +808,9 @@ static const CHIPLET_DATA g_ecData = }; }; // end of namespace EC -static const uint8_t INVALID_RING = 0xFF; -// This structure is needed for mapping a RingID to it's corresponding name. -// The names will be used by the build scripts when generating the TOR. #ifndef __PPE__ -struct ringProperties_t -{ - uint8_t iv_torOffSet; // FIXME: misnomer - char iv_name[50]; - CHIPLET_TYPE iv_type; -}; -#endif -#ifdef __PPE__ -struct ringProperties_t -{ - uint8_t iv_torOffSet; - CHIPLET_TYPE iv_type; -}; -#endif -#ifndef __PPE__ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { { PERV::perv_fure , "perv_fure" , PERV_TYPE }, // 0 @@ -919,9 +831,9 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { PERV::perv_pll_func , "perv_pll_func" , PERV_TYPE }, // 15 { PERV::perv_repr , "perv_repr" , PERV_TYPE }, // 16 { PERV::occ_repr , "occ_repr" , PERV_TYPE }, // 17 - { INVALID_RING , "invalid" , PERV_TYPE }, // 18 - { INVALID_RING , "invalid" , PERV_TYPE }, // 19 - { INVALID_RING , "invalid" , PERV_TYPE }, // 20 + { INVALID_RING_OFFSET , "invalid" , PERV_TYPE }, // 18 + { INVALID_RING_OFFSET , "invalid" , PERV_TYPE }, // 19 + { INVALID_RING_OFFSET , "invalid" , PERV_TYPE }, // 20 { N0::n0_fure , "n0_fure" , N0_TYPE }, // 21 { N0::n0_gptr , "n0_gptr" , N0_TYPE }, // 22 { N0::n0_time , "n0_time" , N0_TYPE }, // 23 @@ -962,7 +874,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { N2::n2_repr , "n2_repr" , N2_TYPE }, // 58 { N2::n2_cxa1_repr , "n2_cxa1_repr" , N2_TYPE }, // 59 { N2::n2_psi_repr , "n2_psi_repr" , N2_TYPE }, // 60 - { INVALID_RING , "invalid" , N2_TYPE }, // 61 + { INVALID_RING_OFFSET , "invalid" , N2_TYPE }, // 61 { N3::n3_fure , "n3_fure" , N3_TYPE }, // 62 { N3::n3_gptr , "n3_gptr" , N3_TYPE }, // 63 { N3::n3_time , "n3_time" , N3_TYPE }, // 64 @@ -995,8 +907,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { XB::xb_io0_repr , "xb_io0_repr" , XB_TYPE }, // 91 { XB::xb_io1_repr , "xb_io1_repr" , XB_TYPE }, // 92 { XB::xb_io2_repr , "xb_io2_repr" , XB_TYPE }, // 93 - { INVALID_RING , "invalid" , XB_TYPE }, // 94 - { INVALID_RING , "invalid" , XB_TYPE }, // 95 + { INVALID_RING_OFFSET , "invalid" , XB_TYPE }, // 94 + { INVALID_RING_OFFSET , "invalid" , XB_TYPE }, // 95 { MC::mc_fure , "mc_fure" , MC_TYPE }, // 96 { MC::mc_gptr , "mc_gptr" , MC_TYPE }, // 97 { MC::mc_time , "mc_time" , MC_TYPE }, // 98 @@ -1053,8 +965,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { OB3::ob3_fure , "ob3_fure" , OB3_TYPE }, // 149 { OB3::ob3_pll_bndy_bucket_3 , "ob3_pll_bndy_bucket_3" , OB3_TYPE }, // 150 { OB3::ob3_repr , "ob3_repr" , OB3_TYPE }, // 151 - { INVALID_RING , "invalid" , OB3_TYPE }, // 152 - { INVALID_RING , "invalid" , OB3_TYPE }, // 153 + { INVALID_RING_OFFSET , "invalid" , OB3_TYPE }, // 152 + { INVALID_RING_OFFSET , "invalid" , OB3_TYPE }, // 153 { PCI0::pci0_fure , "pci0_fure" , PCI0_TYPE }, // 154 { PCI0::pci0_gptr , "pci0_gptr" , PCI0_TYPE }, // 155 { PCI0::pci0_time , "pci0_time" , PCI0_TYPE }, // 156 @@ -1130,8 +1042,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EC::ec_time , "ec_time" , EC_TYPE }, // 226 { EC::ec_mode , "ec_mode" , EC_TYPE }, // 227 { EC::ec_repr , "ec_repr" , EC_TYPE }, // 228 - { INVALID_RING , "invalid" , EQ_TYPE }, // 229 - { INVALID_RING , "invalid" , EQ_TYPE }, // 230 + { INVALID_RING_OFFSET , "invalid" , EQ_TYPE }, // 229 + { INVALID_RING_OFFSET , "invalid" , EQ_TYPE }, // 230 { EC::ec_abst , "ec_abst" , EC_TYPE }, // 231 { EQ::eq_ana_bndy_bucket_26 , "eq_ana_bndy_bucket_26" , EQ_TYPE }, // 232 { EQ::eq_ana_bndy_bucket_27 , "eq_ana_bndy_bucket_27" , EQ_TYPE }, // 233 @@ -1156,6 +1068,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EC::ec_cmsk , "ec_cmsk" , EC_TYPE }, // 252 }; #endif + #ifdef __PPE__ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { @@ -1177,9 +1090,9 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { PERV::perv_pll_func , PERV_TYPE }, // 15 { PERV::perv_repr , PERV_TYPE }, // 16 { PERV::occ_repr , PERV_TYPE }, // 17 - { INVALID_RING , PERV_TYPE }, // 18 - { INVALID_RING , PERV_TYPE }, // 19 - { INVALID_RING , PERV_TYPE }, // 20 + { INVALID_RING_OFFSET , PERV_TYPE }, // 18 + { INVALID_RING_OFFSET , PERV_TYPE }, // 19 + { INVALID_RING_OFFSET , PERV_TYPE }, // 20 { N0::n0_fure , N0_TYPE }, // 21 { N0::n0_gptr , N0_TYPE }, // 22 { N0::n0_time , N0_TYPE }, // 23 @@ -1220,7 +1133,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { N2::n2_repr , N2_TYPE }, // 58 { N2::n2_cxa1_repr , N2_TYPE }, // 59 { N2::n2_psi_repr , N2_TYPE }, // 60 - { INVALID_RING , N2_TYPE }, // 61 + { INVALID_RING_OFFSET , N2_TYPE }, // 61 { N3::n3_fure , N3_TYPE }, // 62 { N3::n3_gptr , N3_TYPE }, // 63 { N3::n3_time , N3_TYPE }, // 64 @@ -1253,8 +1166,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { XB::xb_io0_repr , XB_TYPE }, // 91 { XB::xb_io1_repr , XB_TYPE }, // 92 { XB::xb_io2_repr , XB_TYPE }, // 93 - { INVALID_RING , XB_TYPE }, // 94 - { INVALID_RING , XB_TYPE }, // 95 + { INVALID_RING_OFFSET , XB_TYPE }, // 94 + { INVALID_RING_OFFSET , XB_TYPE }, // 95 { MC::mc_fure , MC_TYPE }, // 96 { MC::mc_gptr , MC_TYPE }, // 97 { MC::mc_time , MC_TYPE }, // 98 @@ -1311,8 +1224,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { OB3::ob3_fure , OB3_TYPE }, // 149 { OB3::ob3_pll_bndy_bucket_3 , OB3_TYPE }, // 150 { OB3::ob3_repr , OB3_TYPE }, // 151 - { INVALID_RING , OB3_TYPE }, // 152 - { INVALID_RING , OB3_TYPE }, // 153 + { INVALID_RING_OFFSET , OB3_TYPE }, // 152 + { INVALID_RING_OFFSET , OB3_TYPE }, // 153 { PCI0::pci0_fure , PCI0_TYPE }, // 154 { PCI0::pci0_gptr , PCI0_TYPE }, // 155 { PCI0::pci0_time , PCI0_TYPE }, // 156 @@ -1388,8 +1301,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EC::ec_time , EC_TYPE }, // 226 { EC::ec_mode , EC_TYPE }, // 227 { EC::ec_repr , EC_TYPE }, // 228 - { INVALID_RING , EQ_TYPE }, // 229 - { INVALID_RING , EQ_TYPE }, // 230 + { INVALID_RING_OFFSET , EQ_TYPE }, // 229 + { INVALID_RING_OFFSET , EQ_TYPE }, // 230 { EC::ec_abst , EC_TYPE }, // 231 { EQ::eq_ana_bndy_bucket_26 , EQ_TYPE }, // 232 { EQ::eq_ana_bndy_bucket_27 , EQ_TYPE }, // 233 @@ -1416,15 +1329,15 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = #endif // returns our own chiplet enum value for this ringId -CHIPLET_TYPE +ChipletType_t p9_ringid_get_chiplet( - RingID i_ringId); + RingId_t i_ringId); // returns data structures defined for chiplet type // as determined by ringId void p9_ringid_get_chiplet_properties( - CHIPLET_TYPE i_chiplet, + ChipletType_t i_chiplet, CHIPLET_DATA** o_cpltData, GenRingIdList** o_ringComm, GenRingIdList** o_ringInst, @@ -1434,6 +1347,6 @@ p9_ringid_get_chiplet_properties( // returns properties of a ring as determined by ringId GenRingIdList* p9_ringid_get_ring_properties( - RingID i_ringId); + RingId_t i_ringId); #endif diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h index 533a20db..ab0824a6 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h +++ b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h @@ -22,8 +22,8 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#ifndef _P9_RINGID_ENUM_H_ -#define _P9_RINGID_ENUM_H_ +#ifndef _P9_RING_ID_H_ +#define _P9_RING_ID_H_ /// /// @enum RingID @@ -38,329 +38,330 @@ enum RingID // Rings needed for SBE - Start //***************************** // Perv Chiplet Rings - perv_fure = 0, - perv_gptr = 1, - perv_time = 2, - occ_fure = 3, - occ_gptr = 4, - occ_time = 5, - perv_ana_func = 6, - perv_ana_gptr = 7, - perv_pll_gptr = 8, - perv_pll_bndy = 9, - perv_pll_bndy_bucket_1 = 10, - perv_pll_bndy_bucket_2 = 11, - perv_pll_bndy_bucket_3 = 12, - perv_pll_bndy_bucket_4 = 13, - perv_pll_bndy_bucket_5 = 14, - perv_pll_func = 15, - perv_repr = 16, - occ_repr = 17, + perv_fure = 0, //0x00 + perv_gptr = 1, //0x01 + perv_time = 2, //0x02 + occ_fure = 3, //0x03 + occ_gptr = 4, //0x04 + occ_time = 5, //0x05 + perv_ana_func = 6, //0x06 + perv_ana_gptr = 7, //0x07 + perv_pll_gptr = 8, //0x08 + perv_pll_bndy = 9, //0x09 + perv_pll_bndy_bucket_1 = 10, //0x0A + perv_pll_bndy_bucket_2 = 11, //0x0B + perv_pll_bndy_bucket_3 = 12, //0x0C + perv_pll_bndy_bucket_4 = 13, //0x0D + perv_pll_bndy_bucket_5 = 14, //0x0E + perv_pll_func = 15, //0x0F + perv_repr = 16, //0x10 + occ_repr = 17, //0x11 // values 18-20 unused // Nest Chiplet Rings - N0 - n0_fure = 21, - n0_gptr = 22, - n0_time = 23, - n0_nx_fure = 24, - n0_nx_gptr = 25, - n0_nx_time = 26, - n0_cxa0_fure = 27, - n0_cxa0_gptr = 28, - n0_cxa0_time = 29, - n0_repr = 30, - n0_nx_repr = 31, - n0_cxa0_repr = 32, + n0_fure = 21, //0x15 + n0_gptr = 22, //0x16 + n0_time = 23, //0x17 + n0_nx_fure = 24, //0x18 + n0_nx_gptr = 25, //0x19 + n0_nx_time = 26, //0x1A + n0_cxa0_fure = 27, //0x1B + n0_cxa0_gptr = 28, //0x1C + n0_cxa0_time = 29, //0x1D + n0_repr = 30, //0x1E + n0_nx_repr = 31, //0x1F + n0_cxa0_repr = 32, //0x20 // Nest Chiplet Rings - N1 - n1_fure = 33, - n1_gptr = 34, - n1_time = 35, - n1_ioo0_fure = 36, - n1_ioo0_gptr = 37, - n1_ioo0_time = 38, - n1_ioo1_fure = 39, - n1_ioo1_gptr = 40, - n1_ioo1_time = 41, - n1_mcs23_fure = 42, - n1_mcs23_gptr = 43, - n1_mcs23_time = 44, - n1_repr = 45, - n1_ioo0_repr = 46, - n1_ioo1_repr = 47, - n1_mcs23_repr = 48, + n1_fure = 33, //0x21 + n1_gptr = 34, //0x22 + n1_time = 35, //0x23 + n1_ioo0_fure = 36, //0x24 + n1_ioo0_gptr = 37, //0x25 + n1_ioo0_time = 38, //0x26 + n1_ioo1_fure = 39, //0x27 + n1_ioo1_gptr = 40, //0x28 + n1_ioo1_time = 41, //0x29 + n1_mcs23_fure = 42, //0x2A + n1_mcs23_gptr = 43, //0x2B + n1_mcs23_time = 44, //0x2C + n1_repr = 45, //0x2D + n1_ioo0_repr = 46, //0x2E + n1_ioo1_repr = 47, //0x2F + n1_mcs23_repr = 48, //0x30 // Nest Chiplet Rings - N2 - n2_fure = 49, - n2_gptr = 50, - n2_time = 51, - n2_cxa1_fure = 52, - n2_cxa1_gptr = 53, - n2_cxa1_time = 54, - n2_psi_fure = 55, - n2_psi_gptr = 56, - n2_psi_time = 57, - n2_repr = 58, - n2_cxa1_repr = 59, - n2_psi_repr = 60, + n2_fure = 49, //0x31 + n2_gptr = 50, //0x32 + n2_time = 51, //0x33 + n2_cxa1_fure = 52, //0x34 + n2_cxa1_gptr = 53, //0x35 + n2_cxa1_time = 54, //0x36 + n2_psi_fure = 55, //0x37 + n2_psi_gptr = 56, //0x38 + n2_psi_time = 57, //0x39 + n2_repr = 58, //0x3A + n2_cxa1_repr = 59, //0x3B + n2_psi_repr = 60, //0x3C // values 61 unused // Nest Chiplet Rings - N3 - n3_fure = 62, - n3_gptr = 63, - n3_time = 64, - n3_mcs01_fure = 65, - n3_mcs01_gptr = 66, - n3_mcs01_time = 67, - n3_np_fure = 68, - n3_np_gptr = 69, - n3_np_time = 70, - n3_repr = 71, - n3_mcs01_repr = 72, - n3_np_repr = 73, - n3_br_fure = 74, + n3_fure = 62, //0x3E + n3_gptr = 63, //0x3F + n3_time = 64, //0x40 + n3_mcs01_fure = 65, //0x41 + n3_mcs01_gptr = 66, //0x42 + n3_mcs01_time = 67, //0x43 + n3_np_fure = 68, //0x44 + n3_np_gptr = 69, //0x45 + n3_np_time = 70, //0x46 + n3_repr = 71, //0x47 + n3_mcs01_repr = 72, //0x48 + n3_np_repr = 73, //0x49 + n3_br_fure = 74, //0x4A // X-Bus Chiplet Rings // Common - apply to all instances of X-Bus - xb_fure = 75, - xb_gptr = 76, - xb_time = 77, - xb_io0_fure = 78, - xb_io0_gptr = 79, - xb_io0_time = 80, - xb_io1_fure = 81, - xb_io1_gptr = 82, - xb_io1_time = 83, - xb_io2_fure = 84, - xb_io2_gptr = 85, - xb_io2_time = 86, - xb_pll_gptr = 87, - xb_pll_bndy = 88, - xb_pll_func = 89, + xb_fure = 75, //0x4B + xb_gptr = 76, //0x4C + xb_time = 77, //0x4D + xb_io0_fure = 78, //0x4E + xb_io0_gptr = 79, //0x4F + xb_io0_time = 80, //0x50 + xb_io1_fure = 81, //0x51 + xb_io1_gptr = 82, //0x52 + xb_io1_time = 83, //0x53 + xb_io2_fure = 84, //0x54 + xb_io2_gptr = 85, //0x55 + xb_io2_time = 86, //0x56 + xb_pll_gptr = 87, //0x57 + xb_pll_bndy = 88, //0x58 + xb_pll_func = 89, //0x59 // X-Bus Chiplet Rings // X0, X1 and X2 instance specific Rings - xb_repr = 90, - xb_io0_repr = 91, - xb_io1_repr = 92, - xb_io2_repr = 93, + xb_repr = 90, //0x5A + xb_io0_repr = 91, //0x5B + xb_io1_repr = 92, //0x5C + xb_io2_repr = 93, //0x5D // values 94-95 unused // MC Chiplet Rings // Common - apply to all instances of MC - mc_fure = 96, - mc_gptr = 97, - mc_time = 98, - mc_iom01_fure = 99, - mc_iom01_gptr = 100, - mc_iom01_time = 101, - mc_iom23_fure = 102, - mc_iom23_gptr = 103, - mc_iom23_time = 104, - mc_pll_gptr = 105, - mc_pll_bndy = 106, - mc_pll_bndy_bucket_1 = 107, - mc_pll_bndy_bucket_2 = 108, - mc_pll_bndy_bucket_3 = 109, - mc_pll_bndy_bucket_4 = 110, - mc_pll_bndy_bucket_5 = 111, - mc_pll_func = 112, + mc_fure = 96, //0x60 + mc_gptr = 97, //0x61 + mc_time = 98, //0x62 + mc_iom01_fure = 99, //0x63 + mc_iom01_gptr = 100, //0x64 + mc_iom01_time = 101, //0x65 + mc_iom23_fure = 102, //0x66 + mc_iom23_gptr = 103, //0x67 + mc_iom23_time = 104, //0x68 + mc_pll_gptr = 105, //0x69 + mc_pll_bndy = 106, //0x6A + mc_pll_bndy_bucket_1 = 107, //0x6B + mc_pll_bndy_bucket_2 = 108, //0x6C + mc_pll_bndy_bucket_3 = 109, //0x6D + mc_pll_bndy_bucket_4 = 110, //0x6E + mc_pll_bndy_bucket_5 = 111, //0x6F + mc_pll_func = 112, //0x70 // MC Chiplet Rings // MC01 and MC23 instance specific Rings - mc_repr = 113, - mc_iom01_repr = 114, - mc_iom23_repr = 115, + mc_repr = 113, //0x71 + mc_iom01_repr = 114, //0x72 + mc_iom23_repr = 115, //0x73 // OB0 Chiplet Rings - ob0_pll_bndy = 116, - ob0_pll_bndy_bucket_1 = 117, - ob0_pll_bndy_bucket_2 = 118, - ob0_gptr = 119, - ob0_time = 120, - ob0_pll_gptr = 121, - ob0_fure = 122, - ob0_pll_bndy_bucket_3 = 123, + ob0_pll_bndy = 116, //0x74 + ob0_pll_bndy_bucket_1 = 117, //0x75 + ob0_pll_bndy_bucket_2 = 118, //0x76 + ob0_gptr = 119, //0x77 + ob0_time = 120, //0x78 + ob0_pll_gptr = 121, //0x79 + ob0_fure = 122, //0x7A + ob0_pll_bndy_bucket_3 = 123, //0x7B // OB0 Chiplet instance specific Ring - ob0_repr = 124, + ob0_repr = 124, //0x7C // OB1 Chiplet Rings - ob1_pll_bndy = 125, - ob1_pll_bndy_bucket_1 = 126, - ob1_pll_bndy_bucket_2 = 127, - ob1_gptr = 128, - ob1_time = 129, - ob1_pll_gptr = 130, - ob1_fure = 131, - ob1_pll_bndy_bucket_3 = 132, + ob1_pll_bndy = 125, //0x7D + ob1_pll_bndy_bucket_1 = 126, //0x7E + ob1_pll_bndy_bucket_2 = 127, //0x7F + ob1_gptr = 128, //0x80 + ob1_time = 129, //0x81 + ob1_pll_gptr = 130, //0x82 + ob1_fure = 131, //0x83 + ob1_pll_bndy_bucket_3 = 132, //0x84 // OB1 Chiplet instance specific Ring - ob1_repr = 133, + ob1_repr = 133, //0x85 // OB2 Chiplet Rings - ob2_pll_bndy = 134, - ob2_pll_bndy_bucket_1 = 135, - ob2_pll_bndy_bucket_2 = 136, - ob2_gptr = 137, - ob2_time = 138, - ob2_pll_gptr = 139, - ob2_fure = 140, - ob2_pll_bndy_bucket_3 = 141, + ob2_pll_bndy = 134, //0x86 + ob2_pll_bndy_bucket_1 = 135, //0x87 + ob2_pll_bndy_bucket_2 = 136, //0x88 + ob2_gptr = 137, //0x89 + ob2_time = 138, //0x8A + ob2_pll_gptr = 139, //0x8B + ob2_fure = 140, //0x8C + ob2_pll_bndy_bucket_3 = 141, //0x8D // OB2 Chiplet instance specific Ring - ob2_repr = 142, + ob2_repr = 142, //0x8E // OB3 Chiplet Rings - ob3_pll_bndy = 143, - ob3_pll_bndy_bucket_1 = 144, - ob3_pll_bndy_bucket_2 = 145, - ob3_gptr = 146, - ob3_time = 147, - ob3_pll_gptr = 148, - ob3_fure = 149, - ob3_pll_bndy_bucket_3 = 150, + ob3_pll_bndy = 143, //0x8F + ob3_pll_bndy_bucket_1 = 144, //0x90 + ob3_pll_bndy_bucket_2 = 145, //0x91 + ob3_gptr = 146, //0x92 + ob3_time = 147, //0x93 + ob3_pll_gptr = 148, //0x94 + ob3_fure = 149, //0x95 + ob3_pll_bndy_bucket_3 = 150, //0x96 // OB3 Chiplet instance specific Rings - ob3_repr = 151, + ob3_repr = 151, //0x97 // values 152-153 unused // PCI Chiplet Rings // PCI0 Common Rings - pci0_fure = 154, - pci0_gptr = 155, - pci0_time = 156, - pci0_pll_bndy = 157, - pci0_pll_gptr = 158, + pci0_fure = 154, //0x9A + pci0_gptr = 155, //0x9B + pci0_time = 156, //0x9C + pci0_pll_bndy = 157, //0x9D + pci0_pll_gptr = 158, //0x9E // Instance specific Rings - pci0_repr = 159, + pci0_repr = 159, //0x9F // PCI1 Common Rings - pci1_fure = 160, - pci1_gptr = 161, - pci1_time = 162, - pci1_pll_bndy = 163, - pci1_pll_gptr = 164, + pci1_fure = 160, //0xA0 + pci1_gptr = 161, //0xA1 + pci1_time = 162, //0xA2 + pci1_pll_bndy = 163, //0xA3 + pci1_pll_gptr = 164, //0xA4 // Instance specific Rings - pci1_repr = 165, + pci1_repr = 165, //0xA5 // PCI2 Common Rings - pci2_fure = 166, - pci2_gptr = 167, - pci2_time = 168, - pci2_pll_bndy = 169, - pci2_pll_gptr = 170, + pci2_fure = 166, //0xA6 + pci2_gptr = 167, //0xA7 + pci2_time = 168, //0xA8 + pci2_pll_bndy = 169, //0xA9 + pci2_pll_gptr = 170, //0xAA // Instance specific Rings - pci2_repr = 171, + pci2_repr = 171, //0xAB // Quad Chiplet Rings // Common - apply to all Quad instances - eq_fure = 172, - eq_gptr = 173, - eq_time = 174, - eq_inex = 175, - ex_l3_fure = 176, - ex_l3_gptr = 177, - ex_l3_time = 178, - ex_l2_mode = 179, - ex_l2_fure = 180, - ex_l2_gptr = 181, - ex_l2_time = 182, - ex_l3_refr_fure = 183, - ex_l3_refr_gptr = 184, - ex_l3_refr_time = 185, - eq_ana_func = 186, - eq_ana_gptr = 187, - eq_dpll_func = 188, - eq_dpll_gptr = 189, - eq_dpll_mode = 190, - eq_ana_bndy = 191, - eq_ana_bndy_bucket_0 = 192, - eq_ana_bndy_bucket_1 = 193, - eq_ana_bndy_bucket_2 = 194, - eq_ana_bndy_bucket_3 = 195, - eq_ana_bndy_bucket_4 = 196, - eq_ana_bndy_bucket_5 = 197, - eq_ana_bndy_bucket_6 = 198, - eq_ana_bndy_bucket_7 = 199, - eq_ana_bndy_bucket_8 = 200, - eq_ana_bndy_bucket_9 = 201, - eq_ana_bndy_bucket_10 = 202, - eq_ana_bndy_bucket_11 = 203, - eq_ana_bndy_bucket_12 = 204, - eq_ana_bndy_bucket_13 = 205, - eq_ana_bndy_bucket_14 = 206, - eq_ana_bndy_bucket_15 = 207, - eq_ana_bndy_bucket_16 = 208, - eq_ana_bndy_bucket_17 = 209, - eq_ana_bndy_bucket_18 = 210, - eq_ana_bndy_bucket_19 = 211, - eq_ana_bndy_bucket_20 = 212, - eq_ana_bndy_bucket_21 = 213, - eq_ana_bndy_bucket_22 = 214, - eq_ana_bndy_bucket_23 = 215, - eq_ana_bndy_bucket_24 = 216, - eq_ana_bndy_bucket_25 = 217, - eq_ana_bndy_bucket_l3dcc = 218, - eq_ana_mode = 219, + eq_fure = 172, //0xAC + eq_gptr = 173, //0xAD + eq_time = 174, //0xAE + eq_inex = 175, //0xAF + ex_l3_fure = 176, //0xB0 + ex_l3_gptr = 177, //0xB1 + ex_l3_time = 178, //0xB2 + ex_l2_mode = 179, //0xB3 + ex_l2_fure = 180, //0xB4 + ex_l2_gptr = 181, //0xB5 + ex_l2_time = 182, //0xB6 + ex_l3_refr_fure = 183, //0xB7 + ex_l3_refr_gptr = 184, //0xB8 + ex_l3_refr_time = 185, //0xB9 + eq_ana_func = 186, //0xBA + eq_ana_gptr = 187, //0xBB + eq_dpll_func = 188, //0xBC + eq_dpll_gptr = 189, //0xBD + eq_dpll_mode = 190, //0xBE + eq_ana_bndy = 191, //0xBF + eq_ana_bndy_bucket_0 = 192, //0xC0 + eq_ana_bndy_bucket_1 = 193, //0xC1 + eq_ana_bndy_bucket_2 = 194, //0xC2 + eq_ana_bndy_bucket_3 = 195, //0xC3 + eq_ana_bndy_bucket_4 = 196, //0xC4 + eq_ana_bndy_bucket_5 = 197, //0xC5 + eq_ana_bndy_bucket_6 = 198, //0xC6 + eq_ana_bndy_bucket_7 = 199, //0xC7 + eq_ana_bndy_bucket_8 = 200, //0xC8 + eq_ana_bndy_bucket_9 = 201, //0xC9 + eq_ana_bndy_bucket_10 = 202, //0xCA + eq_ana_bndy_bucket_11 = 203, //0xCB + eq_ana_bndy_bucket_12 = 204, //0xCC + eq_ana_bndy_bucket_13 = 205, //0xCD + eq_ana_bndy_bucket_14 = 206, //0xCE + eq_ana_bndy_bucket_15 = 207, //0xCF + eq_ana_bndy_bucket_16 = 208, //0xD0 + eq_ana_bndy_bucket_17 = 209, //0xD1 + eq_ana_bndy_bucket_18 = 210, //0xD2 + eq_ana_bndy_bucket_19 = 211, //0xD3 + eq_ana_bndy_bucket_20 = 212, //0xD4 + eq_ana_bndy_bucket_21 = 213, //0xD5 + eq_ana_bndy_bucket_22 = 214, //0xD6 + eq_ana_bndy_bucket_23 = 215, //0xD7 + eq_ana_bndy_bucket_24 = 216, //0xD8 + eq_ana_bndy_bucket_25 = 217, //0xD9 + eq_ana_bndy_bucket_l3dcc = 218, //0xDA + eq_ana_mode = 219, //0xDB // Quad Chiplet Rings // EQ0 - EQ5 instance specific Rings - eq_repr = 220, - ex_l3_repr = 221, - ex_l2_repr = 222, - ex_l3_refr_repr = 223, + eq_repr = 220, //0xDC + ex_l3_repr = 221, //0xDD + ex_l2_repr = 222, //0xDE + ex_l3_refr_repr = 223, //0xDF // Core Chiplet Rings // Common - apply to all Core instances - ec_func = 224, - ec_gptr = 225, - ec_time = 226, - ec_mode = 227, + ec_func = 224, //0xE0 + ec_gptr = 225, //0xE1 + ec_time = 226, //0xE2 + ec_mode = 227, //0xE3 // Core Chiplet Rings // EC0 - EC23 instance specific Ring - ec_repr = 228, + ec_repr = 228, //0xE4 // Values 229-230 unused // Core Chiplet Rings // ABIST engine mode - ec_abst = 231, + ec_abst = 231, //0xE7 // Additional rings for Nimbus DD2 - eq_ana_bndy_bucket_26 = 232, - eq_ana_bndy_bucket_27 = 233, - eq_ana_bndy_bucket_28 = 234, - eq_ana_bndy_bucket_29 = 235, - eq_ana_bndy_bucket_30 = 236, - eq_ana_bndy_bucket_31 = 237, - eq_ana_bndy_bucket_32 = 238, - eq_ana_bndy_bucket_33 = 239, - eq_ana_bndy_bucket_34 = 240, - eq_ana_bndy_bucket_35 = 241, - eq_ana_bndy_bucket_36 = 242, - eq_ana_bndy_bucket_37 = 243, - eq_ana_bndy_bucket_38 = 244, - eq_ana_bndy_bucket_39 = 245, - eq_ana_bndy_bucket_40 = 246, - eq_ana_bndy_bucket_41 = 247, + eq_ana_bndy_bucket_26 = 232, //0xE8 + eq_ana_bndy_bucket_27 = 233, //0xE9 + eq_ana_bndy_bucket_28 = 234, //0xEA + eq_ana_bndy_bucket_29 = 235, //0xEB + eq_ana_bndy_bucket_30 = 236, //0xEC + eq_ana_bndy_bucket_31 = 237, //0xED + eq_ana_bndy_bucket_32 = 238, //0xEE + eq_ana_bndy_bucket_33 = 239, //0xEF + eq_ana_bndy_bucket_34 = 240, //0xF0 + eq_ana_bndy_bucket_35 = 241, //0xF1 + eq_ana_bndy_bucket_36 = 242, //0xF2 + eq_ana_bndy_bucket_37 = 243, //0xF3 + eq_ana_bndy_bucket_38 = 244, //0xF4 + eq_ana_bndy_bucket_39 = 245, //0xF5 + eq_ana_bndy_bucket_40 = 246, //0xF6 + eq_ana_bndy_bucket_41 = 247, //0xF7 //EQ Inex ring bucket - eq_inex_bucket_1 = 248, - eq_inex_bucket_2 = 249, - eq_inex_bucket_3 = 250, - eq_inex_bucket_4 = 251, + eq_inex_bucket_1 = 248, //0xF8 + eq_inex_bucket_2 = 249, //0xF9 + eq_inex_bucket_3 = 250, //0xFA + eq_inex_bucket_4 = 251, //0xFB // CMSK ring - ec_cmsk = 252, + ec_cmsk = 252, //0xFC //*************************** // Rings needed for SBE - End //*************************** - NUM_RING_IDS // This shoud always be the last constant -}; // end of enum RingID + NUM_RING_IDS -#endif // _P9_RINGID_ENUM_H_ +}; // enum RingID + +#endif // _P9_RING_ID_H_ diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H index 400e8a37..5588597e 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H +++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H @@ -37,13 +37,13 @@ #endif #include <stdlib.h> #include <string.h> -#include <p9_ring_id.h> +#include <common_ringId.H> // MVPD Ring ID list structure. typedef struct { const char* ringName; - RingID ringId; + RingId_t ringId; uint8_t instanceIdMin; // the min instanceId uint8_t instanceIdMax; // the max instanceId uint8_t vpdKeyword; @@ -97,7 +97,4 @@ enum VpdRingClass }; -#define MVPD_END_OF_DATA_MAGIC (uint32_t)0x454E4400 // "END " - - #endif diff --git a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H index ef4d8825..ec5710e6 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H +++ b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H @@ -32,6 +32,7 @@ #ifndef __ASSEMBLER__ #include <stdint.h> +#include <common_ringId.H> /// Compressed Scan Chain Data Structure Format /// @@ -75,7 +76,7 @@ typedef struct uint8_t iv_version; uint8_t iv_type; uint16_t iv_size; - uint16_t iv_ringId; + RingId_t iv_ringId; uint32_t iv_scanAddr; } CompressedScanData; @@ -118,8 +119,8 @@ compressed_scan_data_translate(CompressedScanData* o_data, /// /// \param[in] i_scanAddr The 32-bit scan address. /// -/// \param[in] i_ringId The ring ID that uniquely identifies the ring name of -/// a repair ring. (See p9_ring_id.h for more info.) +/// \param[in] i_ringId The ring ID that uniquely identifies the ring. (See +/// <ChipType> ring ID header files for more info.) /// /// This API is required for integration with PHYP which does not support /// malloc(). Applications in environments supporting malloc() can use @@ -139,7 +140,7 @@ _rs4_compress(CompressedScanData* io_rs4, const uint8_t* i_care_str, const uint32_t i_length, const uint32_t i_scanAddr, - const uint16_t i_ringId); + const RingId_t i_ringId); /// Compress a scan string using the RS4 compression algorithm @@ -163,8 +164,8 @@ _rs4_compress(CompressedScanData* io_rs4, /// /// \param[in] i_scanAddr The 32-bit scan address. /// -/// \param[in] i_ringId The ring ID that uniquely identifies the ring name of -/// a repair ring. (See p9_ring_id.c for more info.) +/// \param[in] i_ringId The ring ID that uniquely identifies the ring. (See +/// <ChipType> ring ID header files for more info.) /// /// \returns See \ref scan_compression_codes int @@ -173,7 +174,7 @@ rs4_compress(CompressedScanData** o_rs4, const uint8_t* i_care_str, const uint32_t i_length, const uint32_t i_scanAddr, - const uint8_t i_ringId); + const RingId_t i_ringId); /// Decompress a scan string compressed using the RS4 compression algorithm diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C index 827621a4..6191af73 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_tor.C +++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C @@ -42,11 +42,13 @@ // it is used pass by value // #include "p9_tor.H" +namespace P9_RID +{ +#include "p9_ringId.H" +} #include "p9_scan_compression.H" #include "p9_infrastruct_help.H" -namespace P9_TOR -{ // These strings must adhere precisely to the enum of PpeType. const char* ppeTypeName[] = { "SBE", @@ -70,7 +72,7 @@ const char* ringVariantName[] = { "BASE", ////////////////////////////////////////////////////////////////////////////////// static int get_ring_from_sbe_image( void* i_ringSection, // Ring section ptr - RingID i_ringId, // Ring ID + RingId_t i_ringId, // Ring ID uint16_t i_ddLevelOffset, // DD level offset (wrt i_ringSection) RingType_t& io_RingType, // Common, Instance RingVariant_t i_RingVariant, // Base,CC, RL, Ovrd, Ovly @@ -127,12 +129,15 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section ppe_cplt_offset = ppe_offset + sizeof(TorHeader_t); // Looper for each SBE chiplet - for (int iCplt = 0; iCplt < SBE_NOOF_CHIPLETS; iCplt++) + for (ChipletType_t iCplt = 0; iCplt < P9_RID::SBE_NOOF_CHIPLETS; iCplt++) { - p9_ringid_get_chiplet_properties( - (CHIPLET_TYPE)iCplt, - &l_cpltData, &ring_id_list_common, &ring_id_list_instance, - &ring_variant_order, &l_num_variant); + P9_RID::p9_ringid_get_chiplet_properties( + iCplt, + &l_cpltData, + &ring_id_list_common, + &ring_id_list_instance, + &ring_variant_order, + &l_num_variant); if (!ring_id_list_common) { @@ -166,12 +171,12 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section } if ( ( strcmp( (ring_id_list_common + i)->ringName, - RING_PROPERTIES[i_ringId].iv_name) == 0 ) && + P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0 ) && ( i_RingVariant == ring_variant_order->variant[iVariant] || torMagic == TOR_MAGIC_OVRD || torMagic == TOR_MAGIC_OVLY ) ) { - strcpy(o_ringName, RING_PROPERTIES[i_ringId].iv_name); + strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name); acc_offset = dd_level_offset + ppe_cplt_offset + iCplt * sizeof(TorPpeBlock_t); @@ -192,7 +197,7 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section ring_offset; ring_size = be16toh( ((CompressedScanData*) ((uint8_t*)i_ringSection + acc_offset))->iv_size ); - io_RingType = COMMON; + io_RingType = COMMON_RING; if (ring_offset) { @@ -298,14 +303,14 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section } if (strcmp( (ring_id_list_instance + j)->ringName, - RING_PROPERTIES[i_ringId].iv_name) == 0) + P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0) { if ( io_instanceId >= (ring_id_list_instance + 0)->instanceIdMin && io_instanceId <= (ring_id_list_instance + 0)->instanceIdMax ) { if (i == io_instanceId && i_RingVariant == ring_variant_order->variant[iVariant]) { - strcpy(o_ringName, RING_PROPERTIES[i_ringId].iv_name); + strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name); acc_offset = dd_level_offset + ppe_cplt_offset + @@ -332,7 +337,7 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section ring_size = be16toh( ((CompressedScanData*) ((uint8_t*)i_ringSection + acc_offset))->iv_size ); - io_RingType = INSTANCE; + io_RingType = INSTANCE_RING; if (ring_offset) { @@ -455,7 +460,7 @@ int get_ring_from_sbe_image( void* i_ringSection, // Ring section /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// static int get_ring_from_sgpe_image ( void* i_ringSection, // Ring section ptr - RingID i_ringId, // Ring ID + RingId_t i_ringId, // Ring ID uint16_t i_ddLevelOffset, // DD level offset RingType_t& io_RingType, // Common, Instance RingVariant_t i_RingVariant, // Base,CC, RL, Ovrd, Ovly @@ -466,7 +471,7 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio char* o_ringName, // Name of ring uint32_t i_dbgl ) // Debug option { - uint32_t torMagic; + uint32_t torMagic; uint32_t acc_offset = 0; // Accumulating offset to next TOR offset slot uint32_t ring_offset = 0; uint16_t chiplet_offset = 0; @@ -505,13 +510,13 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio GenRingIdList* ring_id_list_common = NULL; GenRingIdList* ring_id_list_instance = NULL; - uint8_t l_num_variant = (uint8_t)sizeof(EQ::RingVariants) / sizeof(uint16_t); - ring_id_list_common = (GenRingIdList*) EQ::RING_ID_LIST_COMMON; - ring_id_list_instance = (GenRingIdList*) EQ::RING_ID_LIST_INSTANCE; + uint8_t l_num_variant = (uint8_t)sizeof(P9_RID::EQ::RingVariants) / sizeof(uint16_t); + ring_id_list_common = (GenRingIdList*) P9_RID::EQ::RING_ID_LIST_COMMON; + ring_id_list_instance = (GenRingIdList*) P9_RID::EQ::RING_ID_LIST_INSTANCE; uint32_t local = 0; - for (uint8_t i = 0; i < EQ::g_eqData.iv_num_common_rings ; i++) + for (uint8_t i = 0; i < P9_RID::EQ::g_eqData.iv_num_common_rings ; i++) { for (uint8_t j = 0; j < l_num_variant ; j++) { @@ -522,9 +527,9 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio } if ((strcmp( (ring_id_list_common + i)->ringName, - RING_PROPERTIES[i_ringId].iv_name) == 0) && ( i_RingVariant == j )) + P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0) && ( i_RingVariant == j )) { - strcpy(o_ringName, RING_PROPERTIES[i_ringId].iv_name); + strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name); uint32_t var = 0 + i_ddLevelOffset + ppe_cplt_offset; int temp1 = var / sizeof(uint32_t); ring_offset = *((uint32_t*)i_ringSection + temp1); @@ -540,7 +545,7 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio ringSize = be16toh( ((CompressedScanData*) ((uint8_t*)i_ringSection + var))->iv_size ); - io_RingType = COMMON; + io_RingType = COMMON_RING; if (chiplet_offset) { @@ -623,7 +628,7 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio for(uint8_t i = (ring_id_list_instance + 0)->instanceIdMin; i < (ring_id_list_instance + 0)->instanceIdMax + 1 ; i++) { - for (uint8_t j = 0; j < EQ::g_eqData.iv_num_instance_rings; j++) + for (uint8_t j = 0; j < P9_RID::EQ::g_eqData.iv_num_instance_rings; j++) { for(uint8_t k = 0; k < l_num_variant ; k++) { @@ -634,14 +639,14 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio } if (strcmp( (ring_id_list_instance + j)->ringName, - RING_PROPERTIES[i_ringId].iv_name) == 0) + P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0) { if ( io_instanceId >= (ring_id_list_instance + 0)->instanceIdMin && io_instanceId <= (ring_id_list_instance + 0)->instanceIdMax ) { if ( i == io_instanceId && k == i_RingVariant ) { - strcpy(o_ringName, RING_PROPERTIES[i_ringId].iv_name); + strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name); uint32_t var = CPLT_OFFSET_SIZE + i_ddLevelOffset + ppe_cplt_offset; int temp1 = var / sizeof(uint32_t); ring_offset = *((uint32_t*)i_ringSection + temp1); @@ -657,7 +662,7 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio ringSize = be16toh( ((CompressedScanData*) ((uint8_t*)i_ringSection + var))->iv_size ); - io_RingType = INSTANCE; + io_RingType = INSTANCE_RING; if (chiplet_offset) { @@ -766,7 +771,7 @@ int get_ring_from_sgpe_image ( void* i_ringSection, // Ring sectio ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// static int get_ring_from_cme_image ( void* i_ringSection, // Ring section ptr - RingID i_ringId, // Ring ID + RingId_t i_ringId, // Ring ID uint16_t i_ddLevelOffset, // DD level offset RingType_t& io_RingType, // Common, Instance RingVariant_t i_RingVariant, // Base,CC, RL, Ovrd, Ovly @@ -812,13 +817,13 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section GenRingIdList* ring_id_list_common = NULL; GenRingIdList* ring_id_list_instance = NULL; - uint8_t l_num_variant = (uint8_t)sizeof(EC::RingVariants) / sizeof(uint16_t); - ring_id_list_common = (GenRingIdList*) EC::RING_ID_LIST_COMMON; - ring_id_list_instance = (GenRingIdList*) EC::RING_ID_LIST_INSTANCE; + uint8_t l_num_variant = (uint8_t)sizeof(P9_RID::EC::RingVariants) / sizeof(uint16_t); + ring_id_list_common = (GenRingIdList*) P9_RID::EC::RING_ID_LIST_COMMON; + ring_id_list_instance = (GenRingIdList*) P9_RID::EC::RING_ID_LIST_INSTANCE; uint32_t local = 0; - for (uint8_t i = 0; i < EC::g_ecData.iv_num_common_rings ; i++) + for (uint8_t i = 0; i < P9_RID::EC::g_ecData.iv_num_common_rings ; i++) { for (uint8_t j = 0; j < l_num_variant ; j++) { @@ -829,9 +834,9 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section } if ((strcmp( (ring_id_list_common + i)->ringName, - RING_PROPERTIES[i_ringId].iv_name) == 0) && ( i_RingVariant == j )) + P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0) && ( i_RingVariant == j )) { - strcpy(o_ringName, RING_PROPERTIES[i_ringId].iv_name); + strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name); uint32_t var = 0 + i_ddLevelOffset + ppe_cplt_offset; int temp1 = var / sizeof(uint32_t); ring_offset = *((uint32_t*)i_ringSection + temp1); @@ -847,7 +852,7 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section ringSize = be16toh( ((CompressedScanData*) ((uint8_t*)i_ringSection + var))->iv_size ); - io_RingType = COMMON; + io_RingType = COMMON_RING; if (chiplet_offset) { @@ -930,7 +935,7 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section i <= (ring_id_list_instance + 0)->instanceIdMax; i++ ) { - for (uint8_t j = 0; j < EC::g_ecData.iv_num_instance_rings; j++) + for (uint8_t j = 0; j < P9_RID::EC::g_ecData.iv_num_instance_rings; j++) { for (uint8_t k = 0; k < l_num_variant ; k++) { @@ -941,14 +946,14 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section } if (strcmp( (ring_id_list_instance + j)->ringName, - RING_PROPERTIES[i_ringId].iv_name) == 0) + P9_RID::RING_PROPERTIES[i_ringId].iv_name) == 0) { if ( io_instanceId >= (ring_id_list_instance + 0)->instanceIdMin && io_instanceId <= (ring_id_list_instance + 0)->instanceIdMax ) { if ( i == io_instanceId && k == i_RingVariant ) { - strcpy(o_ringName, RING_PROPERTIES[i_ringId].iv_name); + strcpy(o_ringName, P9_RID::RING_PROPERTIES[i_ringId].iv_name); uint32_t var = i_ddLevelOffset + ppe_cplt_offset + CPLT_OFFSET_SIZE; int temp1 = var / CPLT_OFFSET_SIZE; ring_offset = *((uint32_t*)i_ringSection + temp1); @@ -964,7 +969,7 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section ringSize = be16toh( ((CompressedScanData*) ((uint8_t*)i_ringSection + var))->iv_size ); - io_RingType = INSTANCE; + io_RingType = INSTANCE_RING; if (chiplet_offset) { @@ -1069,7 +1074,7 @@ int get_ring_from_cme_image ( void* i_ringSection, // Ring section /// ////////////////////////////////////////////////////////////////////////////////////////// int tor_access_ring( void* i_ringSection, // Ring section ptr - RingID i_ringId, // Ring ID + RingId_t i_ringId, // Ring ID uint16_t i_ddLevel, // DD level PpeType_t i_PpeType, // SBE, CME, SGPE RingType_t& io_RingType, // Common, Instance @@ -1159,7 +1164,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr torMagic == TOR_MAGIC_OVRD || torMagic == TOR_MAGIC_OVLY ) { - if ( i_PpeType == CME || i_PpeType == SGPE + if ( i_PpeType == PT_CME || i_PpeType == PT_SGPE || i_RingBlockType == GET_DD_LEVEL_RINGS || i_RingBlockType == GET_PPE_LEVEL_RINGS ) { @@ -1174,7 +1179,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr } else if (torMagic == TOR_MAGIC_CME) { - if ( i_PpeType == SBE || i_PpeType == SGPE + if ( i_PpeType == PT_SBE || i_PpeType == PT_SGPE || i_RingBlockType == GET_DD_LEVEL_RINGS || i_RingBlockType == GET_PPE_LEVEL_RINGS ) { @@ -1189,7 +1194,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr } else if (torMagic == TOR_MAGIC_SGPE) { - if ( i_PpeType == SBE || i_PpeType == CME + if ( i_PpeType == PT_SBE || i_PpeType == PT_CME || i_RingBlockType == GET_DD_LEVEL_RINGS || i_RingBlockType == GET_PPE_LEVEL_RINGS ) { @@ -1249,7 +1254,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr uint32_t l_ppe_offset = 0; uint32_t l_ppe_size = 0; - if (i_PpeType == SBE) + if (i_PpeType == PT_SBE) { temp = ddLevelOffset >> 2; @@ -1263,7 +1268,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr l_ppe_size = *((uint32_t*)i_ringSection + temp + 1 ); l_ppe_size = be32toh(l_ppe_size); } - else if (i_PpeType == CME) + else if (i_PpeType == PT_CME) { temp = (ddLevelOffset >> 2) + 2; @@ -1277,7 +1282,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr l_ppe_size = *((uint32_t*)i_ringSection + temp + 1 ); l_ppe_size = be32toh(l_ppe_size); } - else if (i_PpeType == SGPE) + else if (i_PpeType == PT_SGPE) { temp = (ddLevelOffset >> 2) + sizeof(uint32_t); @@ -1320,7 +1325,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr else if ( i_RingBlockType == GET_SINGLE_RING || i_RingBlockType == PUT_SINGLE_RING ) { - if ( i_PpeType == SBE && + if ( i_PpeType == PT_SBE && ( torMagic == TOR_MAGIC_HW || torMagic == TOR_MAGIC_SBE || torMagic == TOR_MAGIC_OVRD || @@ -1358,7 +1363,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr return TOR_RING_BLOCKS_FOUND; } } - else if ( i_PpeType == CME && + else if ( i_PpeType == PT_CME && ( torMagic == TOR_MAGIC_HW || torMagic == TOR_MAGIC_CME ) ) { @@ -1379,7 +1384,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr if (i_dbgl > 0) { MY_INF("\t After CME single ring call, %s ring container is not found \n", - RING_PROPERTIES[i_ringId].iv_name); + P9_RID::RING_PROPERTIES[i_ringId].iv_name); } return rc; @@ -1408,7 +1413,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr if (i_dbgl > 0) { MY_INF("\t After CME single ring call, There is no TOR slot for %s %d\n", - RING_PROPERTIES[i_ringId].iv_name, i_ringId); + P9_RID::RING_PROPERTIES[i_ringId].iv_name, i_ringId); } return rc; @@ -1424,7 +1429,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr return TOR_RING_BLOCKS_FOUND; } } - else if ( i_PpeType == SGPE && + else if ( i_PpeType == PT_SGPE && ( torMagic == TOR_MAGIC_HW || torMagic == TOR_MAGIC_SGPE ) ) { @@ -1445,7 +1450,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr if (i_dbgl > 0) { MY_INF("\t After SGPE single ring call, %s ring container is not found \n", - RING_PROPERTIES[i_ringId].iv_name); + P9_RID::RING_PROPERTIES[i_ringId].iv_name); } return rc; @@ -1474,7 +1479,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr if (i_dbgl > 0) { MY_INF("\t After SGPE single ring call, There is no TOR slot for %s %d\n", - RING_PROPERTIES[i_ringId].iv_name, i_ringId); + P9_RID::RING_PROPERTIES[i_ringId].iv_name, i_ringId); } return rc; @@ -1523,7 +1528,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr ///////////////////////////////////////////////////////////////////////////////////// int tor_get_single_ring ( void* i_ringSection, // Ring section ptr uint16_t i_ddLevel, // DD level - RingID i_ringId, // Ring ID + RingId_t i_ringId, // Ring ID PpeType_t i_PpeType, // SBE, CME, SGPE RingVariant_t i_RingVariant, // Base,CC, RL, Ovrd, Ovly uint8_t i_instanceId, // Instance ID @@ -1536,7 +1541,7 @@ int tor_get_single_ring ( void* i_ringSection, // Ring section ptr char i_ringName[25]; //@FIXME: This should really be ALLRING. But it's not used as input. RingType_t l_ringType; - l_ringType = COMMON; + l_ringType = COMMON_RING; if (i_dbgl > 1) { @@ -1594,7 +1599,7 @@ int tor_get_block_of_rings ( void* i_ringSection, // Ring section { // Get block of rings specific to a PPE type rc = tor_access_ring( i_ringSection, - NUM_RING_IDS, + P9_RID::NUM_RING_IDS, i_ddLevel, i_PpeType, i_ringType, @@ -1611,7 +1616,7 @@ int tor_get_block_of_rings ( void* i_ringSection, // Ring section { // Get DD level block of rings rc = tor_access_ring( i_ringSection, - NUM_RING_IDS, + P9_RID::NUM_RING_IDS, i_ddLevel, i_PpeType, i_ringType, @@ -1650,7 +1655,7 @@ int tor_append_ring( void* i_ringSection, // Ring section ptr // Out: Updated size of ring section. void* i_ringBuffer, // Ring work buffer const uint32_t i_ringBufferSize, // Max size of ring work buffer - RingID i_ringId, // Ring ID + RingId_t i_ringId, // Ring ID PpeType_t i_PpeType, // SBE, CME, SGPE RingType_t i_RingType, // Common, Instance RingVariant_t i_RingVariant, // Base,CC, RL, Ovrd, Ovly @@ -1737,5 +1742,3 @@ uint8_t tor_version( void) { return (uint8_t)TOR_VERSION; } - -}; diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.H b/src/import/chips/p9/utils/imageProcs/p9_tor.H index 7d578723..2865cbfb 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_tor.H +++ b/src/import/chips/p9/utils/imageProcs/p9_tor.H @@ -25,13 +25,10 @@ #ifndef _P9_TOR_H_ #define _P9_TOR_H_ -#include "p9_ringId.H" +#include <common_ringId.H> #define MAX_TOR_RING_OFFSET (256*256-1) // Max value of 2Byte uint -namespace P9_TOR -{ - extern const char* ppeTypeName[]; extern const char* ringVariantName[]; @@ -53,35 +50,6 @@ enum TorMagicNum }; // -// Chip types to represent p9n, p9c, centaur -// -enum ChipType -{ - CT_P9N, - CT_P9C, - CT_CEN, - NUM_CHIP_TYPES -}; - -typedef uint8_t ChipType_t; -const ChipType_t INVALID_CHIP_TYPE = 0xff; - -typedef struct ChipTypeList -{ - const char* name; - ChipType_t type; -} ChipTypeList_t; - -const ChipTypeList_t CHIP_TYPE_LIST[] = -{ - {"p9n", CT_P9N}, - {"p9c", CT_P9C}, - {"cen", CT_CEN}, -}; - - - -// // TOR header field (appears in top of every HW, SBE, CEN, OVRD, etc ring section) // typedef struct @@ -91,7 +59,7 @@ typedef struct ChipType_t chipType; // Value from ChipType enum uint8_t ddLevel; // =0xff if MAGIC_HW, >0 all other MAGICs uint8_t numDdLevels; // >0 if MAGIC_HW, =1 all other MAGICs - uint32_t size; // A place holder for now, but will be used in a later commit. + uint32_t size; // Size of the TOR ringSection. } TorHeader_t; #define UNDEFINED_DD_LEVEL (uint8_t)0xff @@ -161,20 +129,13 @@ typedef enum RingBlockType PUT_SINGLE_RING = 0x03 } RingBlockType_t; -typedef enum RingType +enum PpeType { - COMMON = 0x00, - INSTANCE = 0x01, - ALLRING = 0x02 -} RingType_t; - -typedef enum PpeType -{ - SBE = 0x00, - CME = 0x01, - SGPE = 0x02, + PT_SBE = 0x00, + PT_CME = 0x01, + PT_SGPE = 0x02, NUM_PPE_TYPES = 0x03 -} PpeType_t; +}; /// /// **************************************************************************** @@ -281,7 +242,7 @@ typedef enum PpeType /// /// \retval non-0 See \ref TOR API RETURN errors int tor_access_ring( void* i_ringSection, // Ring address Ptr any of .rings, .overrides and .overlays. - RingID i_ringId, // Unique ring ID + RingId_t i_ringId, // Unique ring ID uint16_t i_ddLevel, // DD level info PpeType_t i_PpeType, // PPE type : SBE, CME, etc RingType_t& io_RingType, // 0: Common 1: Instance @@ -333,7 +294,7 @@ int tor_access_ring( void* i_ringSection, // Ring address Ptr any of . /// \retval non-0 See \ref TOR API RETURN errors int tor_get_single_ring ( void* i_ringSection, uint16_t i_ddLevel, - RingID i_ringId, + RingId_t i_ringId, PpeType_t i_PpeType, RingVariant_t i_RingVariant, uint8_t i_instanceId, @@ -441,7 +402,7 @@ int tor_append_ring( void* i_ringSection, uint32_t& io_ringSectionSize, void* i_ringBuffer, const uint32_t i_ringBufferSize, - RingID i_ringId, + RingId_t i_ringId, PpeType_t i_ppeType, RingType_t i_RingType, RingVariant_t i_RingVariant, @@ -457,6 +418,5 @@ int tor_append_ring( void* i_ringSection, /// \retval - TOR version uint8_t tor_version( void); -}; #endif //_P9_TOR_H_ diff --git a/src/import/chips/p9/utils/p9_putRingUtils.C b/src/import/chips/p9/utils/p9_putRingUtils.C index c18b1d68..8f8b6689 100644 --- a/src/import/chips/p9/utils/p9_putRingUtils.C +++ b/src/import/chips/p9/utils/p9_putRingUtils.C @@ -34,7 +34,7 @@ #include <p9_putRingUtils.H> #include <p9_scan_compression.H> -using namespace RING_TYPES; +//using namespace RING_TYPES; namespace RS4 { @@ -159,10 +159,10 @@ uint32_t rs4_revle32(const uint32_t i_x) } }; //end of namespace -void getRingProperties(const RingID i_ringId, +void getRingProperties(const RingId_t i_ringId, uint32_t& o_torOffset, - RINGTYPE& o_ringType, - CHIPLET_TYPE& o_chipletType) + RingType_t& o_ringType, + ChipletType_t& o_chipletType) { do { @@ -171,7 +171,7 @@ void getRingProperties(const RingID i_ringId, (INSTANCE_RING_MASK & (RING_PROPERTIES[i_ringId].iv_torOffSet)); o_chipletType = RING_PROPERTIES[i_ringId].iv_type; - if(INVALID_RING == o_torOffset) + if(INVALID_RING_OFFSET == o_torOffset) { break; } @@ -387,7 +387,7 @@ fapi2::ReturnCode setupScanRegion(const fapi2::Target<fapi2::TARGET_TYPE_ALL>& i_target, uint64_t i_scanRegion, const uint8_t i_chipletId, - const RINGTYPE i_ringType) + const RingType_t i_ringType) { fapi2::ReturnCode l_rc; uint32_t l_chiplet = i_chipletId << 24; @@ -401,7 +401,7 @@ fapi2::ReturnCode setupScanRegion(const fapi2::Target<fapi2::TARGET_TYPE_ALL>& } if ((fapi2::TARGET_TYPE_EX & (i_target.get().getFapiTargetType())) && - (i_ringType != INSTANCE_RING )) + (i_ringType != INSTANCE_RING)) { // this gives position of ex (0 or 1) uint32_t l_ex_number = i_target.get().getTargetInstance(); @@ -1126,7 +1126,7 @@ fapi2::ReturnCode rs4DecompressionSvc( const uint8_t* i_rs4, bool i_applyOverride, const fapi2::RingMode i_ringMode, - const RINGTYPE i_ringType) + const RingType_t i_ringType) { FAPI_INF(">> rs4DecompressionSvc"); CompressedScanData* l_rs4Header = (CompressedScanData*) i_rs4; diff --git a/src/import/chips/p9/utils/p9_putRingUtils.H b/src/import/chips/p9/utils/p9_putRingUtils.H index 600982cb..fc503b2a 100644 --- a/src/import/chips/p9/utils/p9_putRingUtils.H +++ b/src/import/chips/p9/utils/p9_putRingUtils.H @@ -129,11 +129,11 @@ enum scanType_t // // Function Definitions // -using namespace RING_TYPES; -void getRingProperties(const RingID i_ringId, +//using namespace RING_TYPES; +void getRingProperties(const RingId_t i_ringId, uint32_t& o_torOffset, - RINGTYPE& o_ringType, - CHIPLET_TYPE& o_type); + RingType_t& o_ringType, + ChipletType_t& o_type); /// @brief Function to apply the Ring data using the standard-scan method /// @param[in] i_target Chiplet Target of Scan @@ -160,7 +160,7 @@ fapi2::ReturnCode setupScanRegion(const fapi2::Target<fapi2::TARGET_TYPE_ALL>& i_target, uint64_t i_scanRegion, const uint8_t i_chipletId, - const RINGTYPE i_ringType = COMMON_RING); + const RingType_t i_ringType = COMMON_RING); /// @brief Function to write the header data to the ring. @@ -203,7 +203,7 @@ fapi2::ReturnCode rs4DecompressionSvc( const uint8_t* i_rs4, bool i_applyOverride, const fapi2::RingMode i_ringMode, - const RINGTYPE i_ringType = COMMON_RING); + const RingType_t i_ringType = COMMON_RING); /// @brief Function to clean up the scan region and type diff --git a/src/import/chips/p9/utils/p9_putRingUtils.mk b/src/import/chips/p9/utils/p9_putRingUtils.mk index 247976c2..2118f647 100644 --- a/src/import/chips/p9/utils/p9_putRingUtils.mk +++ b/src/import/chips/p9/utils/p9_putRingUtils.mk @@ -5,7 +5,7 @@ # # OpenPOWER sbe Project # -# Contributors Listed Below - COPYRIGHT 2016 +# Contributors Listed Below - COPYRIGHT 2016,2017 # [+] International Business Machines Corp. # # @@ -24,5 +24,6 @@ # IBM_PROLOG_END_TAG PROCEDURE=p9_putRingUtils +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/common/utils/imageProcs) $(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9/utils/imageProcs) $(call BUILD_PROCEDURE) diff --git a/src/import/chips/p9/xip/p9_xip_tool.C b/src/import/chips/p9/xip/p9_xip_tool.C index 069cb426..011f90e4 100644 --- a/src/import/chips/p9/xip/p9_xip_tool.C +++ b/src/import/chips/p9/xip/p9_xip_tool.C @@ -46,9 +46,16 @@ #include "p9_xip_image.h" #ifndef __PPE__ // Needed on ppe side to avoid TOR API - #include "p9_tor.H" - #include "p9_scan_compression.H" - using namespace P9_TOR; +#include "p9_tor.H" +#include "p9_scan_compression.H" +namespace P9_RID +{ +#include "p9_ringId.H" +}; +namespace CEN_RID +{ +#include "cen_ringId.H" +} #endif @@ -211,15 +218,10 @@ static inline const char* get_sectionName(uint64_t magic, int index) { switch (magic) { -// case P9_XIP_MAGIC_BASE: -// FIXME -// break; -// case P9_XIP_MAGIC_CENTAUR: -// FIXME -// break; case P9_XIP_MAGIC_SEEPROM: return P9_XIP_SECTION_NAME(g_sectionNamesSbe, index); + case P9_XIP_MAGIC_CENTAUR: case P9_XIP_MAGIC_HW: return P9_XIP_SECTION_NAME(g_sectionNamesHw, index); @@ -1770,14 +1772,15 @@ int dissectRingSectionTor( void* i_ringSection, { int rc = 0; uint32_t i; + RingId_t numRingIds = 0; uint32_t torMagic = 0xffffffff; // Undefined value - uint8_t chipType = 0xff; // Undefined value + ChipType_t chipType = 0xff; // Undefined value uint32_t numDdLevels = 0; // Undefined value uint8_t iDdLevel, ddLevel = 0xff; // Undefined value - uint8_t ppeType; - uint8_t ringId; + PpeType_t ppeType; + RingId_t ringId; RingType_t ringType; - uint8_t ringVariant; + RingVariant_t ringVariant; uint8_t instanceId; void* ringBlockPtr; uint32_t ringBlockSize; @@ -1808,6 +1811,28 @@ int dissectRingSectionTor( void* i_ringSection, ddLevel = torHeader->ddLevel; numDdLevels = torHeader->numDdLevels; + // + // Make some ChipType specific data translations + // + switch (chipType) + { + case CT_P9N: + numRingIds = P9_RID::NUM_RING_IDS; + break; + + case CT_P9C: + numRingIds = P9_RID::NUM_RING_IDS; + break; + + case CT_CEN: + numRingIds = CEN_RID::NUM_RING_IDS; + break; + + default: + fprintf(stderr, "ERROR: Invalid chipType(=%d)\n", chipType); + exit(1); + } + fprintf(stdout, "---------------------------------\n"); fprintf(stdout, "* TOR header summary *\n"); fprintf(stdout, "---------------------------------\n"); @@ -1858,10 +1883,10 @@ int dissectRingSectionTor( void* i_ringSection, for (ppeType = 0; ppeType < NUM_PPE_TYPES; ppeType++) { - if ((torMagic == TOR_MAGIC_SGPE && ppeType != SGPE) || - (torMagic == TOR_MAGIC_CME && ppeType != CME) || - (torMagic == TOR_MAGIC_SBE && ppeType != SBE) || - (torMagic == TOR_MAGIC_OVRD && ppeType != SBE)) + if ((torMagic == TOR_MAGIC_SGPE && ppeType != PT_SGPE) || + (torMagic == TOR_MAGIC_CME && ppeType != PT_CME) || + (torMagic == TOR_MAGIC_SBE && ppeType != PT_SBE) || + (torMagic == TOR_MAGIC_OVRD && ppeType != PT_SBE)) { continue; } @@ -1879,15 +1904,15 @@ int dissectRingSectionTor( void* i_ringSection, //---------------------- // Unique ring ID loop. - for (ringId = 0; ringId < NUM_RING_IDS; ringId++) + for (ringId = 0; ringId < numRingIds; ringId++) { - ringType = (RingType_t)(-1); + ringType = -1; //--------------------------- // Chiplet instance ID loop. // - Only loop once if ringId is a common ring. - for (instanceId = 0; instanceId <= CHIPLET_ID_MAX && ringType != COMMON; instanceId++) + for (instanceId = 0; instanceId <= CHIPLET_ID_MAX && ringType != COMMON_RING; instanceId++) { #ifdef P9_XIP_TOOL_VERBOSE fprintf( stderr, "Processing: " @@ -1901,11 +1926,11 @@ int dissectRingSectionTor( void* i_ringSection, ringBlockSize = RING_BUF_SIZE_MAX; rc = tor_access_ring( i_ringSection, - (RingID)ringId, + ringId, ddLevel, - (PpeType_t)ppeType, + ppeType, ringType, // IO parm - (RingVariant_t)ringVariant, + ringVariant, instanceId, // IO parm GET_SINGLE_RING, &ringBlockPtr, // IO parm @@ -2467,7 +2492,7 @@ int check_sbe_ring_section_size( void* i_hwImage, // section size rc = tor_get_block_of_rings( ringsSection, i_ddLevel, - SBE, + PT_SBE, l_ringType, BASE, unused_parm, |